Sistemi integrati per la domotica e per il risparmio energetico tramite micro elaboratori su singola scheda e basso costo.

Nella tesi viene presentata una introduzione generale all'Internet of Things, gli utilizzi che ne vengono fatti attualmente e le eventuali modifiche che verranno apportate in futuro, inoltre vengono presentati i problemi che ne derivano e le soluzioni che attualmente risolvono questi problemi. E' presente una introduzione al protocollo presentato da IBM MQTT che attualmente rappresenta uno standard in questo campo. In seguito vengono mostrati i requisiti e le fasi di progettazione di un sistema domotico, quali sono i suoi principali utilizzi quali i vantaggi e i suoi svantaggi. E' presente una introduzione ai dispositivi maggiormente usati per la realizzazione di sistemi del genere, con le loro caratteristiche, in particolare di dispositivi Arduino e Raspberry Pi. Viene mostrato l'uso del protocollo mqtt per la comunicazione tra dispositivi Raspberry Pi e client Android. In fine viene mostrata una realizzazione di un sistema di domotica attraverso l'uso di questo protocollo.

Progetto di un nodo sensore wireless ultra low-power per rilevazione del movimento

Negli ultimi anni il tema del risparmio energetico nei sistemi elettronici ha suscitato sempre maggiore interesse, poiché grazie allo sviluppo tecnologico è stato possibile creare dispositivi in grado di operare a bassa potenza. Sempre più applicazioni elettroniche richiedono di funzionare tramite fonti di energia limitata, come per esempio le batterie, con un’autonomia in alcuni casi anche di 15-20 anni, questo è il motivo per il quale è diventato fondamentale riuscire a progettare sistemi elettronici in grado di gestire in modo intelligente l’energia a disposizione. L’utilizzo di batterie però spesso richiede costi aggiuntivi, come per esempio il semplice cambio, che in alcune situazioni potrebbe essere difficoltoso poiché il sistema elettronico si potrebbe trovare in luoghi difficilmente raggiungibili dall’uomo; ecco perché negli ultimi anni il tema della raccolta di energia o anche chiamato Energy Harvesting, sta suscitando sempre più interesse. Con l’Energy Harvesting si possono catturare ed accumulare per poi riutilizzare, piccole quantità di energia presenti nell’ambiente. Attraverso sistemi di Energy Harvesting è quindi diventato possibile trasformare energia cinetica, differenze di temperatura, effetto piezoelettrico, energia solare ecc.. in energia elettrica che può essere utilizzata per alimentare semplici applicazioni elettroniche, nel caso di questa tesi un nodo sensore wireless. I vantaggi dei sistemi di Energy Harvesting rispetto a sistemi alimentati a batteria sono i seguenti: - Costi di manutenzione ridotti; - Fonte di energia idealmente inesauribile e con un impatto ambientale negativo nullo. La potenza fornita da sistemi di Energy Harvesting si aggira intorno a qualche centinaia di uW, perciò è chiaro che il sistema da alimentare deve essere ottimizzato il più possibile dal punto di vista energetico, per questo motivo il progettista si deve impegnare per evitare qualsiasi spreco energetico e dovrà utilizzare dispositivi che permettono una gestione intelligente dell’energia a disposizione, al fine di ottenere la migliore efficienza possibile.

Sviluppo di una interfaccia per l'integrazione della piattaforma inerziale X-Nucleo con una rete di sensori wireless

Questo elaborato presenta il progetto di una interfaccia per l'aggiunta di sensori inerziali ad un nodo di una WSN (Wireless Sensor Network) �finalizzato al monitoraggio delle frane. Analizzando i vantaggi che avrebbe portato l'utilizzo di ulteriori sensori, si �e cercato di fornire un valido approccio di progettazione; in particolare l'idea �e quella di integrarli con un giroscopio ed un accelerometro aventi applicazioni in altri settori. Con questo particolare utilizzo, essi possono portare ad un miglior monitoraggio riuscendo a rilevare i movimenti in modo dettagliato ed a riconoscere i falsi allarmi. Nell'approccio che si intende suggerire verranno sfruttate schede per la prototipazione rapida, user-friendly e con costi decisamente accessibili, adatte alla sperimentazione elettronica e per lo sviluppo di nuovi dispositivi. Attraverso l'utilizzo di ambienti di sviluppo appositamente creati, si sono simulate le comunicazioni tra nodo e scheda di sensori, mettendo in evidenza i vantaggi ottenuti. Buona parte del progetto ha riguardato la programmazione in linguaggio C/C++, con una particolare attenzione al risparmio energetico.

Tecniche di progettazione tollerante alle variazioni per circuiti digitali in tecnologie nanometriche

The digital electronic market development is founded on the continuous reduction of the transistors size, to reduce area, power, cost and increase the computational performance of integrated circuits. This trend, known as technology scaling, is approaching the nanometer size. The lithographic process in the manufacturing stage is increasing its uncertainty with the scaling down of the transistors size, resulting in a larger parameter variation in future technology generations. Furthermore, the exponential relationship between the leakage current and the threshold voltage, is limiting the threshold and supply voltages scaling, increasing the power density and creating local thermal issues, such as hot spots, thermal runaway and thermal cycles. In addiction, the introduction of new materials and the smaller devices dimension are reducing transistors robustness, that combined with high temperature and frequently thermal cycles, are speeding up wear out processes. Those effects are no longer addressable only at the process level. Consequently the deep sub-micron devices will require solutions which will imply several design levels, as system and logic, and new approaches called Design For Manufacturability (DFM) and Design For Reliability. The purpose of the above approaches is to bring in the early design stages the awareness of the device reliability and manufacturability, in order to introduce logic and system able to cope with the yield and reliability loss. The ITRS roadmap suggests the following research steps to integrate the design for manufacturability and reliability in the standard CAD automated design flow: i) The implementation of new analysis algorithms able to predict the system thermal behavior with the impact to the power and speed performances. ii) High level wear out models able to predict the mean time to failure of the system (MTTF). iii) Statistical performance analysis able to predict the impact of the process variation, both random and systematic. The new analysis tools have to be developed beside new logic and system strategies to cope with the future challenges, as for instance: i) Thermal management strategy that increase the reliability and life time of the devices acting to some tunable parameter,such as supply voltage or body bias. ii) Error detection logic able to interact with compensation techniques as Adaptive Supply Voltage ASV, Adaptive Body Bias ABB and error recovering, in order to increase yield and reliability. iii) architectures that are fundamentally resistant to variability, including locally asynchronous designs, redundancy, and error correcting signal encodings (ECC). The literature already features works addressing the prediction of the MTTF, papers focusing on thermal management in the general purpose chip, and publications on statistical performance analysis. In my Phd research activity, I investigated the need for thermal management in future embedded low-power Network On Chip (NoC) devices.I developed a thermal analysis library, that has been integrated in a NoC cycle accurate simulator and in a FPGA based NoC simulator. The results have shown that an accurate layout distribution can avoid the onset of hot-spot in a NoC chip. Furthermore the application of thermal management can reduce temperature and number of thermal cycles, increasing the systemreliability. Therefore the thesis advocates the need to integrate a thermal analysis in the first design stages for embedded NoC design. Later on, I focused my research in the development of statistical process variation analysis tool that is able to address both random and systematic variations. The tool was used to analyze the impact of self-timed asynchronous logic stages in an embedded microprocessor. As results we confirmed the capability of self-timed logic to increase the manufacturability and reliability. Furthermore we used the tool to investigate the suitability of low-swing techniques in the NoC system communication under process variations. In this case We discovered the superior robustness to systematic process variation of low-swing links, which shows a good response to compensation technique as ASV and ABB. Hence low-swing is a good alternative to the standard CMOS communication for power, speed, reliability and manufacturability. In summary my work proves the advantage of integrating a statistical process variation analysis tool in the first stages of the design flow.

Ricerca ed applicazione di nuovi metodi di progettazione meccanica e di industrial design

The present dissertation relates to methodologies and technics about industrial and mechanical design. The author intends to give a complete idea about the world of design, showing the theories of Quality Function Deployment and TRIZ, of other methods just like planning, budgeting, Value Analysis and Engineering, Concurrent Engineering, Design for Assembly and Manufactoring, etc., and their applications to five concrete cases. In these cases there are also illustrated design technics as CAD, CAS, CAM; Rendering, which are ways to transform an idea into reality. The most important object of the work is, however, the birth of a new methodology, coming up from a comparison between QFD and TRIZ and their integration through other methodologies, just like Time and Cost Analysis, learned and skilled during an important experience in a very famous Italian automotive factory.

Progetto di un sistema di collaudo per un tag RFID uwb integrato

La tesi è incentrata sul progetto di un PCB in grado di testare il corretto funzionamento del chip GRETA, un integrato dedicato, che implementa un nodo intelligente basato su harvesting RF. L'integrato implementa un sistema innovativo di comunicazione per RFID, che sfrutta la metodologia Green Tagging, per la trasmissione di sequenze RF. Vengono elaborate le diverse fasi di progettazione e di design pcb attraverso un programma di cad. Lo scopo è quello di realizzare un unico sistema perfettamente controllabile dall'utente, che attraverso i componenti messi a disposizione dalla scheda di testing, permetta di ricevere, inviare o escludere i segnali che afferiscono ai pin di Input/output del chip integrato. E' stata introdotta la possibilità di pilotare/testare separatamente le sottoparti interne al chip, con lo scopo di isolare eventuali malfunzionamenti.

A conceptual framework for a systematic mapping of layout design principles by using Yin and Yang theory

There are various principles for layout design such as balance, rhythm, unity and harmony, but each principle has often been introduced as a separate concept rather than within an integrated and systematic structure, so that designers and design students have to keep practices for the acquisition of skills. The paper seeks to develop a conceptual framework for a systematic mapping of layout design principles by using Yin and Yang and the Five Elements. Yin and Yang theory explains all natural phenomena with its own conceptual model and facilitates finding harmony and balance between the visual elements in terms of systematic and organic relations. Most common and well-known layout design principles are defined with 10 different resources such as design books and articles, and have been remapped following with the structure of Yin and Yang and the Five Elements. A systematic framework explaining the relationships of design principles was created and 32 design students participated in its efficiency test. The outcome suggests there is a high possibility that the framework can be used in professional fields and design education.

Passenger flow and station facilities modelling for metro station layout design

This paper presents the simulation model development of passenger flow in a metro station. The model allows studies of passenger flow in stations with different layouts and facilities, thus providing valuable information, such as passenger flow and density of passenger at critical locations and passenger-handling facilities within a station, to the operators. The adoption of the concept of Petri nets in the simulation model is discussed. Examples are provided to demonstrate its application to passenger flow analysis, train scheduling and the testing of alternative station layouts.

Design and development of automatic visual inspection system for PCB manufacturing

Inspection of solder joints has been a critical process in the electronic manufacturing industry to reduce manufacturing cost, improve yield, and ensure product quality and reliability. This paper proposes two inspection modules for an automatic solder joint classification system. The “front-end” inspection system includes illumination normalisation, localisation and segmentation. The “back-end” inspection involves the classification of solder joints using the Log Gabor filter and classifier fusion. Five different levels of solder quality with respect to the amount of solder paste have been defined. The Log Gabor filter has been demonstrated to achieve high recognition rates and is resistant to misalignment. This proposed system does not need any special illumination system, and the images are acquired by an ordinary digital camera. This system could contribute to the development of automated non-contact, non-destructive and low cost solder joint quality inspection systems.

Process based synthesis to evaluate design flexibility in airport terminal layout

Flexible design concept is a relatively new trend in airport terminal design which is believed to facilitate the ever changing needs of a terminal. Current architectural design processes become more complex every day because of the introduction of new building technologies where the concept of flexible airport terminal would apparently make the design process even more complex. Previous studies have demonstrated that ever growing aviation industry requires airport terminals to be planned, designed and constructed in such a way that should allow flexibility in design process. In order to adopt the philosophy of ‘design for flexibility’ architects need to address a wide range of differing needs. An appropriate integration of the process models, prior to the airport terminal design process, is expected to uncover the relationships that exist between spatial layout and their corresponding functions. The current paper seeks to develop a way of sharing space adjacency related information obtained from the Business Process Models (BPM) to assist in defining flexible airport terminal layouts. Critical design parameters are briefly investigated at this stage of research whilst reviewing the available design alternatives and an evaluation framework is proposed in the current paper. Information obtained from various design layouts should assist in identifying and defining flexible design matrices allowing architects to interpret and to apply those throughout the lifecycle of the terminal building.

Design of coreless PCB transformers for power and signal isolation in a modular ADC system for power quality data acquisition

Available industrial energy meters offer high accuracy and reliability, but are typically expensive and low-bandwidth, making them poorly suited to multi-sensor data acquisition schemes and power quality analysis. An alternative measurement system is proposed in this paper that is highly modular, extensible and compact. To minimise cost, the device makes use of planar coreless PCB transformers to provide galvanic isolation for both power and data. Samples from multiple acquisition devices may be concentrated by a central processor before integration with existing host control systems. This paper focusses on the practical design and implementation of planar coreless PCB transformers to facilitate the module's isolated power, clock and data signal transfer. Calculations necessary to design coreless PCB transformers, and circuits designed for the transformer's practical application in the measurement module are presented. The designed transformer and each application circuit have been experimentally verified, with test data and conclusions made applicable to coreless PCB transformers in general.

A robust approach to design a single facility layout plan in dynamic manufacturing environments using a permutation-based genetic algorithm

During the past few decades, developing efficient methods to solve dynamic facility layout problems has been focused on significantly by practitioners and researchers. More specifically meta-heuristic algorithms, especially genetic algorithm, have been proven to be increasingly helpful to generate sub-optimal solutions for large-scale dynamic facility layout problems. Nevertheless, the uncertainty of the manufacturing factors in addition to the scale of the layout problem calls for a mixed genetic algorithm–robust approach that could provide a single unlimited layout design. The present research aims to devise a customized permutation-based robust genetic algorithm in dynamic manufacturing environments that is expected to be generating a unique robust layout for all the manufacturing periods. The numerical outcomes of the proposed robust genetic algorithm indicate significant cost improvements compared to the conventional genetic algorithm methods and a selective number of other heuristic and meta-heuristic techniques.

Recapitulation in generating spatial layouts: Representations of embryogenesis in evolutionary design modelling

The noted 19th century biologist, Ernst Haeckel, put forward the idea that the growth (ontogenesis) of an organism recapitulated the history of its evolutionary development. While this idea is defunct within biology, the idea has been promoted in areas such as education (the idea of an education being the repetition of the civilizations before). In the research presented in this paper, recapitulation is used as a metaphor within computer-aided design as a way of grouping together different generations of spatial layouts. In most CAD programs, a spatial layout is represented as a series of objects (lines, or boundary representations) that stand in as walls. The relationships between spaces are not usually explicitly stated. A representation using Lindenmayer Systems (originally designed for the purpose of modelling plant morphology) is put forward as a way of representing the morphology of a spatial layout. The aim of this research is not just to describe an individual layout, but to find representations that link together lineages of development. This representation can be used in generative design as a way of creating more meaningful layouts which have particular characteristics. The use of genetic operators (mutation and crossover) is also considered, making this representation suitable for use with genetic algorithms.