Studio portrait of Paula Wallerstein nee Molling holding her infant daughter Karoline "Line".

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Alice Burlin nee Molling, Therese Gottschalk nee Molling, and Line Stern nee Wallerstein at Alice Burlins's home; Linton near Cambridge, England.

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A simple firing delay control circuit for bridge converters

A simple ramp control firing circuit, suitable for use with fully controlled, line-commutated thyristor bridge circuits, is discussed here. This circuit uses very few components and generates the synchronized firing pulses in a simple way. It operates from a single 15 V Supply and has an inherent pulse inhibit facility. This circuit provides the synchronized firing pulses for both thyristors of the same limb in a bridge. To ensure reliability, wide triggering pulses are used, which are modulated to pass through the pulse transformers1 and demodulated before being fed to the thyristor gates. The use of throe such circuits only for a three-phase bridge is discussed.

A versatile and flexible digital pulse programmer for pulsed nuclear magnetic resonance

A versatile and flexible digital pulse programmer for two-pulse, three-pulse, saturation burst and Carr-Purcell sequences is described. Independently variable controls for pulse widths (0.2 mu s to 100 mu s), delay between pulses (0.2 mu s to 100 s) and for number of pulses (1 to 99) for the saturation burst and for the Carr-Purcell sequence, are brought to the front panel. The programmer can be used for one-shot experiments as well as for repetitive experiments.

Efficient probabilistic contingency analysis through a stability measure considering wind perturbation

The integration of stochastic wind power has accentuated a challenge for power system stability assessment. Since the power system is a time-variant system under wind generation fluctuations, pure time-domain simulations are difficult to provide real-time stability assessment. As a result, the worst-case scenario is simulated to give a very conservative assessment of system transient stability. In this study, a probabilistic contingency analysis through a stability measure method is proposed to provide a less conservative contingency analysis which covers 5-min wind fluctuations and a successive fault. This probabilistic approach would estimate the transfer limit of a critical line for a given fault with stochastic wind generation and active control devices in a multi-machine system. This approach achieves a lower computation cost and improved accuracy using a new stability measure and polynomial interpolation, and is feasible for online contingency analysis.

Kinetic characterization of rat brain type IIA sodium channel alpha-subunit stably expressed in a somatic cell line

1. The rat brain type IIA Na+ channel alpha-subunit was stably expressed in Chinese hamster ovary (CHO) cells. Current through the expressed Na+ channels was studied using the whole-cell configuration of the patch clamp technique. The transient Na+ current was sensitive to TTX and showed a bell-shaped peak current vs. membrane potential relation. 2. Na+ current inactivation was better described by the sum of two exponentials in the potential range -30 to +40 mV, with. a dominating fast component and a small slower component. 3. The steady-state inactivation, h(infinity), was related to potential by a Boltzmann distribution, underlying thr ee states of the inactivation gate. 4. Recovery of the channels from inactivation at different potentials in the range -70 to -120 mV were characterized by al? initial delay which decreased with hyperpolarization. The time course was well fitted by the sum of two exponentials. In this case the slower exponential was the major component, and both time constants decreased with hyperpolarization. 5. For a working description of the Na+ channel inactivation in this preparation, with a minimal deviation from the Hodgkin-Huxley model, a three-state scheme of the form O reversible arrow I-1 reversible arrow I-2 was proposed, replacing the original two-state scheme of the Hodgkin-Huxley model, and the rate constants are reported. 6. The instantaneous current-voltage relationship showed marked deviation from linearity and was satisfactorily fitted by the constant-field equation. 7. The time course of activation was described by an m(x) model. However, the best-fitted value of x varied with the membrane potential and had a mean value of 2. 8. Effective gating charge was determined to be 4.7e from the slope of the activation plot, plotted on a logarithmic scale. 9. The rate constants of activation, alpha(m) and beta(m), were determined. Their functional dependence on the membrane potential was investigated.

Phase change on transmission of microwaves through metal disc delay dielectrics

Expressions for the phase change Φ suffered by microwaves when transmitted through an artificial dielectric composed of metallic discs arranged in a three-dimensional array have been derived with different approaches as follows (i) molecular theory, (ii) electromagnetic theory and (iii) transmission line theory. The phase change depends on the distance t that the wave traverses inside the dielectric and also the spacing d between centre to centre of any two adjacent discs in the three principal directions. Molecular theory indicates Φ as an increasing function of t, whereas, the other two theories indicate Φ as an oscillatory function of t. The transmission line theory also exhibits Φ to be real or imaginary depending on t. Experimental values of Φ as a function of t have been obtained with the help of a microwave (3·2 cms wavelength) interferometer for two dielectrics having d as 1·91 cms and 2·22 cms respectively.

An efficient reduction algorithm for computation of interconnect delay variability for statistical timing analysis in clock tree planning

In this paper, we propose a novel and efficient algorithm for modelling sub-65 nm clock interconnect-networks in the presence of process variation. We develop a method for delay analysis of interconnects considering the impact of Gaussian metal process variations. The resistance and capacitance of a distributed RC line are expressed as correlated Gaussian random variables which are then used to compute the standard deviation of delay Probability Distribution Function (PDF) at all nodes in the interconnect network. Main objective is to find delay PDF at a cheaper cost. Convergence of this approach is in probability distribution but not in mean of delay. We validate our approach against SPICE based Monte Carlo simulations while the current method entails significantly lower computational cost.

Modified Stability Checking for On-Line Error Detection

The paper propose a unified error detection technique, based on stability checking, for on-line detection of delay, crosstalk and transient faults in combinational circuits and SEUs in sequential elements. The proposed method, called modified stability checking (MSC), overcomes the limitations of the earlier stability checking methods. The paper also proposed a novel checker circuit to realize this scheme. The checker is self-checking for a wide set of realistic internal faults including transient faults. Extensive circuit simulations have been done to characterize the checker circuit. A prototype checker circuit for a 1mm2 standard cell array has been implemented in a 0.13mum process.

Modeling of the Effects of Process Variations on Circuit Delay at 65nm

A novel methodology for modeling the effects of process variations on circuit delay performance is proposed by relating the variations in process parameters to variations in delay metric of a complex digital circuit. The delay of a 2-input NAND gate with 65nm gate length transistors is extensively characterized by mixed-mode simulations which is then used as a library element. The variation in saturation current Ionat the device level, and the variation in rising/falling edge stage delay for the NAND gate at the circuit level, are taken as performance metrics. A 4-bit x 4-bit Wallace tree multiplier circuit is used as a representative combinational circuit to demonstrate the proposed methodology. The variation in the multiplier delay is characterized, to obtain delay distributions, by an extensive Monte Carlo analysis. An analytical model based on CV/I metric is proposed, to extend this methodology for a generic technology library with a variety of library elements.

A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test

A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an analog voltage. This analog voltage controls the delay between this pair of clock signals, which is then measured in an all-digital manner using the technique of sub-sampling. This sub-sampling technique, having measurement time and accuracy trade-off, is well suited for low bandwidth signals. This concept is validated by designing delay cells, using current starved inverters in UMC 130nm CMOS process. Sub-mV accuracy is demonstrated for a measurement time of few seconds.

Stability of control systems with time delay

To find the approximate stability limit on the forward gain in control systems with small time delay, this note suggests approximating the exponential in the characteristic equation by the first few terms of its series and using the Routh–Hurwitz criterion. This approximation avoids all the time-consuming graphical work and gives a somewhat pessimistic maximum bound for the gain constant.

Digital Dead Time Logic and Protection Circuitry for PWM Voltage Source Converters

Power semiconductor devices have finite turn on and turn off delays that may not be perfectly matched. In a leg of a voltage source converter, the simultaneous turn on of one device and the turn off of the complementary device will cause a DC bus shoot through, if the turn off delay is larger than the turn on delay time. To avoid this situation it is common practice to blank the two complementary devices in a leg for a small duration of time while switching, which is called dead time. This paper proposes a logic circuit for digital implementation required to control the complementary devices of a leg independently and at the same time preventing cross conduction of devices in a leg, and while providing accurate and stable dead time. This implementation is based on the concept of finite state machines. This circuit can also block improper PWM pulses to semiconductor switches and filters small pulses notches below a threshold time width as the narrow pulses do not provide any significant contribution to average pole voltage, but leads to increased switching loss. This proposed dead time logic has been implemented in a CPLD and is implemented in a protection and delay card for 3- power converters.

Approximate synthesis formulas for microstrip line with aperture in ground plane

Approximate closed-form expressions for the propagation characteristics of a microstrip line with a symmetrical aperture in its ground plane are reported in this article. Well-known expressions for the characteristic impedance of a regular microstrip line have been modified to incorporate the effect of this aperture. The accuracy of these expressions for various values of substrate thickness, permittivity and line width has been studied in detail by fullwave simulations. This has been further verified by measurements. These expressions are easier to compute and find immense use in the design of broadband filters, tight couplers, power dividers, transformers, delay lines, and matching circuits. A broadband filter with aperture in ground plane is demonstrated in this article. (c) 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2012.

Evaluation of kissing bond in composite adhesive lap joints using digital image correlation: Preliminary studies

The assembly of aerospace and automotive structures in recent years is increasingly carried out using adhesives. Adhesive joints have advantages of uniform stress distribution and less stress concentration in the bonded region. Nevertheless, they may suffer due to the presence of defects in bond line and at the interface or due to improper curing process. While defects like voids, cracks and delaminations present in the adhesive bond line may be detected using different NDE methods, interfacial defects in the form of kissing bond may go undetected. Attempts using advanced ultrasonic methods like nonlinear ultrasound and guided wave inspection to detect kissing bond have met with limited success stressing the need for alternate methods. This paper concerns the preliminary studies carried out on detectability of dry contact kissing bonds in adhesive joints using the Digital Image Correlation (DIC) technique. In this attempt, adhesive joint samples containing varied area of kissing bond were prepared using the glass fiber reinforced composite (GFRP) as substrates and epoxy resin as the adhesive layer joining them. The samples were also subjected to conventional and high power ultrasonic inspection. Further, these samples were loaded till failure to determine the bond strength during which digital images were recorded and analyzed using the DIC method. This noncontact method could indicate the existence of kissing bonds at less than 50% failure load. Finite element studies carried out showed a similar trend. Results obtained from these preliminary studies are encouraging and further tests need to be done on a larger set of samples to study experimental uncertainties and scatter associated with the method. (C) 2013 Elsevier Ltd. All rights reserved.