Modelling the Geometry of the Repeat Unit Cell of Three-Dimensional Weave Architectures,

The three-dimensional (3D) weaving process offers the ability to tailor the mechanical properties via design of the weave architecture. One repeat of the 3D woven fabric is represented by the unit cell. The model accepts basic weaver and material manufacturer data as inputs in order to calculate the geometric characteristics of the 3D woven unit cell. The specific weave architecture manufactured and subsequently modelled had an angle interlock type binding configuration. The modelled result was shown to have a close approximation compared to the experimentally measured values and highlighted the importance of the representation of the binder tow path.

A Ring Rearrangement Approach to the Synthesis of Benzo[b]quinolizine and Benzoindolizine Architectures

An efficient ring rearrangement metathesis (RRM) approach to the synthesis of benzo[b]quinolizine and benzoindolizine systems from N-propargyl-phenanthridine derivatives is reported. A Hovel use of flash vacuum pyrolysis (FVP) for the Boc-deprotection of acid-sensitive substrates is also disclosed.

FPGA montgomery modular multiplication architectures suitable for ECCs over GF(p)

New FPGA architectures for the ordinary Montgomery multiplication algorithm and the FIOS modular multiplication algorithm are presented. The embedded 18×18-bit multipliers and fast carry look-ahead logic located on the Xilinx Virtex2 Pro family of FPGAs are used to perform the ordinary multiplications and additions/subtractions required by these two algorithms. The architectures are developed for use in Elliptic Curve Cryptosystems over GF(p), which require modular field multiplication to perform elliptic curve point addition and doubling. Field sizes of 128-bits and 256-bits are chosen but other field sizes can easily be accommodated, by rapidly reprogramming the FPGA. Overall, the larger the word size of the multiplier, the more efficiently it performs in terms of area/time product. Also, the FIOS algorithm is flexible in that one can tailor the multiplier architecture is to be area efficient, time efficient or a mixture of both by choosing a particular word size. It is estimated that the computation of a 256-bit scalar point multiplication over GF(p) would take about 4.8 ms.