Light memory operation based on a double pin SiC device

Experimental optoelectronic characterization of a p-i'(a-SiC:H)-n/pi(a-Si:H)-n heterostructure with low conductivity doped layers shows the feasibility of tailoring channel bandwidth and wavelength by optical bias through back and front side illumination. Front background enhances light-to-dark sensitivity of the long and medium wavelength range, and strongly quenches the others. Back violet background enhances the magnitude in short wavelength range and reduces the others. Experiments have three distinct programmed time slots: control, hibernation and data. Throughout the control time slot steady light wavelengths illuminate either or both sides of the device, followed by the hibernation without any background illumination. The third time slot allows a programmable sequence of different wavelengths with an impulse frequency of 6000Hz to shine upon the sensor. Results show that the control time slot illumination has an influence on the data time slot which is used as a volatile memory with the set, reset logical functions. © IFIP International Federation for Information Processing 2015.

Time – intangible tangible –

Dissertação para obtenção do Grau de Mestre em Arte e Ciência do Vidro

A framework for memory contention analysis in multi-core platforms

The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.

Dynamical Analysis and Visualization of Tornadoes Time Series

In this paper we analyze the behavior of tornado time-series in the U.S. from the perspective of dynamical systems. A tornado is a violently rotating column of air extending from a cumulonimbus cloud down to the ground. Such phenomena reveal features that are well described by power law functions and unveil characteristics found in systems with long range memory effects. Tornado time series are viewed as the output of a complex system and are interpreted as a manifestation of its dynamics. Tornadoes are modeled as sequences of Dirac impulses with amplitude proportional to the events size. First, a collection of time series involving 64 years is analyzed in the frequency domain by means of the Fourier transform. The amplitude spectra are approximated by power law functions and their parameters are read as an underlying signature of the system dynamics. Second, it is adopted the concept of circular time and the collective behavior of tornadoes analyzed. Clustering techniques are then adopted to identify and visualize the emerging patterns.

A Generic and Compositional Framework for Multicore Response Time Analysis

23rd International Conference on Real-Time Networks and Systems (RTNS 2015). 4 to 6, Nov, 2015, Main Track. Lille, France. Best Paper Award Nominee

Fractional State Space Analysis of Temperature Time Series

Atmospheric temperatures characterize Earth as a slow dynamics spatiotemporal system, revealing long-memory and complex behavior. Temperature time series of 54 worldwide geographic locations are considered as representative of the Earth weather dynamics. These data are then interpreted as the time evolution of a set of state space variables describing a complex system. The data are analyzed by means of multidimensional scaling (MDS), and the fractional state space portrait (fSSP). A centennial perspective covering the period from 1910 to 2012 allows MDS to identify similarities among different Earth’s locations. The multivariate mutual information is proposed to determine the “optimal” order of the time derivative for the fSSP representation. The fSSP emerges as a valuable alternative for visualizing system dynamics.

Summer Vacations not Only a Memory for Life, but Also a Rare Infection

Introduction: Rhinoscleroma is a rare, chronic, granulomatous disease that most frequently affects the upper respiratory tract, especially the nasal cavity and sometimes extends through the lower respiratory tract. Is associated with Klebsiella rhinoscleromatis, which is endemic in certain geographic regions namely Central America. The pathogenesis and risk factors remain unclear. Clinical case: We report a five years Old Portuguese boy, previously healthy, brought to the Emergency Department with epistaxis, without other accompanying signs or symptoms. The Otorhinolaryngologist (ORL) performed rhinoscopy and identified an intranasal bleeding mass. The MRI revealed an intranasal mass with extension to the ethmoid bone sinus, and performed biopsy. The histopathology was vital, making the diagnosis of Rhinoscleroma. The child had traveled abroad for the first time on vacations a year before to Dominican Republic. The bacteriologic exam identified a Klebsiella spp. sensible to the association of amoxicillin and clavulanic acid. Blood test performed excluded association of immunodeficiency. Since it’s a rare disease genetic study are under course. Monthly evaluation by ORL and pediatrician was performed which documented progressive reduction until total disappearing of the macro and microscopic lesion, and negative bacteriologic exam. Six months of antibiotic therapy were completed without any known secondary effects. The child remained asymptomatic up to the last visit, 3 months following treatment and has shown no evidence of recurrence. Conclusion: Globalization and free transit of people to areas far from origin countries here some rare diseases are endemic brings a new challenge to modern medicine. Sometimes vacations bring more than memories.

Effect of surfactant on PDLC films with and without permanent memory effect

Dissertação para obtenção do Grau de Mestre em Engenharia Química e Bioquímica

Maintaining the correctness of transactional memory programs

Dissertação para obtenção do Grau de Doutor em Engenharia Informática

Narrative Memory in Hyperfiction and Games

The aim of this paper is to address some theoretical issues concerning the narrative practice in cyberspace. From a narratological perspective it intends to clarify the functioning of time and space in storytelling. For that purpose it traces the concept(s) of memory inherited from rhetoric; the use of memory as a narrative device in traditional accounts; the adaptations imposed by hyperfiction. Using practical examples (including two Portuguese case studies - InStory 2006, and Noon 2007) it will show how narrative memory strategies can be helpful in game literacy. The main purpose is to contribute to serious game research and (trans)literary studies.

Rely-guarantee protocols for safe interference over shared memory

Mutable state can be useful in certain algorithms, to structure programs, or for efficiency purposes. However, when shared mutable state is used in non-local or nonobvious ways, the interactions that can occur via aliases to that shared memory can be a source of program errors. Undisciplined uses of shared state may unsafely interfere with local reasoning as other aliases may interleave their changes to the shared state in unexpected ways. We propose a novel technique, rely-guarantee protocols, that structures the interactions between aliases and ensures that only safe interference is possible. We present a linear type system outfitted with our novel sharing mechanism that enables controlled interference over shared mutable resources. Each alias is assigned separate, local roles encoded in a protocol abstraction that constrains how an alias can legally use that shared state. By following the spirit of rely-guarantee reasoning, our rely-guarantee protocols ensure that only safe interference can occur but still allow many interesting uses of shared state, such as going beyond invariant and monotonic usages. This thesis describes the three core mechanisms that enable our type-based technique to work: 1) we show how a protocol models an alias’s perspective on how the shared state evolves and constrains that alias’s interactions with the shared state; 2) we show how protocols can be used while enforcing the agreed interference contract; and finally, 3) we show how to check that all local protocols to some shared state can be safely composed to ensure globally safe interference over that shared memory. The interference caused by shared state is rooted at how the uses of di↵erent aliases to that state may be interleaved (perhaps even in non-deterministic ways) at run-time. Therefore, our technique is mostly agnostic as to whether this interference was the result of alias interleaving caused by sequential or concurrent semantics. We show implementations of our technique in both settings, and highlight their di↵erences. Because sharing is “first-class” (and not tied to a module), we show a polymorphic procedure that enables abstract compositions of protocols. Thus, protocols can be specialized or extended without requiring specific knowledge of the interference produce by other protocols to that state. We show that protocol composition can ensure safety even when considering abstracted protocols. We show that this core composition mechanism is sound, decidable (without the need for manual intervention), and provide an algorithm implementation.

Development of paper transistor with memory effect

This work will discuss the use of different paper membranes as both the substrate and dielectric for field-effect memory transistors. Three different nanofibrillated cellulose membranes (NFC) were used as the dielectric layer of the memory transistors (NFC), one with no additives, one with an added polymer PAE and one with added HCl. Gallium indium zinc oxide (GIZO) was used as the device’s semiconductor and gallium aluminium zinc oxide (GAZO) was used as the gate electrode. Fourier transform infrared spectroscopy (FTIR) was used to access the water content of the paper membranes before and after vacuum. It was found that the devices recovered their water too quickly for a difference to be noticeable in FTIR. The transistor’s electrical performance tests yielded a maximum ION/IOFF ratio of around 3,52x105 and a maximum subthreshold swing of 0,804 V/decade. The retention time of the dielectric charge that grants the transistor its memory capabilities was accessed by the measurement of the drain current periodically during 144 days. During this period the mean drain current did not lower, leaving the retention time of the device indeterminate. These results were compared with similar devices revealing these devices to be at the top tier of the state-of-the-art.

Enhanced resistive switching and multilevel behavior in bilayered HfAlO/HfAlOx structures for non-volatile memory applications

In this work, hafnium aluminum oxide (HfAlO) thin films were deposited by ion beam sputtering deposition technique on Si substrate. The presence of oxygen vacancies in the HfAlOx layer deposited in oxygen deficient environment is evidenced from the photoluminescence spectra. Furthermore, HfAlO(oxygen rich)/HfAlOx(oxygen poor) bilayer structures exhibit multilevel resistive switching (RS), and the switching ratio becomes more prominent with increasing the HfAlO layer thickness. The bilayer structure with HfAlO/HfAlOx thickness of 30/40 nm displays the enhanced multilevel resistive switching characteristics, where the high resistance state/ intermediate resistance state (IRS) and IRS/low resistance state resistance ratios are 102 and 5 105 , respectively. The switching mechanisms in the bilayer structures were investigated by the temperature dependence of the three resistance states. This study revealed that the multilevel RS is attributed to the coupling of ionic conduction and the metallic conduction, being the first associated to the formation and rupture of conductive filaments related to oxygen vacancies and the second with the formation of a metallic filament. Moreover, the bilayer structures exhibit good endurance and stability in time.

Transcranial direct current stimulation based metaplasticity protocols in working memory

It has been already shown that delivering tDCS that are spaced by an interval alters its impact on motor plasticity. These effects can be explained, based on metaplasticity in which a previous modification of activity in a neuronal network can change the effects of subsequent interventions in the same network. But to date there is limited data assessing metaplasticity effects in cognitive functioning.

A Novel Memory-centric Architecture and Organization of Processors and Computers

The modern computer systems that are in use nowadays are mostly processor-dominant, which means that their memory is treated as a slave element that has one major task – to serve execution units data requirements. This organization is based on the classical Von Neumann's computer model, proposed seven decades ago in the 1950ties. This model suffers from a substantial processor-memory bottleneck, because of the huge disparity between the processor and memory working speeds. In order to solve this problem, in this paper we propose a novel architecture and organization of processors and computers that attempts to provide stronger match between the processing and memory elements in the system. The proposed model utilizes a memory-centric architecture, wherein the execution hardware is added to the memory code blocks, allowing them to perform instructions scheduling and execution, management of data requests and responses, and direct communication with the data memory blocks without using registers. This organization allows concurrent execution of all threads, processes or program segments that fit in the memory at a given time. Therefore, in this paper we describe several possibilities for organizing the proposed memory-centric system with multiple data and logicmemory merged blocks, by utilizing a high-speed interconnection switching network.