927 resultados para Telephone switching systems, Electronic
Resumo:
A space vector-based hysteresis current controller for any general n-level three phase inverter fed induction motor drive is proposed in this study. It offers fast dynamics, inherent overload protection and low harmonic distortion for the phase voltages and currents. The controller performs online current error boundary calculations and a nearly constant switching frequency is obtained throughout the linear modulation range. The proposed scheme uses only the adjacent voltage vectors of the present sector, similar to space vector pulse-width modulation and exhibits fast dynamic behaviour under different transient conditions. The steps involved in the boundary calculation include the estimation of phase voltages from the current ripple, computation of switching time and voltage error vectors. Experimental results are given to show the performance of the drive at various speeds, effect of sudden change of the load, acceleration, speed reversal and validate the proposed advantages.
Resumo:
In this paper, a current error space vector (CESV) based hysteresis controller for a 12-sided polygonal voltage space vector inverter fed induction motor (IM) drive is proposed, for the first time. An open-end winding configuration is used for the induction motor. The proposed controller uses parabolic boundary with generalized vector selection logic for all sectors. The drive scheme is first studied with a space vector based PWM (SVPWM) control and from this the current error space phasor boundary is obtained. This current error space phasor boundary is approximated with four parabolas and then the system is run with space phasor based hysteresis PWM controller by limiting the CESV within the parabolic boundary. The proposed controller has increased modulation range, absence of 5th and 7th order harmonics for the entire modulation range, nearly constant switching frequency, fast dynamic response with smooth transition to the over modulation region and a simple controller implementation.
Resumo:
The solvent plays a decisive role in the photochemistry and photophysics of aromatic ketones. Xanthone (XT) is one such aromatic ketone and its triplet-triplet (T-T) absorption spectra show intriguing solvatochromic behavior. Also, the reactivity of XT towards H-atom abstraction shows an unprecedented decrease in protic solvents relative to aprotic solvents. Therefore, a comprehensive solvatochromic analysis of the triplet-triplet absorption spectra of XT was carried out in conjunction with time dependent density functional theory using the ad hoc explicit solvent model approach. A detailed solvatochromic analysis of the T-T absorption bands of XT suggests that the hydrogen bonding interactions are different in the corresponding triplet excited states. Furthermore, the contributions of non-specific and hydrogen bonding interactions towards differential solvation of the triplet states in protic solvents were found to be of equal magnitude. The frontier molecular orbital and electron density difference analysis of the T-1 and T-2 states of XT indicates that the charge redistribution in these states leads to intermolecular hydrogen bond strengthening and weakening, respectively, relative to the S-0 state. This is further supported by the vertical excitation energy calculations of the XT-methanol supra-molecular complex. The intermolecular hydrogen bonding potential energy curves obtained for this complex in the S-0, T-1, and T-2 states support the model. In summary, we propose that the different hydrogen bonding mechanisms exhibited by the two lowest triplet excited states of XT result in a decreasing role of the n pi* triplet state, and are thus responsible for its reduced reactivity towards H-atom abstraction in protic solvents. (C) 2016 AIP Publishing LLC.
Resumo:
The text transcript for a Jisc podcast on the business processes and systems around the electronic management of assessment (EMA). One of a series of podcasts on EMA.
Resumo:
A neural network is a highly interconnected set of simple processors. The many connections allow information to travel rapidly through the network, and due to their simplicity, many processors in one network are feasible. Together these properties imply that we can build efficient massively parallel machines using neural networks. The primary problem is how do we specify the interconnections in a neural network. The various approaches developed so far such as outer product, learning algorithm, or energy function suffer from the following deficiencies: long training/ specification times; not guaranteed to work on all inputs; requires full connectivity.
Alternatively we discuss methods of using the topology and constraints of the problems themselves to design the topology and connections of the neural solution. We define several useful circuits-generalizations of the Winner-Take-All circuitthat allows us to incorporate constraints using feedback in a controlled manner. These circuits are proven to be stable, and to only converge on valid states. We use the Hopfield electronic model since this is close to an actual implementation. We also discuss methods for incorporating these circuits into larger systems, neural and nonneural. By exploiting regularities in our definition, we can construct efficient networks. To demonstrate the methods, we look to three problems from communications. We first discuss two applications to problems from circuit switching; finding routes in large multistage switches, and the call rearrangement problem. These show both, how we can use many neurons to build massively parallel machines, and how the Winner-Take-All circuits can simplify our designs.
Next we develop a solution to the contention arbitration problem of high-speed packet switches. We define a useful class of switching networks and then design a neural network to solve the contention arbitration problem for this class. Various aspects of the neural network/switch system are analyzed to measure the queueing performance of this method. Using the basic design, a feasible architecture for a large (1024-input) ATM packet switch is presented. Using the massive parallelism of neural networks, we can consider algorithms that were previously computationally unattainable. These now viable algorithms lead us to new perspectives on switch design.
Resumo:
183 p.
Resumo:
The IGBT has become the device of choice in many high-voltage-power electronic applications, by virtue of combining the ease of MOS gate control with an acceptable forward voltage drop. However, designers have retained an interest in MOS gated thyristor structures which have a turn-off capability. These offer low on-state losses as a result of their latching behaviour. Recently, there have been various proposals for dual-gate devices that have a thyristor on-state with IGBT-like switching. Many of these dual gated structures rely on advanced MOS technology, with inherent manufacturing difficulties. The MOS and bipolar gated thyristor offers all the advantages of dual gated performance, while employing standard IGBT processing techniques. The paper describes the MBGT in detail, and presents experimental and simulation results for devices based on realistic commercial processes. It is shown that the MBGT represents a viable power semiconductor device technology, suitable for a diverse range of applications. © IEE, 1998.
Resumo:
Modeling and numerical analysis of diamond m-i-p+ diode have been performed for static and transient analysis using TCAD Sentaurus platform. The simulation results are compared with experimental measurements. Prediction of transient turn-off characteristics of diamond m-i-p+ diode at high temperature is performed for the first time. It was found that unlike conventional Si diode, peak reverse current in diamond m-i-p+ diode reduces with increasing temperature while on-state voltage drop increases. © 2011 IEEE.
Resumo:
With increasing demands on storage devices in the modern communication environment, the storage area network (SAN) has evolved to provide a direct connection allowing these storage devices to be accessed efficiently. To optimize the performance of a SAN, a three-stage hybrid electronic/optical switching node architecture based on the concept of a MPLS label switching mechanism, aimed at serving as a multi-protocol label switching (MPLS) ingress label edge router (LER) for a SAN-enabled application, has been designed. New shutter-based free-space multi-channel optical switching cores are employed as the core switch fabric to solve the packet contention and switching path conflict problems. The system-level node architecture design constraints are evaluated through self-similar traffic sourced from real gigabit Ethernet network traces and storage systems. The extension performance of a SAN over a proposed WDM ring network, aimed at serving as an MPLS-enabled transport network, is also presented and demonstrated. © 2012 OSA.
Resumo:
This paper presents the steps and the challenges for implementing analytical, physics-based models for the insulated gate bipolar transistor (IGBT) and the PIN diode in hardware and more specifically in field programmable gate arrays (FPGAs). The models can be utilised in hardware co-simulation of complex power electronic converters and entire power systems in order to reduce the simulation time without compromising the accuracy of results. Such a co-simulation allows reliable prediction of the system's performance as well as accurate investigation of the power devices' behaviour during operation. Ultimately, this will allow application-specific optimisation of the devices' structure, circuit topologies as well as enhancement of the control and/or protection schemes.
Resumo:
Tedd, L.(2006). Program: a record of the first 40 years of electronic library and information systems. Program: electronic library and information systems,40(1), 11-26.