862 resultados para Synchronous Parallel


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The Closest Vector Problem (CVP) and the Shortest Vector Problem (SVP) are prime problems in lattice-based cryptanalysis, since they underpin the security of many lattice-based cryptosystems. Despite the importance of these problems, there are only a few CVP-solvers publicly available, and their scalability was never studied. This paper presents a scalable implementation of an enumeration-based CVP-solver for multi-cores, which can be easily adapted to solve the SVP. In particular, it achieves super-linear speedups in some instances on up to 8 cores and almost linear speedups on 16 cores when solving the CVP on a 50-dimensional lattice. Our results show that enumeration-based CVP-solvers can be parallelized as effectively as enumeration-based solvers for the SVP, based on a comparison with a state of the art SVP-solver. In addition, we show that we can optimize the SVP variant of our solver in such a way that it becomes 35%-60% faster than the fastest enumeration-based SVP-solver to date.

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In previous work we have presented a model capable of generating human-like movements for a dual arm-hand robot involved in human-robot cooperative tasks. However, the focus was on the generation of reach-to-grasp and reach-to-regrasp bimanual movements and no synchrony in timing was taken into account. In this paper we extend the previous model in order to accomplish bimanual manipulation tasks by synchronously moving both arms and hands of an anthropomorphic robotic system. Specifically, the new extended model has been designed for two different tasks with different degrees of difficulty. Numerical results were obtained by the implementation of the IPOPT solver embedded in our MATLAB simulator.

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Mussel populations on the Irish Atlantic coast comprise an interbreeding mixture of the blue mussel, Mytilus edulis (L.) and the Mediterranean mussel, Mytilus galloprovincialis (Lmk.). The occurrence of hybrid genotypes varies between sites but can be as high 80%. This study compares the reproductive cycle of M. edulis, M. galloprovincialis and their hybrids to determine if the extensive hybridisation observed at Irish Atlantic coast sites is linked to spawning synchrony between the two taxa. Mussels (40-45 mm size class) were collected monthly from a sheltered shore in Galway Bay from January to December 2005. Two major spawning events (March- June and September-October) were observed and gametogenesis took place throughout the year. The spawning cycles of the three taxa were largely overlapping. Small differences were observed in the timing of peak spawning which occurred in March and October in M. galloprovincialis and in May-June and September in M.edulis. Spawning of hybrid individuals was intermediate between the parental genotypes. Fecundity was slightly higher in M. galloprovincialis females compared to the other taxa (up to 30% difference, p<0.05). This apparent advantage is not shared by the sexes and is likely being offset by high numbers of hybrid genotypes releasing gametes during peak spawning of M. galloprovincialis. There was no evidence for increased mortality in hybrid males; sex ratios did not deviate from the 1:1 ratio. The results show that in this region of the hybrid zone the timing of reproduction does not present a barrier to gene flow between M. edulis and M. galloprovincialis. Nonetheless, small differences in the timing of peak spawning may increase the likelihood of conspecific fertilisation at certain times of the year. Hybrids outnumber the parental genotypes, undergo complete gametogenesis and show no evidence of depressed fitness (i.e. hybrids are reproductively competent suggesting a high degree of introgression.

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Magdeburg, Univ., Fak. für Verfahrens- und Systemtechnik, Diss., 2012

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Magdeburg, Univ., Fak. für Verfahrens- und Systemtechnik, Diss., 2012

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Nowadays a huge attention of the academia and research teams is attracted to the potential of the usage of the 60 GHz frequency band in the wireless communications. The use of the 60GHz frequency band offers great possibilities for wide variety of applications that are yet to be implemented. These applications also imply huge implementation challenges. Such example is building a high data rate transceiver which at the same time would have very low power consumption. In this paper we present a prototype of Single Carrier -SC transceiver system, illustrating a brief overview of the baseband design, emphasizing the most important decisions that need to be done. A brief overview of the possible approaches when implementing the equalizer, as the most complex module in the SC transceiver, is also presented. The main focus of this paper is to suggest a parallel architecture for the receiver in a Single Carrier communication system. This would provide higher data rates that the communication system canachieve, for a price of higher power consumption. The suggested architecture of such receiver is illustrated in this paper,giving the results of its implementation in comparison with its corresponding serial implementation.

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Magdeburg, Univ., Fak. für Naturwiss., Diss., 2014

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Advances in computer memory technology justify research towards new and different views on computer organization. This paper proposes a novel memory-centric computing architecture with the goal to merge memory and processing elements in order to provide better conditions for parallelization and performance. The paper introduces the architectural concepts and afterwards shows the design and implementation of a corresponding assembler and simulator.

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This paper shows how a high level matrix programming language may be used to perform Monte Carlo simulation, bootstrapping, estimation by maximum likelihood and GMM, and kernel regression in parallel on symmetric multiprocessor computers or clusters of workstations. The implementation of parallelization is done in a way such that an investigator may use the programs without any knowledge of parallel programming. A bootable CD that allows rapid creation of a cluster for parallel computing is introduced. Examples show that parallelization can lead to important reductions in computational time. Detailed discussion of how the Monte Carlo problem was parallelized is included as an example for learning to write parallel programs for Octave.