A New Three-Phase Current Source Inverter with Flexible PWM Capability

A new three-phase current source inverter topology is presented, consisting of three single-phase bridge inverters connected in series and feeding the isolated windings of a standard three-phase induction motor. Because a current zero in one phase now does not affect the others, it enables the implementation of a wide range of current PWM patterns for the reduction and selective elimination of torque pulsations. Furthermore, this system allows for very fast control of the fundamental load current through the use of sinusoidal PWM, a method that was not possible to implement on existing inverter topologies.

A DC-link Capacitor Voltage Balancing with CMV Elimination using only the Switching State Redundancies for a Reduced Switch Count Multi-Level Inverter fed IM Drive

Common mode voltage (CMV) variations in PWM inverter-fed drives generate unwanted shaft and bearing current resulting in early motor failure. Multilevel inverters reduce this problem to some extent, with higher number of levels. But the complexity of the power circuit increases with an increase in the number of inverter voltage levels. In this paper a five-level inverter structure is proposed for open-end winding induction motor (IM) drives, by cascading only two conventional two-level and three-level inverters, with the elimination of the common mode voltage over the entire modulation range. The DC link power supply requirement is also optimized by means of DC link capacitor voltage balancing, with PWM control., using only inverter switching state redundancies. The proposed power circuit gives a simple power bits structure.

A Multilevel Inverter with Hexagonal and 12-sided Polygonal Space Vector Structure for Induction Motor Drive

This paper proposes a multilevel inverter which produces hexagonal voltage space vector structure in lower modulation region and a 12-sided polygonal space vector structure in the over-modulation region. Normal conventional multilevel inverter produces 6n +/- 1 (n=odd) harmonics in the phase voltage during over-modulation and in the extreme square wave mode operation. However, this inverter produces a 12-sided polygonal space vector location leading to the elimination of 6n 1 (n=odd) harmonics in over-modulation region extending to a final 12-step mode operation. The inverter consists of three conventional cascaded two level inverters with asymmetric dc bus voltages. The switching frequency of individual inverters is kept low throughout the modulation index. In the low speed region, hexagonal space phasor based PWM scheme and in the higher modulation region, 12-sided polygonal voltage space vector structure is used. Experimental results presented in this paper shows that the proposed converter is suitable for high power applications because of low harmonic distortion and low switching losses.

A Front end Switched Rectifier DC Source for Neutral Point Balancing of A NPC Three-Level Inverter for The Full Modulation Range

A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.

High-Frequency Current Source Inverter

The frequency range of the current source inverter (CSI) is limited by the slow commutation process in the inverter circuit. A method to reduce the commutation time and to limit the commutation capacitor voltage is proposed. A brief description of the conventional CSI and a detailed analysis of the commutation intervals of the proposed circuit are given. The experimental waveforms observed in the laboratory verify the validity of the analysis.

Probabilistic load flow for distribution systems with uncertain PV generation

Large integration of solar Photo Voltaic (PV) in distribution network has resulted in over-voltage problems. Several control techniques are developed to address over-voltage problem using Deterministic Load Flow (DLF). However, intermittent characteristics of PV generation require Probabilistic Load Flow (PLF) to introduce variability in analysis that is ignored in DLF. The traditional PLF techniques are not suitable for distribution systems and suffer from several drawbacks such as computational burden (Monte Carlo, Conventional convolution), sensitive accuracy with the complexity of system (point estimation method), requirement of necessary linearization (multi-linear simulation) and convergence problem (Gram–Charlier expansion, Cornish Fisher expansion). In this research, Latin Hypercube Sampling with Cholesky Decomposition (LHS-CD) is used to quantify the over-voltage issues with and without the voltage control algorithm in the distribution network with active generation. LHS technique is verified with a test network and real system from an Australian distribution network service provider. Accuracy and computational burden of simulated results are also compared with Monte Carlo simulations.

Microprocessor Based Sinusoidal PWM Inverter by DMA Transfer

The implementation of three-phase sinusoidal pulse-width-modulated inverter control strategy using microprocessor is discussed in this paper. To save CPU time, the DMA technique is used for transferring the switching pattern from memory to the pulse amplifier and isolation circuits of individual thyristors in the inverter bridge. The method of controlling both voltage and frequency is discussed here.

Modeling and analysis of energy quantization effects on single electron inverter performance

In this paper, for the first time, the effects of energy quantization on single electron transistor (SET) inverter performance are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantization mainly changes the Coulomb blockade region and drain current of SET devices and thus affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new analytical model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. A compact expression is developed for a novel parameter quantization threshold which is introduced for the first time in this paper. Quantization threshold explicitly defines the maximum energy quantization that an SET inverter logic circuit can withstand before its noise margin falls below a specified tolerance level. It is found that SET inverter designed with CT:CG=1/3 (where CT and CG are tunnel junction and gate capacitances, respectively) offers maximum robustness against energy quantization.

Single household domestic water heater design and control utilising PV energy: The untapped energy storage solution

Photovoltaic (PV) panels and electric domestic water heater with storage (DWH) are widely used in households in many countries. However, DWH should be explored as an energy storage mechanism before batteries when households have excess PV energy. Through a residential case study in Queensland, Australia, this paper presents a new optimized design and control solution to reduce water heating costs by utilizing existing DWH energy storage capacity and increasing PV self-consumption for water heating. The solution is produced by evaluating the case study energy profile and numerically maximizing the use of PV for DWH. A conditional probability matrix for different solar insolation and hot water usage days is developed to test the solution. Compared to other tariffs, this solution shows cost reduction from 20.8% to 63.3% This new solution could encourage solar households move to a more economical and carbon neutral water heating method.

Modified current source inverter fed induction motor drive with reduced torque pulsations

A new technique for reducing the torque pulsations in a conventional current source inverter fed induction motor drive is presented. This does not attempt to improve the current waveforms, but modifies the airgap MMF directly. This is based on the use of a motor with two sets of balanced phase windings, with a 30 electrical degree phase difference between them, and each set being fed from a conventional current source inverter. The two inverters are further connected in series so that they can operate from the same current source. As a consequence of this arrangement, the voltage rating of the components of each inverter is reduced, along with reduced torque ripple. This scheme has been experimentally verified and compared with the performance of a conventional scheme.

Microprocessor Based Sinusoidal PWM Inverter by DMA Transfer

The implementation of three-phase sinusoidal pulse-width-modulated inverter control strategy using microprocessor is discussed in this paper. To save CPU time, the DMA technique is used for transferring the switching pattern from memory to the pulse amplifier and isolation circuits of individual thyristors in the inverter bridge. The method of controlling both voltage and frequency is discussed here.

Three-level inverter fed open-end winding IM drive with common mode voltage elimination and reduced power device count

A three-level space phasor generation scheme with common mode elimination and with reduced power device count is proposed for an open end winding induction motor in this paper. The open end winding induction motor is fed by the three-level inverters from both sides. Each two level inverter is formed by cascading two two-level inverters. By sharing the bottom inverter for the two three-level inverters on either side, the power device count is reduced. The switching states with zero common mode voltage variation are selected for PWM switching so that there is no alternating common mode voltage in the pole voltages as well as in phase voltages. Only two isolated DC-links, with half the voltage rating of a conventional three-level neutral point clamped inverter, are needed for the proposed scheme.

Neutral-point balancing of neutral-point-clamped three-level inverter with a front end switched rectifier DC source for the full modulationn range

A switched rectifier DC voltage source three-level neutral-point-clamped (NPC) converter topology is proposed here to alleviate the inverter from capacitor voltage balancing in three-level drive systems. The proposed configuration requires only one DC link with a voltage of half of that needed in a conventional NPC inverter. To obtain a rated DC link voltage, the rectifier DC source is alternately connected in parallel to one of the two series capacitors using two switches and two diodes with device voltage ratings of half the total DC bus voltage. The frequency at which the voltage source is switched is independent of the inverter and will not affect its operation since the switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two-level inverter in the lower modulation index range, thereby increasing the reliability of the drivesystem. A space-vector-based PWM scheme is used to verify this proposed topology on a laboratory system.

A Proportional plus Multiresonant Controller for Three-Phase Four-Wire High-Frequency Link Inverter

A new solution for unbalanced and nonlinear loads in terms of power circuit topology and controller structure is proposed in this paper. A three-phase four-wire high-frequency ac-link inverter is adopted to cater to such loads. Use of high-frequency transformer results in compact and light-weight systems. The fourth wire is taken out from the midpoint of the isolation transformer in order to avoid the necessity of an extra leg. This makes the converter suitable for unbalanced loads and eliminates the requirements of bulky capacitor in half-bridge inverter. The closed-loop control is carried out in stationary reference frame using proportional + multiresonant controller (three separate resonant controller for fundamental, fifth and seventh harmonic components). The limitations on improving steady-state response of harmonic resonance controllers is investigated and mitigated using a lead-lag compensator. The proposed voltage controller is used along with an inner current loop to ensure excellent performance of the power converter. Simulation studies and experimental results with 1 kVA prototype under nonlinear and unbalanced loading conditions validate the proposed scheme.

Improved switching frequency variation control of hysteresis controlled voltage source inverter-fed IM drives using current error space vector

A constant switching frequency current error space vector-based hysteresis controller for two-level voltage source inverter-fed induction motor (IM) drives is proposed in this study. The proposed controller is capable of driving the IM in the entire speed range extending to the six-step mode. The proposed controller uses the parabolic boundary, reported earlier, for vector selection in a sector, but uses simple, fast and self-adaptive sector identification logic for sector change detection in the entire modulation range. This new scheme detects the sector change using the change in direction of current error along the axes jA, jB and jC. Most of the previous schemes use an outer boundary for sector change detection. So the current error goes outside the boundary six times during sector change, in one cycle,, introducing additional fifth and seventh harmonic components in phase current. This may cause sixth harmonic torque pulsations in the motor and spread in the harmonic spectrum of phase voltage. The proposed new scheme detects the sector change fast and accurately eliminating the chance of introducing additional fifth and seventh harmonic components in phase current and provides harmonic spectrum of phase voltage, which exactly matches with that of constant switching frequency voltage-controlled space vector pulse width modulation (VC-SVPWM)-based two-level inverter-fed drives.