980 resultados para Inverter, hysteresis current control, random pulse width modulation
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Työssä esiteltävä laite on osa DC-AC hakkuria, jolla muodostetaan 750 V tasajännitteestä yksivaiheista (230 VRMS, 50 Hz) galvaanisesti erotettua verkkojännitettä. Tasajännite muunnetaan resonanssikonvertterilla korkeataajuiseksi vaihtojännitteeksi, joka johdetaan erotusmuuntajaan. Galvaanisen erotuksen jälkeen korkeataajuisesta vaihtojännitteestä muodostetaan suoraan verkkotaajuista vaihtojännitettä työssä esiteltävällä syklokonvertterilla. Suunnittelussa on pyritty minimoimaan häviöt mahdollisimman tarkkaan, jotta laite olisi kilpailukykyinen ei-galvaanisesti erottavien konverttereiden kanssa. Tämä on toteutettu käyttämällä mahdollisimman vähän komponentteja virran kulkureitillä sekä soveltamalla pehmeää kytkentää kaikissa tilanteissa. Lopuksi esitellään prototyyppi, jonka tarkoitus oli selvittää laitteen toiminta ja ongelmakohdat käytännössä.
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This work analyzes an active fuzzy logic control system in a Rijke type pulse combustor. During the system development, a study of the existing types of control for pulse combustion was carried out and a simulation model was implemented to be used with the package Matlab and Simulink. Blocks which were not available in the simulator library were developed. A fuzzy controller was developed and its membership functions and inference rules were established. The obtained simulation showed that fuzzy logic is viable in the control of combustion instabilities. The obtained results indicated that the control system responded to pulses in an efficient and desirable way. It was verified that the system needed approximately 0.2 s to increase the tube internal pressure from 30 to 90 mbar, with an assumed total delay of 2 ms. The effects of delay variation were studied. Convergence was always obtained and general performance was not affected by the delay. The controller sends a pressure signal in phase with the Rijke tube internal pressure signal, through the speakers, when an increase the oscillations pressure amplitude is desired. On the other hand, when a decrease of the tube internal pressure amplitude is desired, the controller sends a signal 180º out of phase.
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Pulssinleveysmoduloidun vaihtosuuntaajan hyötysuhteen parantaminen ja kytkentätaajuuden suurentaminen ovat johtaneet lähtöjännitteen suuritaajuiseen taajuussisältöön kaksitasoisessa, jännitevälipiirillisessä taajuusmuuttajatopologiassa. Kasvava tarve siirtää tehoa myös verkkoon päin on lisännyt aktiivisen verkkosillan käyttöä. Kaksitasoisen aktiivisen verkkosillan vaikutuksesta DC-välipiirin keskipisteen ja kolmivaiheisen kuorman tähtipisteen välinen jännite on nollasta poikkeava aiheuttaen suurentuneen yhteismuotoisen jännitteen taajuusmuuttajan lähtöön ja verkon puolelle. Lisäksi yhteismuotoisten jännitteiden aiheuttamat kytkentätaajuiset häiriövirrat voivat aiheuttaa vikavirtasuojien tahatonta laukeamista, vaikeuttaa EMC-standardien vaatimusten täyttämistä, lisätä moottorin käämieristyksien rasitusta ja mahdollisuutta moottorin laakerivaurioille. Diplomityössä tutkitaan aktiivisen ja passiivisen verkkosillan tuottamaa yhteismuotoista jännitettä simuloinneilla. Esitellään aikaisempaa tutkimustietoa yhteismuotoisen jännitteen ja virran vaimennusratkaisuista aktiivista verkkosiltaa käytettäessä. Tutkimustiedon pohjalta suunnitellaan koelaitteistolle soveltuva suodin. Suotimen toiminta testataan simuloinnein sekä kokeellisin mittauksin. Tehdyt mittaukset osoittavat, että suunniteltu suodin vaimentaa yhteismuotoista jännitettä noin 20 dB verkkosillan kytkentätaajuudella ja tämän jälkeen yli 20 dB/dekadi taajuuteen 100 kHz asti. Lisäksi yhteismuotoisen virran suuruus syöttökaapelin kautta pieneni ehdotetun suotimen vaikutuksesta.
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A model for the study of hysteresis and avalanches in a first-order phase transition from a single variant phase to a multivariant phase is presented. The model is based on a modification of the random-field Potts model with metastable dynamics by adding a dipolar interaction term truncated at nearest neighbors. We focus our study on hysteresis loop properties, on the three-dimensional microstructure formation, and on avalanche statistics.
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We present a dynamic causal model that can explain context-dependent changes in neural responses, in the rat barrel cortex, to an electrical whisker stimulation at different frequencies. Neural responses were measured in terms of local field potentials. These were converted into current source density (CSD) data, and the time series of the CSD sink was extracted to provide a time series response train. The model structure consists of three layers (approximating the responses from the brain stem to the thalamus and then the barrel cortex), and the latter two layers contain nonlinearly coupled modules of linear second-order dynamic systems. The interaction of these modules forms a nonlinear regulatory system that determines the temporal structure of the neural response amplitude for the thalamic and cortical layers. The model is based on the measured population dynamics of neurons rather than the dynamics of a single neuron and was evaluated against CSD data from experiments with varying stimulation frequency (1–40 Hz), random pulse trains, and awake and anesthetized animals. The model parameters obtained by optimization for different physiological conditions (anesthetized or awake) were significantly different. Following Friston, Mechelli, Turner, and Price (2000), this work is part of a formal mathematical system currently being developed (Zheng et al., 2005) that links stimulation to the blood oxygen level dependent (BOLD) functional magnetic resonance imaging (fMRI) signal through neural activity and hemodynamic variables. The importance of the model described here is that it can be used to invert the hemodynamic measurements of changes in blood flow to estimate the underlying neural activity.
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This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.
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An electronic ballast for multiple tubular fluorescent lamp systems is presented. The proposed structure has a high value for the power factor, a dimming capability, and soft switching of the semiconductor devices operated at high frequencies. A zero-current switching pulse width modulated SEPIC converter is used as the rectifying stage and it is controlled using the instantaneous average input current technique. The inverting stage consists of classical resonant half-bridge converter with series-resonant parallel-loaded filters. The dimming control technique is based on varying the switching frequency and monitoring the phase shift of the current drained by the filters and lamps in order to establish a closed loop control. Experimental results are presented that validate the theoretical analysis.
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This work analyzes an active fuzzy logic control system in a Rijke type pulse combustor. During the system development, a study of the existing types of control for pulse combustion was carried out and a simulation model was implemented to be used with the package Matlab and Simulink. Blocks which were not available in the simulator library were developed. A fuzzy controller was developed and its membership functions and inference rules were established. The obtained simulation showed that fuzzy logic is viable in the control of combustion instabilities. The obtained results indicated that the control system responded to pulses in an efficient and desirable way. It was verified that the system needed approximately 0.2 s to increase the tube internal pressure from 30 to 90 mbar, with an assumed total delay of 2 ms. The effects of delay variation were studied. Convergence was always obtained and general performance was not affected by the delay. The controller sends a pressure signal in phase with the Rijke tube internal pressure signal, through the speakers, when an increase the oscillations pressure amplitude is desired. On the other hand, when a decrease of the tube internal pressure amplitude is desired, the controller sends a signal 180° out of phase.
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In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. The proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. Finally, the proposed control strategy is verified through experimental results from an implemented prototype. ©2008 IEEE.
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Voltage source inverters use large electrolytic capacitors in order to decouple the energy between the utility and the load, keeping the DC link voltage constant. Decreasing the capacitance reduces the distortion in the inverter input current but this also affects the load with low-order harmonics and generate disturbances at the input voltage. This paper applies the P+RES controller to solve the challenge of regulating the output current by means of controlling the magnitude of the current space vector, keeping it constant thus rejecting harmonic disturbances that would otherwise propagate to the load. This work presents a discussion of the switching and control strategy. © 2011 IEEE.
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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
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A new conversion structure for three-phase grid-connected photovoltaic (PV) generation plants is presented and discussed in this Thesis. The conversion scheme is based on two insulated PV arrays, each one feeding the dc bus of a standard 2-level three-phase voltage source inverter (VSI). Inverters are connected to the grid by a traditional three-phase transformer having open-end windings at inverters side and either star or delta connection at the grid side. The resulting conversion structure is able to perform as a multilevel VSI, equivalent to a 3-level inverter, doubling the power capability of a single VSI with given voltage and current ratings. Different modulation schemes able to generate proper multilevel voltage waveforms have been discussed and compared. They include known algorithms, some their developments, and new original approaches. The goal was to share the grid power with a given ratio between the two VSI within each cycle period of the PWM, being the PWM pattern suitable for the implementation in industrial DSPs. It has been shown that an extension of the modulation methods for standard two-level inverter can provide a elegant solution for dual two-level inverter. An original control method has been introduced to regulate the dc-link voltages of each VSI, according to the voltage reference given by a single MPPT controller. A particular MPPT algorithm has been successfully tested, based on the comparison of the operating points of the two PV arrays. The small deliberately introduced difference between two operating dc voltages leads towards the MPP in a fast and accurate manner. Either simulation or experimental tests, or even both, always accompanied theoretical developments. For the simulation, the Simulink tool of Matlab has been adopted, whereas the experiments have been carried out by a full-scale low-voltage prototype of the whole PV generation system. All the research work was done at the Lab of the Department of Electrical Engineering, University of Bologna.
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Polylactide (PLA) is a biodegradable polymer that has been used in particle form for drug release, due to its biocompatibility, tailorable degradation kinetics, and desirable mechanical properties. Active pharmaceutical ingredients (APIs) may be either dissolved or encapsulated within these biomaterials to create micro- or nanoparticles. Delivery of an AIP within fine particles may overcome solubility or stability issues that can result in early elimination or degradation of the AIP in a hostile biological environment. Furthermore, it is a promising method for controlling the rate of drug delivery and dosage. The goal of this project is to develop a simple and cost-effective device that allows us to produce monodisperse micro- and nanocapsules with controllable size and adjustable sheath thickness on demand. To achieve this goal, we have studied the dual-capillary electrospray and pulsed electrospray. Dual-capillary electrospray has received considerable attention in recent years due to its ability to create core-shell structures in a single-step. However, it also increases the difficulty of controlling the inner and outer particle morphology, since two simultaneous flows are required. Conventional electrospraying has been mainly conducted using direct-current (DC) voltage with little control over anything but the electrical potential. In contrast, control over the input voltage waveform (i.e. pulsing) in electrospraying offers greater control over the process variables. Poly(L-lactic acid) (PLLA) microspheres and microcapsules were successfully fabricated via pulsed-DC electrospray and dual-capillary electrospray, respectively. Core shell combinations produced include: Water/PLLA, PLLA/polyethylene glycol (PEG), and oleic Acid/PLLA. In this study, we designed a novel high-voltage pulse forming network and a set of new designs for coaxial electrospray nozzles. We also investigated the effect of the pulsed voltage characteristics (e.g. pulse frequency, pulse amplitude and pulse width) on the particle’s size and uniformity. We found that pulse frequency, pulse amplitude, pulse width, and the combinations of these factors had a statistically significant effect on the particle’s size. In addition, factors such as polymer concentration, solvent type, feed flow rate, collection method, temperature, and humidity can significantly affect the size and shape of the particles formed.
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El requerimiento de proveer alta frecuencia de datos en los modernos sistema de comunicación inalámbricos resulta en complejas señales moduladas de radio-frequencia (RF) con un gran ancho de banda y alto ratio pico-promedio (PAPR). Para garantizar la linealidad del comportamiento, los amplificadores lineales de potencia comunes funcionan típicamente entre 4 y 10 dB de back-o_ desde la máxima potencia de salida, ocasionando una baja eficiencia del sistema. La eliminación y restauración de la evolvente (EER) y el seguimiento de la evolvente (ET) son dos prometedoras técnicas para resolver el problema de la eficiencia. Tanto en EER como en ET, es complicado diseñar un amplificador de potencia que sea eficiente para señales de RF de alto ancho de banda y alto PAPR. Una propuesta común para los amplificadores de potencia es incluir un convertidor de potencia de muy alta eficiencia operando a frecuencias más altas que el ancho de banda de la señal RF. En este caso, la potencia perdida del convertidor ocasionado por la alta frecuencia desaconseja su práctica cuando el ancho de banda es muy alto. La solución a este problema es el enfoque de esta disertación que presenta dos arquitecturas de amplificador evolvente: convertidor híbrido-serie con una técnica de evolvente lenta y un convertidor multinivel basado en un convertidor reductor multifase con control de tiempo mínimo. En la primera arquitectura, una topología híbrida está compuesta de una convertidor reductor conmutado y un regulador lineal en serie que trabajan juntos para ajustar la tensión de salida para seguir a la evolvente con precisión. Un algoritmo de generación de una evolvente lenta crea una forma de onda con una pendiente limitada que es menor que la pendiente máxima de la evolvente original. La salida del convertidor reductor sigue esa forma de onda en vez de la evolvente original usando una menor frecuencia de conmutación, porque la forma de onda no sólo tiene una pendiente reducida sino también un menor ancho de banda. De esta forma, el regulador lineal se usa para filtrar la forma de onda tiene una pérdida de potencia adicional. Dependiendo de cuánto se puede reducir la pendiente de la evolvente para producir la forma de onda, existe un trade-off entre la pérdida de potencia del convertidor reductor relacionada con la frecuencia de conmutación y el regulador lineal. El punto óptimo referido a la menor pérdida de potencia total del amplificador de evolvente es capaz de identificarse con la ayuda de modelo preciso de pérdidas que es una combinación de modelos comportamentales y analíticos de pérdidas. Además, se analiza el efecto en la respuesta del filtro de salida del convertidor reductor. Un filtro de dampeo paralelo extra es necesario para eliminar la oscilación resonante del filtro de salida porque el convertidor reductor opera en lazo abierto. La segunda arquitectura es un amplificador de evolvente de seguimiento de tensión multinivel. Al contrario que los convertidores que usan multi-fuentes, un convertidor reductor multifase se emplea para generar la tensión multinivel. En régimen permanente, el convertidor reductor opera en puntos del ciclo de trabajo con cancelación completa del rizado. El número de niveles de tensión es igual al número de fases de acuerdo a las características del entrelazamiento del convertidor reductor. En la transición, un control de tiempo mínimo (MTC) para convertidores multifase es novedosamente propuesto y desarrollado para cambiar la tensión de salida del convertidor reductor entre diferentes niveles. A diferencia de controles convencionales de tiempo mínimo para convertidores multifase con inductancia equivalente, el propuesto MTC considera el rizado de corriente por cada fase basado en un desfase fijo que resulta en diferentes esquemas de control entre las fases. La ventaja de este control es que todas las corrientes vuelven a su fase en régimen permanente después de la transición para que la siguiente transición pueda empezar muy pronto, lo que es muy favorable para la aplicación de seguimiento de tensión multinivel. Además, el control es independiente de la carga y no es afectado por corrientes de fase desbalanceadas. Al igual que en la primera arquitectura, hay una etapa lineal con la misma función, conectada en serie con el convertidor reductor multifase. Dado que tanto el régimen permanente como el estado de transición del convertidor no están fuertemente relacionados con la frecuencia de conmutación, la frecuencia de conmutación puede ser reducida para el alto ancho de banda de la evolvente, la cual es la principal consideración de esta arquitectura. La optimización de la segunda arquitectura para más alto anchos de banda de la evolvente es presentada incluyendo el diseño del filtro de salida, la frecuencia de conmutación y el número de fases. El área de diseño del filtro está restringido por la transición rápida y el mínimo pulso del hardware. La rápida transición necesita un filtro pequeño pero la limitación del pulso mínimo del hardware lleva el diseño en el sentido contrario. La frecuencia de conmutación del convertidor afecta principalmente a la limitación del mínimo pulso y a las pérdidas de potencia. Con una menor frecuencia de conmutación, el ancho de pulso en la transición es más pequeño. El número de fases relativo a la aplicación específica puede ser optimizado en términos de la eficiencia global. Otro aspecto de la optimización es mejorar la estrategia de control. La transición permite seguir algunas partes de la evolvente que son más rápidas de lo que el hardware puede soportar al precio de complejidad. El nuevo método de sincronización de la transición incrementa la frecuencia de la transición, permitiendo que la tensión multinivel esté más cerca de la evolvente. Ambas estrategias permiten que el convertidor pueda seguir una evolvente con un ancho de banda más alto que la limitación de la etapa de potencia. El modelo de pérdidas del amplificador de evolvente se ha detallado y validado mediante medidas. El mecanismo de pérdidas de potencia del convertidor reductor tiene que incluir las transiciones en tiempo real, lo cual es diferente del clásico modelos de pérdidas de un convertidor reductor síncrono. Este modelo estima la eficiencia del sistema y juega un papel muy importante en el proceso de optimización. Finalmente, la segunda arquitectura del amplificador de evolvente se integra con el amplificador de clase F. La medida del sistema EER prueba el ahorro de energía con el amplificador de evolvente propuesto sin perjudicar la linealidad del sistema. ABSTRACT The requirement of delivering high data rates in modern wireless communication systems results in complex modulated RF signals with wide bandwidth and high peak-to-average ratio (PAPR). In order to guarantee the linearity performance, the conventional linear power amplifiers typically work at 4 to 10 dB back-off from the maximum output power, leading to low system efficiency. The envelope elimination and restoration (EER) and envelope tracking (ET) are two promising techniques to overcome the efficiency problem. In both EER and ET, it is challenging to design efficient envelope amplifier for wide bandwidth and high PAPR RF signals. An usual approach for envelope amplifier includes a high-efficiency switching power converter operating at a frequency higher than the RF signal's bandwidth. In this case, the power loss of converter caused by high switching operation becomes unbearable for system efficiency when signal bandwidth is very wide. The solution of this problem is the focus of this dissertation that presents two architectures of envelope amplifier: a hybrid series converter with slow-envelope technique and a multilevel converter based on a multiphase buck converter with the minimum time control. In the first architecture, a hybrid topology is composed of a switched buck converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. A slow envelope generation algorithm yields a waveform with limited slew rate that is lower than the maximum slew rate of the original envelope. The buck converter's output follows this waveform instead of the original envelope using lower switching frequency, because the waveform has not only reduced slew rate but also reduced bandwidth. In this way, the linear regulator used to filter the waveform has additional power loss. Depending on how much reduction of the slew rate of envelope in order to obtain that waveform, there is a trade-off between the power loss of buck converter related to the switching frequency and the power loss of linear regulator. The optimal point referring to the lowest total power loss of this envelope amplifier is identified with the help of a precise power loss model that is a combination of behavioral and analytic loss model. In addition, the output filter's effect on the response is analyzed. An extra parallel damping filter is needed to eliminate the resonant oscillation of output filter L and C, because the buck converter operates in open loop. The second architecture is a multilevel voltage tracking envelope amplifier. Unlike the converters using multi-sources, a multiphase buck converter is employed to generate the multilevel voltage. In the steady state, the buck converter operates at complete ripple cancellation points of duty cycle. The number of the voltage levels is equal to the number of phases according the characteristics of interleaved buck converter. In the transition, a minimum time control (MTC) for multiphase converter is originally proposed and developed for changing the output voltage of buck converter between different levels. As opposed to conventional minimum time control for multiphase converter with equivalent inductance, the proposed MTC considers the current ripple of each phase based on the fixed phase shift resulting in different control schemes among the phases. The advantage of this control is that all the phase current return to the steady state after the transition so that the next transition can be triggered very soon, which is very favorable for the application of multilevel voltage tracking. Besides, the control is independent on the load condition and not affected by the unbalance of phase current. Like the first architecture, there is also a linear stage with the same function, connected in series with the multiphase buck converter. Since both steady state and transition state of the converter are not strongly related to the switching frequency, it can be reduced for wide bandwidth envelope which is the main consideration of this architecture. The optimization of the second architecture for wider bandwidth envelope is presented including the output filter design, switching frequency and the number of phases. The filter design area is restrained by fast transition and the minimum pulse of hardware. The fast transition needs small filter but the minimum pulse of hardware limitation pushes the filter in opposite way. The converter switching frequency mainly affects the minimum pulse limitation and the power loss. With lower switching frequency, the pulse width in the transition is smaller. The number of phases related to specific application can be optimized in terms of overall efficiency. Another aspect of optimization is improving control strategy. Transition shift allows tracking some parts of envelope that are faster than the hardware can support at the price of complexity. The new transition synchronization method increases the frequency of transition, allowing the multilevel voltage to be closer to the envelope. Both control strategies push the converter to track wider bandwidth envelope than the limitation of power stage. The power loss model of envelope amplifier is detailed and validated by measurements. The power loss mechanism of buck converter has to include the transitions in real time operation, which is different from classical power loss model of synchronous buck converter. This model estimates the system efficiency and play a very important role in optimization process. Finally, the second envelope amplifier architecture is integrated with a Class F amplifier. EER system measurement proves the power saving with the proposed envelope amplifier without disrupting the linearity performance.