Agricultura familiar: regulamentos para as ações coletivas.

2000

Interface of chip-based capillary electrophoresis-inductively coupled plasma-atomic emission spectrometry (CE-ICP-AES)

An interface of chip-based capillary electrophoresis (CE)-inductively coupled plasma-atomic emission spectrometry (ICP-AES) that is based on cross-flow nebulization has been developed. A polydimethylsiloxane (PDMS) CE-chip with conventional cross channel layout was used. A stainless steel tube was placed orthogonal to the exit of the CE separation channel for cross flow nebulization. A supplementary flow of buffer solution at the channel exit was used to improve nebulization efficiency. Two capillaries were inserted into the CE chip near the inlet of the separation channel for sample and buffer solution injection. Syringe pumps were used to manipulate the flow rate and flow direction of the sample, buffer, and supplementary buffer solution. Peak broadening due to the shape (bulb and tube-shaped) and size of the spray chambers was studied. The smaller tube-shaped spray chamber was used because of smaller peak broadening effect due to aerosol transport. The nebulization and transport efficiency of the CE-ICP interface was approximately 10%. Ba2+ and Mg2+ ions were eluted from the CE-chip within 30 s. Resolution of the Ba2+ and Mg2+ peaks was 0.7 using the chip-based CE-ICP-AES system.

Desafios para mitigação de impactos das ações antrópicas no Cerrado.

2008

Avaliação de ações prioritárias para conservação do Bioma Caatinga.

Este documento sintetiza as informações geradas nas duas últimas décadas por várias Instituições de Pesquisa, Desenvolvimento e Ensino do Brasil, no que se refere a elaboração de um diagnóstico do quadro natural e agrossocioeconômico deste tão importante ecossistema.

Generic Architecture and Semiconductor Intellectual Property Cores for Avanced Encryption Standard Cryptography

A generic architecture for implementing the advanced encryption standard (AES) encryption algorithm in silicon is proposed. This allows the instantiation of a wide range of chip specifications, with these taking the form of semiconductor intellectual property (IP) cores. Cores implemented from this architecture can perform both encryption and decryption and support four modes of operation: (i) electronic codebook mode; (ii) output feedback mode; (iii) cipher block chaining mode; and (iv) ciphertext feedback mode. Chip designs can also be generated to cover all three AES key lengths, namely 128 bits, 192 bits and 256 bits. On-the-fly generation of the round keys required during decryption is also possible. The general, flexible and multi-functional nature of the approach described contrasts with previous designs which, to date, have been focused on specific implementations. The presented ideas are demonstrated by implementation in FPGA technology. However, the architecture and IP cores derived from this are easily migratable to other silicon technologies including ASIC and PLD and are capable of covering a wide range of modem communication systems cryptographic requirements. Moreover, the designs produced have a gate count and throughput comparable with or better than the previous one-off solutions.

Neural Network Based Attack on a Masked Implementation of AES

Masked implementations of cryptographic algorithms are often used in commercial embedded cryptographic devices to increase their resistance to side channel attacks. In this work we show how neural networks can be used to both identify the mask value, and to subsequently identify the secret key value with a single attack trace with high probability. We propose the use of a pre-processing step using principal component analysis (PCA) to significantly increase the success of the attack. We have developed a classifier that can correctly identify the mask for each trace, hence removing the security provided by that mask and reducing the attack to being equivalent to an attack against an unprotected implementation. The attack is performed on the freely available differential power analysis (DPA) contest data set to allow our work to be easily reproducible. We show that neural networks allow for a robust and efficient classification in the context of side-channel attacks.

Mértola, cultura e património: atores, ações e perspetivas para uma estratégia de desenvolvimento local

Dissertação de mest., Gestão Cultural, Faculdade de Ciências Humanas e Sociais, Univ. do Algarve, 2012