A study of the electrical and optical properties of unhydrogenated neon-sputtered amorphous silicon

Films of amorphous silicon (a-Si) were prepared by r.f. sputtering in a Ne plasma without the addition of hydrogen or a halogen. The d.c. dark electrical conductivity, he optical gap and the photoconductivity of the films were investigated for a range of preparation conditions, the sputtering gas pressure, P, the target-substrate spacing, d, the self-bias voltage, Vsb, on the target and the substrate temperature, Ts. The dependence of the electrical and optical properties on these conditions showed that various combinations of P, d and Vsb, at a constant Ts, giving the same product (Pd/V sb) result in films with similar properties, provided that P, d and Vsb remain vithin a certain range. Variation of Pd/Vsb between about 0.2 and 0.8 rrTorr.cm!V varied the dark conductivity over about 4 orders of magnitude, the optical gap by 0.5 eV and the photoconductivity over 4-5 orders of magnitude. This is attributed to controlling the density-of-states distribution in the mobility gap. The temperature-dependence of photoconductivity and the photoresponse of undoped films are in support of this conclusion. Films prepared at relatively high (Pd/Vsb) values and Ts=300 ºc: exhibited low dark-conductivity and high thermal activation energy, optical gap and photoresponse, characteristic properties of a 'low density-of-states material. P-type doping with group-Ill elements (Al, B and Ga) by sputtering from a composite target or from a predoped target (B-.doped) was investigated. The systematic variation of room-temperature conductivity over many orders of magnitude and a Fermi-level shift of about 0.7 eV towards the valence-band edge suggest that substitutional doping had taken place. The effects of preparation conditions on doping efficiency were also investigated. The post-deposition annealing of undoped and doped films were studied for a temperature range from 250 ºC to 470 ºC. It was shown that annealing enhanced the doping efficiency considerably, although it had little effect on the basic material (a-Si) prepared at the optimum conditions (Pd/Vsb=0.8 mTorr.cm/V and Ts=300 $ºC). Preliminary experiments on devices imply potential applications of the present material, such as p-n and MS junctions.

Highly radiation sensitive type IA FBGs for future dosimetry applications

We have studied Co60 gamma-irradiation effect on the characteristics of Type IA fiber Bragg gratings. A record Bragg peak shift of 190 pm was observed for a grating written in Fibercore PS-1250/1500 photosensitive fiber at a radiation dose of 116 kGy. Type IA and Type I gratings show different kinetics under radiation and during post-radiation annealing, which can be used for the design of a grating based dosimetry system.

Highly radiation sensitive type IA FBGs for dosimetry applications

We have studied Co60 ionizing radiation effect on the characteristics of Type IA fiber Bragg gratings. A record Bragg peak shift of 190 pm was observed for a grating written in Fibercore PS-1250/1500 photosensitive fiber at a radiation dose of 116 kGy. Type IA and Type I gratings show different kinetics under radiation and during post-radiation annealing, which can be used for the design of a grating based dosimetry system.

Highly radiation sensitive type IA FBGs for future dosimetry applications

We have studied Co60 gamma-irradiation effect on the characteristics of Type IA fiber Bragg gratings. A record Bragg peak shift of 190 pm was observed for a grating written in Fibercore PS-1250/1500 photosensitive fiber at a radiation dose of 116 kGy. Type IA and Type I gratings show different kinetics under radiation and during post-radiation annealing, which can be used for the design of a grating based dosimetry system.

Highly radiation sensitive type IA FBGs for dosimetry applications

We have studied Co60 ionizing radiation effect on the characteristics of Type IA fiber Bragg gratings. A record Bragg peak shift of 190 pm was observed for a grating written in Fibercore PS-1250/1500 photosensitive fiber at a radiation dose of 116 kGy. Type IA and Type I gratings show different kinetics under radiation and during post-radiation annealing, which can be used for the design of a grating based dosimetry system.

Epitaxial growth and magnetic properties of half-metallic Fe3O4 on GaAs(100)

The growth and magnetic properties of epitaxial magnetite Fe3O4 on GaAs(100) have been studied by reflection high-energy electron diffraction, x-ray photoelectron spectroscopy, magneto-optical Kerr effect, and x-ray magnetic circular dichroism. The epitaxial Fe3O4 films were synthesized by in situ post growth annealing of ultrathin epitaxial Fe films at 500K in an oxygen partial pressure of 5×10−5mbar. The XMCD measurements show characteristic contributions from different sites of the ferrimagnetic magnetite unit cell, namely, Fetd3+, Feoh2+, and Feoh3+. The epitaxial relationship was found to be Fe3O4(100)⟨011⟩∕∕GaAs(100)⟨010⟩ with the unit cell of Fe3O4 rotated by 45° to match that of GaAs(100) substrate. The films show a uniaxial magnetic anisotropy in a thickness range of about 2.0–6.0nm with the easy axes along the [011] direction of the GaAs(100) substrate.

Highly sensitive type IA fiber Bragg gratings as sensors in radiation environments

Type IA fiber gratings have unusual physical properties compared with other grating types. We compare with performance characteristics of Type IA and Type I Bragg gratings exposed to the effects of Co60 gamma-irradiation. A Bragg peak shift of 190 pm was observed for Type IA gratings written in Fibercore PS-1250/1500 photosensitive fiber at a radiation dose of 116 kGy. This is the largest wavelength shift recorded to date under radiation exposure. The Type IA and Type I gratings show different kinetics under radiation and during post-radiation annealing; this can be exploited for the design of a grating based dosimetry system. © 2012 SPIE.

A III-V channel field effect transistor for non-classical CMOS: process optimisation for improved gate stack function

This thesis describes a collection of studies into the electrical response of a III-V MOS stack comprising metal/GaGdO/GaAs layers as a function of fabrication process variables and the findings of those studies. As a result of this work, areas of improvement in the gate process module of a III-V heterostructure MOSFET were identified. Compared to traditional bulk silicon MOSFET design, one featuring a III-V channel heterostructure with a high-dielectric-constant oxide as the gate insulator provides numerous benefits, for example: the insulator can be made thicker for the same capacitance, the operating voltage can be made lower for the same current output, and improved output characteristics can be achieved without reducing the channel length further. It is known that transistors composed of III-V materials are most susceptible to damage induced by radiation and plasma processing. These devices utilise sub-10 nm gate dielectric films, which are prone to contamination, degradation and damage. Therefore, throughout the course of this work, process damage and contamination issues, as well as various techniques to mitigate or prevent those have been investigated through comparative studies of III-V MOS capacitors and transistors comprising various forms of metal gates, various thicknesses of GaGdO dielectric, and a number of GaAs-based semiconductor layer structures. Transistors which were fabricated before this work commenced, showed problems with threshold voltage control. Specifically, MOSFETs designed for normally-off (VTH > 0) operation exhibited below-zero threshold voltages. With the results obtained during this work, it was possible to gain an understanding of why the transistor threshold voltage shifts as the gate length decreases and of what pulls the threshold voltage downwards preventing normally-off device operation. Two main culprits for the negative VTH shift were found. The first was radiation damage induced by the gate metal deposition process, which can be prevented by slowing down the deposition rate. The second was the layer of gold added on top of platinum in the gate metal stack which reduces the effective work function of the whole gate due to its electronegativity properties. Since the device was designed for a platinum-only gate, this could explain the below zero VTH. This could be prevented either by using a platinum-only gate, or by matching the layer structure design and the actual gate metal used for the future devices. Post-metallisation thermal anneal was shown to mitigate both these effects. However, if post-metallisation annealing is used, care should be taken to ensure it is performed before the ohmic contacts are formed as the thermal treatment was shown to degrade the source/drain contacts. In addition, the programme of studies this thesis describes, also found that if the gate contact is deposited before the source/drain contacts, it causes a shift in threshold voltage towards negative values as the gate length decreases, because the ohmic contact anneal process affects the properties of the underlying material differently depending on whether it is covered with the gate metal or not. In terms of surface contamination; this work found that it causes device-to-device parameter variation, and a plasma clean is therefore essential. This work also demonstrated that the parasitic capacitances in the system, namely the contact periphery dependent gate-ohmic capacitance, plays a significant role in the total gate capacitance. This is true to such an extent that reducing the distance between the gate and the source/drain ohmic contacts in the device would help with shifting the threshold voltages closely towards the designed values. The findings made available by the collection of experiments performed for this work have two major applications. Firstly, these findings provide useful data in the study of the possible phenomena taking place inside the metal/GaGdO/GaAs layers and interfaces as the result of chemical processes applied to it. In addition, these findings allow recommendations as to how to best approach fabrication of devices utilising these layers.

Electrical characterization of the rectifying contact between aluminium and electrodeposited poly(3-methylthiophene)

A detailed investigation both of the DC and of the AC electrical properties of the Schottky barrier formed between aluminium and electrodeposited poly(3-methylthiophene) is reported. The devices show rectification ratios up to 2 x 10(4) which can be increased further after post-metal annealing. The reverse characteristics of the devices follow predictions based on the image-force lowering of the Schottky barrier, from which the doping density can be estimated, As the forward voltage increases, the device current is limited by the bulk resistance of the polymer with some evidence for injection limitation at the gold counter-electrode at high bias. In the bulk-limited regime, the device current is thermally activated near room temperature with an activation energy in the range 0.2-0.3 eV. Below about 150 K the device current is almost independent of temperature. Capacitance-voltage plots obtained at frequencies well below the device relaxation frequency indicate the presence of two distinct acceptor states, A set of shallow acceptor states are active in forward bias and are believed to determine the bulk conductivity of the polymer. A set of deeper accepters are active only for very small forward voltages and for all reverse voltages, namely when band banding causes the Fermi energy to cross these states. The density of these deeper states is approximately an order of magnitude greater than that of the shallow states. Evidence is presented also for the influence of fabrication conditions on the formation of an insulating interfacial layer at the rectifying interface. The presence of such a layer leads to inversion at the polymer surface and a modification of the I-V characteristics.

Schottky barrier diodes from semiconducting polymers

Schottky barrier diodes based on Al/poly(3-methylthiophene)/Au have been fabricated and their electrical behaviour investigated. I-V characteristics revealed a dependence on the fabrication conditions, specifically on the time under vacuum prior to evaporation of the rectifying contact and post-metal annealing at elevated temperature. The available evidence is consistent with the formation of a thin insulating layer between the metal and the polymer following these procedures. Long periods under vacuum prior to deposition of the aluminium electrode reduced the likelihood of such a layer forming. Capacitance-voltage plots of the devices were stable to voltage cycling, so long as the forward voltage did not exceed similar to 1 V. Above this a small degree of hysteresis was observed, which is attributed to the filling/emptying of interface states or traps in the polymer.

Electrical characterization of the rectifying contact between aluminium and electrodeposited poly(3-methylthiophene)

A detailed investigation both of the DC and of the AC electrical properties of the Schottky barrier formed between aluminium and electrodeposited poly(3-methylthiophene) is reported. The devices show rectification ratios up to 2 x 10(4) which can be increased further after post-metal annealing. The reverse characteristics of the devices follow predictions based on the image-force lowering of the Schottky barrier, from which the doping density can be estimated, As the forward voltage increases, the device current is limited by the bulk resistance of the polymer with some evidence for injection limitation at the gold counter-electrode at high bias. In the bulk-limited regime, the device current is thermally activated near room temperature with an activation energy in the range 0.2-0.3 eV. Below about 150 K the device current is almost independent of temperature. Capacitance-voltage plots obtained at frequencies well below the device relaxation frequency indicate the presence of two distinct acceptor states, A set of shallow acceptor states are active in forward bias and are believed to determine the bulk conductivity of the polymer. A set of deeper accepters are active only for very small forward voltages and for all reverse voltages, namely when band banding causes the Fermi energy to cross these states. The density of these deeper states is approximately an order of magnitude greater than that of the shallow states. Evidence is presented also for the influence of fabrication conditions on the formation of an insulating interfacial layer at the rectifying interface. The presence of such a layer leads to inversion at the polymer surface and a modification of the I-V characteristics.

Schottky barrier diodes from semiconducting polymers

Schottky barrier diodes based on Al/poly(3-methylthiophene)/Au have been fabricated and their electrical behaviour investigated. I-V characteristics revealed a dependence on the fabrication conditions, specifically on the time under vacuum prior to evaporation of the rectifying contact and post-metal annealing at elevated temperature. The available evidence is consistent with the formation of a thin insulating layer between the metal and the polymer following these procedures. Long periods under vacuum prior to deposition of the aluminium electrode reduced the likelihood of such a layer forming. Capacitance-voltage plots of the devices were stable to voltage cycling, so long as the forward voltage did not exceed similar to 1 V. Above this a small degree of hysteresis was observed, which is attributed to the filling/emptying of interface states or traps in the polymer.

Effect of Post-Metallization Hydrogen Annealing on C-V Characteristic of Zirconia Grown Using Atomic Layer Deposition

Substantial amount of fixed charge present in most of the alternative gate dielectrics gives rise to large shifts in the flat-band voltage (VFB) and charge trapping and de-trapping causes hysterectic changes on voltage cycling. Both phenomena affect stable and reliable transistor operation. In this paper we have studied for the first time the effect of post-metallization hydrogen annealing on the C-V curve of MOS capacitors employing zirconia, one of the most promising gate dielectric. Samples were annealed in hydrogen ambient for up to 30 minutes at different temperatures ranging from room temperature to 400°C. C-V measurements were done after annealing at each temperature and the hysteresis width was calculated from the C-V curves. A minimum hysteresis width of ∼35 mV was observed on annealing the sample at 200°C confirming the excellent suitability of this dielectric

Effect of high temperature post-annealing on sidewalls of GaAs NWs grown by MOCVD

The sidewall facets of GaAs nanowires (NWs) were studied. It has been found that the sidewalls of GaAs NWs grown at 450 °C are {112} facets. However, the sidewalls of GaAs NWs start to become {110} during the postannealing at 650 °C for 30 min. © 2010 IEEE.