A delay model for noise-induced bi-directional switching

Many biological systems can switch between two distinct states. Once switched, the system remains stable for a period of time and may switch back to its original state. A gene network with bistability is usually required for the switching and stochastic effect in the gene expression may induce such switching. A typical bistable system allows one-directional switching, in which the switch from the low state to the high state or from the high state to the low state occurs under different conditions. It is usually difficult to enable bi-directional switching such that the two switches can occur under the same condition. Here, we present a model consisting of standard positive feedback loops and an extra negative feedback loop with a time delay to study its capability to produce bi-directional switching induced by noise. We find that the time delay in the negative feedback is critical for robust bi-directional switching and the length of delay affects its switching frequency.

Phase control of switching from positive to negative index material in a four-level atomic system

Electric and magnetic responses of the medium to the probe field are analysed in a four-level loop atomic system by taking into account the relative phase of the applied fields. An interesting phenomenon is found: under suitable conditions, a change of the refractive index from positive to negative can occur by modulating the relative phase of the applied fields. Then the medium can be switched from a positive index material to a negative index material in our scheme. In addition, a negative index material can be realized in different frequency regions by adjusting the relative phase. It may give us a convenient way to obtain the desired material with positive or negative index.

Neural network design for switching network control

A neural network is a highly interconnected set of simple processors. The many connections allow information to travel rapidly through the network, and due to their simplicity, many processors in one network are feasible. Together these properties imply that we can build efficient massively parallel machines using neural networks. The primary problem is how do we specify the interconnections in a neural network. The various approaches developed so far such as outer product, learning algorithm, or energy function suffer from the following deficiencies: long training/ specification times; not guaranteed to work on all inputs; requires full connectivity.

Alternatively we discuss methods of using the topology and constraints of the problems themselves to design the topology and connections of the neural solution. We define several useful circuits-generalizations of the Winner-Take-All circuitthat allows us to incorporate constraints using feedback in a controlled manner. These circuits are proven to be stable, and to only converge on valid states. We use the Hopfield electronic model since this is close to an actual implementation. We also discuss methods for incorporating these circuits into larger systems, neural and nonneural. By exploiting regularities in our definition, we can construct efficient networks. To demonstrate the methods, we look to three problems from communications. We first discuss two applications to problems from circuit switching; finding routes in large multistage switches, and the call rearrangement problem. These show both, how we can use many neurons to build massively parallel machines, and how the Winner-Take-All circuits can simplify our designs.

Next we develop a solution to the contention arbitration problem of high-speed packet switches. We define a useful class of switching networks and then design a neural network to solve the contention arbitration problem for this class. Various aspects of the neural network/switch system are analyzed to measure the queueing performance of this method. Using the basic design, a feasible architecture for a large (1024-input) ATM packet switch is presented. Using the massive parallelism of neural networks, we can consider algorithms that were previously computationally unattainable. These now viable algorithms lead us to new perspectives on switch design.

Properties of convergence of a class of iterative processes generated by sequences of self-mappings with applications to switched dynamic systems

This article investigates the convergence properties of iterative processes involving sequences of self-mappings of metric or Banach spaces. Such sequences are built from a set of primary self-mappings which are either expansive or non-expansive self-mappings and some of the non-expansive ones can be contractive including the case of strict contractions. The sequences are built subject to switching laws which select each active self-mapping on a certain activation interval in such a way that essential properties of boundedness and convergence of distances and iterated sequences are guaranteed. Applications to the important problem of stability of dynamic switched systems are also given.

MOS and bipolar gated thyristor: A thyristor with IGBT switching characteristics

The IGBT has become the device of choice in many high-voltage-power electronic applications, by virtue of combining the ease of MOS gate control with an acceptable forward voltage drop. However, designers have retained an interest in MOS gated thyristor structures which have a turn-off capability. These offer low on-state losses as a result of their latching behaviour. Recently, there have been various proposals for dual-gate devices that have a thyristor on-state with IGBT-like switching. Many of these dual gated structures rely on advanced MOS technology, with inherent manufacturing difficulties. The MOS and bipolar gated thyristor offers all the advantages of dual gated performance, while employing standard IGBT processing techniques. The paper describes the MBGT in detail, and presents experimental and simulation results for devices based on realistic commercial processes. It is shown that the MBGT represents a viable power semiconductor device technology, suitable for a diverse range of applications. © IEE, 1998.

Hybrid model predictive control applied to switching control of burner load for a compact marine boi

This paper discusses the application of hybrid model predictive control to control switching between different burner modes in a novel compact marine boiler design. A further purpose of the present work is to point out problems with finite horizon model predictive control applied to systems for which the optimal solution is a limit cycle. Regarding the marine boiler control the aim is to find an optimal control strategy which minimizes a trade-off between deviations in boiler pressure and water level from their respective setpoints while limiting burner switches.The approach taken is based on the Mixed Logic Dynamical framework. The whole boiler systems is modelled in this framework and a model predictive controller is designed. However to facilitate on-line implementation only a small part of the search tree in the mixed integer optimization is evaluated to find out whether a switch should occur or not. The strategy is verified on a simulation model of the compact marine boiler for control of low/high burner load switches. It is shown that even though performance is adequate for some disturbance levels it becomes deteriorated when the optimal solution is a limit cycle. Copyright © 2007 International Federation of Automatic Control All Rights Reserved.

Comparative switching behaviour of silicon transistors and practical silicon carbide transistors

The motivation for our work is to identify a space for silicon carbide (SiC) devices in the silicon (Si) world. This paper presents a detailed experimental investigation of the switching behaviour of silicon and silicon carbide transistors (a JFET and a cascode device comprising a Si-MOSFET and a SiC-JFET). The experimental method is based on a clamped inductive load chopper circuit that puts considerable stress on the device and increases the transient power dissipation. A precise comparison of switching behaviour of Si and SiC devices on similar terms is the novelty of our work. The cascode is found to be an attractive fast switching device, capable of operating in two different configurations whose switching equivalent circuits are proposed here. The effect of limited dv/dt of the Si-MOSFET on the switching of the SiC-JFET in a cascode is also critically analysed.

Free-space optoelectronic switching cores with MPLS for SANs over WDM ring networks

With increasing demands on storage devices in the modern communication environment, the storage area network (SAN) has evolved to provide a direct connection allowing these storage devices to be accessed efficiently. To optimize the performance of a SAN, a three-stage hybrid electronic/optical switching node architecture based on the concept of a MPLS label switching mechanism, aimed at serving as a multi-protocol label switching (MPLS) ingress label edge router (LER) for a SAN-enabled application, has been designed. New shutter-based free-space multi-channel optical switching cores are employed as the core switch fabric to solve the packet contention and switching path conflict problems. The system-level node architecture design constraints are evaluated through self-similar traffic sourced from real gigabit Ethernet network traces and storage systems. The extension performance of a SAN over a proposed WDM ring network, aimed at serving as an MPLS-enabled transport network, is also presented and demonstrated. © 2012 OSA.