Modelling the behavior of solder joints for wafer level SiP

Design for manufacture of system-in-package (SiP) structures is dependent on a number of physical processes that affect the final quality of the package in terms of its performance and reliability. Solder joints are key structures in a SiP and their behavior can be the critical factor in terms of reliability. This paper discusses the results from a research programme on design for manufacturing of system in package (SiP) technologies. The focus of the paper is on thermo-mechanical modelling of solder joints. This includes the behavior of the joints during testing plus some important insights into the reflow process and how physical phenomena taking place at the assembly stage can affect solder joint behavior. Finite element analysis of a numerical model of an SiP structure with various design parameters is discussed. The goal of this analysis is to identify the most promising combination of design parameters which guarantee longer lifetime of the solder joints and hence the SiP component. The parameters that were studied are the size of the package (i.e. number of solder joints per row), the presence of the underfill and/or the reinforcement as well as the thickness of the passive die. Discussion was also provided on phenomena that take place during the reflow process where the solder joints are formed. In particular, the formation of intermetallics at the solder-pad interfaces

Assessing the performance of crack detection tests for solder joints

This paper presents both modelling and experimental test data to characterise the performance of four non-destructive tests. The focus is on determining the presence and rough magnitude of thermal fatigue cracks within the solder joints for a surface mount resistor on a strip of FR4 PCB. The tests all operate by applying mechanical loads to the PCB and monitoring the strain response at the top of the resistor. The modelling results show that of the four tests investigated, three are sensitive to the presence of a crack in the joint and its magnitude. Hence these tests show promise in being able to detect cracking caused by accelerated testing. The experimental data supports these results although more validation is required.

Comparative wetting behavior of Sn-0.7Cu and Sn-0.7Cu-0.3Ni solders on Cu and Ni substrates

Electronic packaging industries are now in great challenge to find a suitable lead-free solder as an interconnection material to replace the conventional SnPb solders. Many solders such as SnCu, SnAg, SnAgCu, SnZn, SnBi have already been proposed as the replacement but none of them has reached the physical and metallurgical properties similar to the SnPb solder. However, wetting is one of the basic problems that make the lead-free solder inferior as compared to the SnPb solder. Therefore, alloying with the help of third, fourth or fifth element is the researchers' interest to improve the wetting behavior of lead-free solders. This paper describes the comparative wetting behavior of Sn-0.7Cu and Sn-0.7Cu-0.3Ni solders on Cu and Ni substrates. Wetting balance tests were performed to assess the wetting behaviors. Three different commercial fluxes namely no-clean (NC), non-activated (R) and water soluble organic acid (WS)fluxes were used to assess the wettability for three solder bath temperatures. It was found that Sn0.7Cu-03Ni solder exhibits better wettability on Cu substrate for NC and WS fluxes whereas reverse results were found for R-type flux. In the case of Ni substrate, Sn-0.7Cu-0.3Ni solder showed better wetting behavior compared to the well-known Sn-0.7Cu solder. Among the three fluxes, R-type flux showed the worst performance. Very large contact angles were documented for both solders with this flux. Higher solder bath temperature lowered the contact angles, increased the wetting forces and enhanced the wettability. Computer modeling of wetting balance test revealed that both the wetting force and meniscus height are inversely proportional to the contact angles. Modeling results also reveal that increase in solder bath depths and radiuses do not affect significantly on the wetting behavior.

Thermal-mechanical analysis of flexible substrates during lead-free solder reflow

This paper presents modeling results about the performance of flexible substrates when subjected to higher lead-free reflow temperatures. Both adhesiveless and adhesive types of polyimide substrates were studied. Finite element (FE) models of flex substrates were built, two copper tracks located in the centre of the substrate was considered. The thermal induced shear stress in the flex substrate during the lead-free reflow process was studied and the effect of the design changes including the track thickness, flex thickness, and copper width were studied. For both types of flexes, the one of most important variables for minimizing damage to the substrate is the height of the copper tracks. The height of flex and the width of copper track show less impact. Beside of the geometry effects, the increase in reflow peak temperature can also result in a significant increase in the interfacial stress between the copper track and flex. Higher stresses were identified within the adhesive flex due to the big CTE mismatch between the copper and adhesive/dielectric

High electric current density-induced interfacial reactions in micro ball grid array (μBGA) solder joints

The effect of a high electric current density on the interfacial reactions of micro ball grid array solder joints was studied at room temperature and at 150 °C. Four types of phenomena were reported. Along with electromigration-induced interfacial intermetallic compound (IMC) formation, dissolution at the Cu under bump metallization (UBM)/bond pad was also noticed. With a detailed investigation, it was found that the narrow and thin metallization at the component side produced “Joule heating” due to its higher resistance, which in turn was responsible for the rapid dissolution of the Cu UBM/bond pad near to the Cu trace. During an “electromigration test” of a solder joint, the heat generation due to Joule heating and the heat dissipation from the package should be considered carefully. When the heat dissipation fails to compete with the Joule heating, the solder joint melts and molten solder accelerates the interfacial reactions in the solder joint. The presence of a liquid phase was demonstrated from microstructural evidence of solder joints after different current stressing (ranging from 0.3 to 2 A) as well as an in situ observation. Electromigration-induced liquid state diffusion of Cu was found to be responsible for the higher growth rate of the IMC on the anode side.

Effect of 0.5 wt % Cu addition in Sn–3.5% Ag solder on the dissolution rate of Cu metallization

The dissolution of thin film under-bump-metallization (UBM) by molten solder has been one of the most serious processing problems in electronic packaging technology. Due to a higher melting temperature and a greater Sn content, a molten lead-free solder such as eutectic SnAg has a faster dissolution rate of thin film UBM than the eutectic SnPb. The work presented in this paper focuses on the role of 0.5 wt % Cu in the base Sn–3.5%Ag solder to reduce the dissolution of the Cu bond pad in ball grid array applications. We found that after 0.5 wt % Cu addition, the rate of dissolution of Cu in the molten Sn–3.5%Ag solder slows down dramatically. Systematic experimental work was carried out to understand the dissolution behavior of Cu by the molten Sn–3.5%Ag and Sn–3.5%Ag–0.5%Cu solders at 230–250 °C, for different time periods ranging from 1 to 10 min. From the curves of consumed Cu thickness, it was concluded that 0.5 wt % Cu addition actually reduces the concentration gradient at the Cu metallization/molten solder interface which reduces the driving force of dissolution. During the dissolution, excess Cu was found to precipitate out due to heterogeneous nucleation and growth of Cu6Sn5 at the solder melt/oxide interface. In turn, more Cu can be dissolved again. This process continues with time and leads to more dissolution of Cu from the bond pad than the amount expected from the solubility limit, but it occurs at a slower rate for the molten Sn–3.5%Ag–0.5%Cu solder. © 2003 American Institute of Physics.

Ultra-fine pitch stencil printing for a low cost and low temperature flip-chip assembly process

This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process

Review of methods to predict solder joint reliability under thermo-mechanical cycling

Solder joints are often the cause of failure in electronic devices, failing due to cyclic creep induced ductile fatigue. This paper will review the modelling methods available to predict the lifetime of SnPb and SnAgCu solder joints under thermo-mechanical cycling conditions such as power cycling, accelerated thermal cycling and isothermal testing, the methods do not apply to other damage mechanisms such as vibration or drop-testing. Analytical methods such as recommended by the IPC are covered, which are simple to use but limited in capability. Finite element modelling methods are reviewed, along with the necessary constitutive laws and fatigue laws for solder, these offer the most accurate predictions at the current time. Research on state-of-the-art damage mechanics methods is also presented, although these have not undergone enough experimental validation to be recommended at present

Lifetime prediction for power electronics module substrate mount-down solder interconnect

A numerical modeling method for the prediction of the lifetime of solder joints of relatively large solder area under cyclic thermal-mechanical loading conditions has been developed. The method is based on the Miner's linear damage accumulation rule and the properties of the accumulated plastic strain in front of the crack in large area solder joint. The nonlinear distribution of the damage indicator in the solder joints have been taken into account. The method has been used to calculate the lifetime of the solder interconnect in a power module under mixed cyclic loading conditions found in railway traction control applications. The results show that the solder thickness is a parameter that has a strong influence on the damage and therefore the lifetime of the solder joint while the substrate width and the thickness of the baseplate are much less important for the lifetime

Multi-physics modelling for microelectronics and microsystems - current capabilities and future challenges

At present the vast majority of Computer-Aided- Engineering (CAE) analysis calculations for microelectronic and microsystems technologies are undertaken using software tools that focus on single aspects of the physics taking place. For example, the design engineer may use one code to predict the airflow and thermal behavior of an electronic package, then another code to predict the stress in solder joints, and then yet another code to predict electromagnetic radiation throughout the system. The reason for this focus of mesh-based codes on separate parts of the governing physics is essentially due to the numerical technologies used to solve the partial differential equations, combined with the subsequent heritage structure in the software codes. Using different software tools, that each requires model build and meshing, leads to a large investment in time, and hence cost, to undertake each of the simulations. During the last ten years there has been significant developments in the modelling community around multi- physics analysis. These developments are being followed by many of the code vendors who are now providing multi-physics capabilities in their software tools. This paper illustrates current capabilities of multi-physics technology and highlights some of the future challenges

Computational approach for reliable and robust system-in-package design

A computational modelling approach integrated with optimisation and statistical methods that can aid the development of reliable and robust electronic packages and systems is presented. The design for reliability methodology is demonstrated for the design of a SiP structure. In this study the focus is on the procedure for representing the uncertainties in the package design parameters, their impact on reliability and robustness of the package design and how these can be included in the design optimisation modelling framework. The analysis of thermo-mechanical behaviour of the package is conducted using non-linear transient finite element simulations. Key system responses of interest, the fatigue life-time of the lead-free solder interconnects and warpage of the package, are predicted and used subsequently for design purposes. The design tasks are to identify the optimal SiP designs by varying several package input parameters so that the reliability and the robustness of the package are improved and in the same time specified performance criteria are also satisfied

Study of the thermal stress in a Pb-free half-bump solder joint under current stressing

The thermal stress in a Sn3.5Ag1Cu half-bump solder joint under a 3.82×108 A/m2 current stressing was analyzed using a coupled-field simulation. Substantial thermal stress accumulated around the Al-to-solder interface, especially in the Ni+(Ni,Cu)3Sn4 layer, where a maximal stress of 138 MPa was identified. The stress gradient in the Ni layer was about 1.67×1013 Pa/m, resulting in a stress migration force of 1.82×10-16 N, which is comparable to the electromigration force, 2.82×10-16 N. Dissolution of the Ni+(Ni,Cu)3Sn4 layer, void formation with cracks at the anode side, and extrusions at the cathode side were observed

Shear strength analysis of ball grid array (BGA) solder interfaces

Ball shear test is the most common test method used to assess the reliability of bond strength for ball grid array (BGA) packages. In this work, a combined experimental and numerical study was carried out to realize of BGA solder interface strength. Solder mask defined bond pads on the BGA substrate were used for BGA ball bonding. Different bond pad metallizations and solder alloys were used. Solid state aging at 150degC up to 1000 h has been carried out to change the interfacial microstructure. Cross-sectional studies of the solder-to-bond pad interfaces was conducted by scanning electron microscopy (SEM) equipped with an energy dispersive X-ray (EDX) analyzer to investigate the interfacial reaction phenomena. Ball shear tests have been carried out to obtain the mechanical strength of the solder joints and to correlate shear behaviour with the interfacial reaction products. An attempt has been taken to realize experimental findings by Finite Element Analysis (FEA). It was found that intermetallic compound (IMC) formation at the solder interface plays an important role in the BGA solder bond strength. By changing the morphology and the microchemistry of IMCs, the fracture propagation path could be changed and hence, reliability could be improved

High current density induced damage mechanisms in electronic solder joints: a state-of-the-art review

High current density induced damages such as electromigration in the on-chip interconnection /metallization of Al or Cu has been the subject of intense study over the last 40 years. Recently, because of the increasing trend of miniaturization of the electronic packaging that encloses the chip, electromigration as well as other high current density induced damages are becoming a growing concern for off-chip interconnection where low melting point solder joints are commonly used. Before long, a huge number of publications have been explored on the electromigration issue of solder joints. However, a wide spectrum of findings might confuse electronic companies/designers. Thus, a review of the high current induced damages in solder joints is timely right this moment. We have selected 6 major phenomena to review in this paper. They are (i) electromigration (mass transfer due electron bombardment), (ii) thermomigration (mass transfer due to thermal gradient), (iii) enhanced intermetallic compound growth, (iv) enhanced current crowding, (v) enhanced under bump metallisation dissolution and (vi) high Joule heating and (vii) solder melting. the damage mechanisms under high current stressing in the tiny solder joint, mentioned in the review article, are significant roadblocks to further miniaturization of electronics. Without through understanding of these failure mechanisms by experiments coupled with mathematical modeling work, further miniaturization in electronics will be jeopardized

Modelling the reliability of components on flexible substrates

The use of flexible substrates is growing in many applications such as computer peripherals, hand held devices, telecommunications, automotive, aerospace, etc. The drive to adopt flexible circuits is due to their ability to reduce size, weight, assembly time and cost of final product. they also accommodate flexibility by allowing relative movement between component parts and provide a route for three dimensional packaging. This paper will describe some of the current research results from the Flex-No-Lead project, European Commission sponsored programme. The principle aim of this project is to investigate the processing, performance and reliability of flexible substrates when subjected to new environmentally friendly, lead-free soldering technologies. This paper will discuss the impact of specific design variables on performance and reliability. In particular the paper will focus on copper track designs, substrate material, dielectric material and solder mask defined joints