953 resultados para Single phase bridge rectifier
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In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. The proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. Finally, the proposed control strategy is verified through experimental results from an implemented prototype. ©2008 IEEE.
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IIn electric drives, frequency converters are used to generatefor the electric motor the AC voltage with variable frequency and amplitude. When considering the annual sale of drives in values of money and units sold, the use of low-performance drives appears to be in predominant. These drives have tobe very cost effective to manufacture and use, while they are also expected to fulfill the harmonic distortion standards. One of the objectives has also been to extend the lifetime of the frequency converter. In a traditional frequency converter, a relatively large electrolytic DC-link capacitor is used. Electrolytic capacitors are large, heavy and rather expensive components. In many cases, the lifetime of the electrolytic capacitor is the main factor limiting the lifetime of the frequency converter. To overcome the problem, the electrolytic capacitor is replaced with a metallized polypropylene film capacitor (MPPF). The MPPF has improved properties when compared to the electrolytic capacitor. By replacing the electrolytic capacitor with a film capacitor the energy storage of the DC-linkwill be decreased. Thus, the instantaneous power supplied to the motor correlates with the instantaneous power taken from the network. This yields a continuousDC-link current fed by the diode rectifier bridge. As a consequence, the line current harmonics clearly decrease. Because of the decreased energy storage, the DC-link voltage fluctuates. This sets additional conditions to the controllers of the frequency converter to compensate the fluctuation from the supplied motor phase voltages. In this work three-phase and single-phase frequency converters with small DC-link capacitor are analyzed. The evaluation is obtained with simulations and laboratory measurements.
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The use of Field Programmable Gate Array (FPGA) for development of digital control strategies for power electronics applications has aroused a growing interest of many researchers. This interest is due to the great advantages offered by FPGA, which include: lower design effort, high performance and highly flexible prototyping. This work proposes the development and implementation of an unified one-cycle controller for boost CFP rectifier based on FPGA. This controller can be applied to a total of twelve converters, six inverters and six rectifiers defined by four single phase VSI topologies and three voltage modulation types. The topologies considered in this work are: full-bridge, interleaved full-bridge, half-bridge and interleaved half-bridge. While modulations are classified in bipolar voltage modulation (BVM), unipolar voltage modulation (UVM) and clamped voltage modulation (CVM). The proposed project is developed and prototyped using tools Matlab/Simulink® together with the DSP Builder library provided by Altera®. The proposed controller was validated with simulation and experimental results
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This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.
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This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by Field Programmable Gate Array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-vohage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a preregulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.
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A novel hybrid high power rectifier capable to achieve unity power factor is proposed in this paper. Single-phase SEPIC rectifiers are associated in parallel with each leg of three-phase 6-pulse diode rectifier resulting in a programmable input current waveform structure. In this paper it is described the principles of operation of the proposed converter with detailed simulation and experimental results. For a total harmonic distortion of the input line current (THDI) less than 2% the rated power of the SEPIC rectifiers is 33%. Therefore, power rating of the SEPIC parallel converters is a fraction of the output power, on the range of 20% to 33% of the nominal output power, making the proposed solution economically viable for high power installations, with fast pay back of the investment. Moreover, retrofits to existing installations are also possible with this proposed topology, since the parallel path can be easily controlled by integration with the already existing de-link. Experimental results are presented for a 3 kW implemented prototype, in order to verify the developed analysis.
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This paper is based on the analysis and implementation of a new drive system applied to refrigeration systems, complying with the restrictions imposed by the IEC standards (Harmonic/Flicker/EMI-Electromagnetic Interference restrictions), in order to obtain high efficiency, high power factor, reduced harmonic distortion in the input current and reduced electromagnetic interference, with excellent performance in temperature control of a refrigeration prototype system (automatic control, precision and high dynamic response). The proposal is replace the single-phase motor by a three-phase motor, in the conventional refrigeration system. In this way, a proper control technique can be applied, using a closed-loop (feedback control), that will allow an accurate adjustment of the desirable temperature. The proposed refrigeration prototype uses a 0.5Hp three-phase motor and an open (Belt-Drive) Bitzer IY type compressor. The input rectifier stage's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller for the output three-phase inverter stage has been developed using a conventional voltage-frequency control (scalar V/f control), and a simplified stator oriented Vector control, in order to verify the feasibility and performance of the proposed digital controls for continuous temperature control applied at the refrigerator prototype. ©2008 IEEE.
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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
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A new topology of the high frequency alternating current (HFAC) inverter bridge arm is proposed which comprises a coupled inductor, a switching device and an active clamp circuit. Based on it, new single-phase and threephase inverters are proposed and their operating states are analysed along with the traditional H-bridge inverter. Multiphase and multi-level isolated inverters are also developed using the HFAC bridge arm. Furthermore, based on the proposed HFAC, a front-end DC-DC converter is also developed for photovoltaic systems to demonstrate the application of the proposed HFAC converter. Simulation and experimental results from prototype converters are carried out to validate the proposed topologies which can be utilised widely in high frequency power conversion applications such as induction heating and wireless power transfer.
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In recent years, the 380V DC and 48V DC distribution systems have been extensively studied for the latest data centers. It is widely believed that the 380V DC system is a very promising candidate because of its lower cable cost compared to the 48V DC system. However, previous studies have not adequately addressed the low reliability issue with the 380V DC systems due to large amount of series connected batteries. In this thesis, a quantitative comparison for the two systems has been presented in terms of efficiency, reliability and cost. A new multi-port DC UPS with both high voltage output and low voltage output is proposed. When utility ac is available, it delivers power to the load through its high voltage output and charges the battery through its low voltage output. When utility ac is off, it boosts the low battery voltage and delivers power to the load form the battery. Thus, the advantages of both systems are combined and the disadvantages of them are avoided. High efficiency is also achieved as only one converter is working in either situation. Details about the design and analysis of the new UPS are presented. For the main AC-DC part of the new UPS, a novel bridgeless three-level single-stage AC-DC converter is proposed. It eliminates the auxiliary circuit for balancing the capacitor voltages and the two bridge rectifier diodes in previous topology. Zero voltage switching, high power factor, and low component stresses are achieved with this topology. Compared to previous topologies, the proposed converter has a lower cost, higher reliability, and higher efficiency. The steady state operation of the converter is analyzed and a decoupled model is proposed for the converter. For the battery side converter as a part of the new UPS, a ZVS bidirectional DC-DC converter based on self-sustained oscillation control is proposed. Frequency control is used to ensure the ZVS operation of all four switches and phase shift control is employed to regulate the converter output power. Detailed analysis of the steady state operation and design of the converter are presented. Theoretical, simulation, and experimental results are presented to verify the effectiveness of the proposed concepts.
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This master's thesis investigates different aspects of Dual-Active-Bridge (DAB) Converter and extends aspects further to Multi-Active-Bridges (MAB). The thesis starts with an overview of the applications of the DAB and MAB and their importance. The analytical part of the thesis includes the derivation of the peak and RMS currents, which is required for finding the losses present in the system. The power converters, considered in this thesis are DAB, Triple-Active Bridge (TAB) and Quad-Active Bridge (QAB). All the theoretical calculations are compared with the simulation results from PLECS software for identifying the correctness of the reviewed and developed theory. The Hardware-in-the-Loop (HIL) simulation is conducted for checking the control operation in real-time with the help of the RT box from the Plexim. Additionally, as in real systems digital signal processor (DSP), system-on-chip or field programmable gate array is employed for the control of the power electronic systems, and the execution of the control in the real-time simulation (RTS) conducted is performed by DSP.
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Dielectric and Raman scattering experiments were performed on polycrystalline Pb(1-x)Ba(x)TiO(3) thin films (x=0.40 and 0.60) as a function of temperature. The dielectric study on single phase compositions revealed that a diffuse-type phase transition occurred upon transformation of the cubic paraelectric to the tetragonal ferroelectric phase in all thin films, which showed a broadening of the dielectric peak. Diffusivity was found to increase with increasing barium contents in the composition range under study. In addition, the temperature dependence of Raman scattering spectra was investigated through the ferroelectric phase transition. The temperature dependence of the phonon frequencies was used to characterize the phase transitions. Raman modes persisted above the tetragonal to cubic phase transition temperature, although all optical modes should be Raman inactive. The origin of these modes was interpreted as a breakdown of the local cubic symmetry by chemical disorder. The lack of a well-defined transition temperature and the presence of broadbands in some temperature intervals above the paraferroelectric phase transition temperature suggest a diffuse-type phase transition. (C) 2008 American Institute of Physics.
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This paper presents a new methodology to estimate unbalanced harmonic distortions in a power system, based on measurements of a limited number of given sites. The algorithm utilizes evolutionary strategies (ES), a development branch of evolutionary algorithms. The problem solving algorithm herein proposed makes use of data from various power quality meters, which can either be synchronized by high technology GPS devices or by using information from a fundamental frequency load flow, what makes the overall power quality monitoring system much less costly. The ES based harmonic estimation model is applied to a 14 bus network to compare its performance to a conventional Monte Carlo approach. It is also applied to a 50 bus subtransmission network in order to compare the three-phase and single-phase approaches as well as the robustness of the proposed method. (C) 2010 Elsevier B.V. All rights reserved.
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A 10 kJ electromagnetic forming (EMF) modulator with energy recovery based on two resonant power modules, each containing a 4.5 kV/30-kA silicon controlled rectifier, a 1.11-mF capacitor bank and an energy recovery circuit, working in parallel to allow a maximum actuator discharge current amplitude and rate of 50 kA and 2 kA/mu s was successfully developed and tested. It can be plugged in standard single phase 230 V/16 A mains socket and the circuit is able to recover up to 32% of its initial energy, reducing the charging time of conventional EMF systems by up to 68%.
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Dissertação para obtenção do Grau de Mestre em Energias Renováveis – Conversão Eléctrica e Utilização Sustentáveis