Fault management techniques for systems with SRAM-based FPGAs

Las Field-Programmable Gate Arrays (FPGAs) SRAM se construyen sobre una memoria de configuración de tecnología RAM Estática (SRAM). Presentan múltiples características que las hacen muy interesantes para diseñar sistemas empotrados complejos. En primer lugar presentan un coste no-recurrente de ingeniería (NRE) bajo, ya que los elementos lógicos y de enrutado están pre-implementados (el diseño de usuario define su conexionado). También, a diferencia de otras tecnologías de FPGA, pueden ser reconfiguradas (incluso en campo) un número ilimitado de veces. Es más, las FPGAs SRAM de Xilinx soportan Reconfiguración Parcial Dinámica (DPR), la cual permite reconfigurar la FPGA sin interrumpir la aplicación. Finalmente, presentan una alta densidad de lógica, una alta capacidad de procesamiento y un rico juego de macro-bloques. Sin embargo, un inconveniente de esta tecnología es su susceptibilidad a la radiación ionizante, la cual aumenta con el grado de integración (geometrías más pequeñas, menores tensiones y mayores frecuencias). Esta es una precupación de primer nivel para aplicaciones en entornos altamente radiativos y con requisitos de alta confiabilidad. Este fenómeno conlleva una degradación a largo plazo y también puede inducir fallos instantáneos, los cuales pueden ser reversibles o producir daños irreversibles. En las FPGAs SRAM, los fallos inducidos por radiación pueden aparecer en en dos capas de arquitectura diferentes, que están físicamente superpuestas en el dado de silicio. La Capa de Aplicación (o A-Layer) contiene el hardware definido por el usuario, y la Capa de Configuración contiene la memoria de configuración y la circuitería de soporte. Los fallos en cualquiera de estas capas pueden hacer fracasar el sistema, lo cual puede ser ás o menos tolerable dependiendo de los requisitos de confiabilidad del sistema. En el caso general, estos fallos deben gestionados de alguna manera. Esta tesis trata sobre la gestión de fallos en FPGAs SRAM a nivel de sistema, en el contexto de sistemas empotrados autónomos y confiables operando en un entorno radiativo. La tesis se centra principalmente en aplicaciones espaciales, pero los mismos principios pueden aplicarse a aplicaciones terrenas. Las principales diferencias entre ambas son el nivel de radiación y la posibilidad de mantenimiento. Las diferentes técnicas para la gestión de fallos en A-Layer y C-Layer son clasificados, y sus implicaciones en la confiabilidad del sistema son analizados. Se proponen varias arquitecturas tanto para Gestores de Fallos de una capa como de doble-capa. Para estos últimos se propone una arquitectura novedosa, flexible y versátil. Gestiona las dos capas concurrentemente de manera coordinada, y permite equilibrar el nivel de redundancia y la confiabilidad. Con el objeto de validar técnicas de gestión de fallos dinámicas, se desarrollan dos diferentes soluciones. La primera es un entorno de simulación para Gestores de Fallos de C-Layer, basado en SystemC como lenguaje de modelado y como simulador basado en eventos. Este entorno y su metodología asociada permite explorar el espacio de diseño del Gestor de Fallos, desacoplando su diseño del desarrollo de la FPGA objetivo. El entorno incluye modelos tanto para la C-Layer de la FPGA como para el Gestor de Fallos, los cuales pueden interactuar a diferentes niveles de abstracción (a nivel de configuration frames y a nivel físico JTAG o SelectMAP). El entorno es configurable, escalable y versátil, e incluye capacidades de inyección de fallos. Los resultados de simulación para algunos escenarios son presentados y comentados. La segunda es una plataforma de validación para Gestores de Fallos de FPGAs Xilinx Virtex. La plataforma hardware aloja tres Módulos de FPGA Xilinx Virtex-4 FX12 y dos Módulos de Unidad de Microcontrolador (MCUs) de 32-bits de propósito general. Los Módulos MCU permiten prototipar Gestores de Fallos de C-Layer y A-Layer basados en software. Cada Módulo FPGA implementa un enlace de A-Layer Ethernet (a través de un switch Ethernet) con uno de los Módulos MCU, y un enlace de C-Layer JTAG con el otro. Además, ambos Módulos MCU intercambian comandos y datos a través de un enlace interno tipo UART. Al igual que para el entorno de simulación, se incluyen capacidades de inyección de fallos. Los resultados de pruebas para algunos escenarios son también presentados y comentados. En resumen, esta tesis cubre el proceso completo desde la descripción de los fallos FPGAs SRAM inducidos por radiación, pasando por la identificación y clasificación de técnicas de gestión de fallos, y por la propuesta de arquitecturas de Gestores de Fallos, para finalmente validarlas por simulación y pruebas. El trabajo futuro está relacionado sobre todo con la implementación de Gestores de Fallos de Sistema endurecidos para radiación. ABSTRACT SRAM-based Field-Programmable Gate Arrays (FPGAs) are built on Static RAM (SRAM) technology configuration memory. They present a number of features that make them very convenient for building complex embedded systems. First of all, they benefit from low Non-Recurrent Engineering (NRE) costs, as the logic and routing elements are pre-implemented (user design defines their connection). Also, as opposed to other FPGA technologies, they can be reconfigured (even in the field) an unlimited number of times. Moreover, Xilinx SRAM-based FPGAs feature Dynamic Partial Reconfiguration (DPR), which allows to partially reconfigure the FPGA without disrupting de application. Finally, they feature a high logic density, high processing capability and a rich set of hard macros. However, one limitation of this technology is its susceptibility to ionizing radiation, which increases with technology scaling (smaller geometries, lower voltages and higher frequencies). This is a first order concern for applications in harsh radiation environments and requiring high dependability. Ionizing radiation leads to long term degradation as well as instantaneous faults, which can in turn be reversible or produce irreversible damage. In SRAM-based FPGAs, radiation-induced faults can appear at two architectural layers, which are physically overlaid on the silicon die. The Application Layer (or A-Layer) contains the user-defined hardware, and the Configuration Layer (or C-Layer) contains the (volatile) configuration memory and its support circuitry. Faults at either layers can imply a system failure, which may be more ore less tolerated depending on the dependability requirements. In the general case, such faults must be managed in some way. This thesis is about managing SRAM-based FPGA faults at system level, in the context of autonomous and dependable embedded systems operating in a radiative environment. The focus is mainly on space applications, but the same principles can be applied to ground applications. The main differences between them are the radiation level and the possibility for maintenance. The different techniques for A-Layer and C-Layer fault management are classified and their implications in system dependability are assessed. Several architectures are proposed, both for single-layer and dual-layer Fault Managers. For the latter, a novel, flexible and versatile architecture is proposed. It manages both layers concurrently in a coordinated way, and allows balancing redundancy level and dependability. For the purpose of validating dynamic fault management techniques, two different solutions are developed. The first one is a simulation framework for C-Layer Fault Managers, based on SystemC as modeling language and event-driven simulator. This framework and its associated methodology allows exploring the Fault Manager design space, decoupling its design from the target FPGA development. The framework includes models for both the FPGA C-Layer and for the Fault Manager, which can interact at different abstraction levels (at configuration frame level and at JTAG or SelectMAP physical level). The framework is configurable, scalable and versatile, and includes fault injection capabilities. Simulation results for some scenarios are presented and discussed. The second one is a validation platform for Xilinx Virtex FPGA Fault Managers. The platform hosts three Xilinx Virtex-4 FX12 FPGA Modules and two general-purpose 32-bit Microcontroller Unit (MCU) Modules. The MCU Modules allow prototyping software-based CLayer and A-Layer Fault Managers. Each FPGA Module implements one A-Layer Ethernet link (through an Ethernet switch) with one of the MCU Modules, and one C-Layer JTAG link with the other. In addition, both MCU Modules exchange commands and data over an internal UART link. Similarly to the simulation framework, fault injection capabilities are implemented. Test results for some scenarios are also presented and discussed. In summary, this thesis covers the whole process from describing the problem of radiationinduced faults in SRAM-based FPGAs, then identifying and classifying fault management techniques, then proposing Fault Manager architectures and finally validating them by simulation and test. The proposed future work is mainly related to the implementation of radiation-hardened System Fault Managers.

Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter

En la última década la potencia instalada de energía solar fotovoltaica ha crecido una media de un 49% anual y se espera que alcance el 16%del consumo energético mundial en el año 2050. La mayor parte de estas instalaciones se corresponden con sistemas conectados a la red eléctrica y un amplio porcentaje de ellas son instalaciones domésticas o en edificios. En el mercado ya existen diferentes arquitecturas para este tipo de instalaciones, entre las que se encuentras los módulos AC. Un módulo AC consiste en un inversor, también conocido como micro-inversor, que se monta en la parte trasera de un panel o módulo fotovoltaico. Esta tecnología ofrece modularidad, redundancia y la extracción de la máxima potencia de cada panel solar de la instalación. Además, la expansión de esta tecnología posibilitará una reducción de costes asociados a las economías de escala y a la posibilidad de que el propio usuario pueda componer su propio sistema. Sin embargo, el micro-inversor debe ser capaz de proporcionar una ganancia de tensión adecuada para conectar el panel solar directamente a la red, mientras mantiene un rendimiento aceptable en un amplio rango de potencias. Asimismo, los estándares de conexión a red deber ser satisfechos y el tamaño y el tiempo de vida del micro-inversor son factores que han de tenerse siempre en cuenta. En esta tesis se propone un micro-inversor derivado de la topología “forward” controlado en el límite entre los modos de conducción continuo y discontinuo (BCM por sus siglas en inglés). El transformador de la topología propuesta mantiene la misma estructura que en el convertidor “forward” clásico y la utilización de interruptores bidireccionales en el secundario permite la conexión directa del inversor a la red. Asimismo el método de control elegido permite obtener factor de potencia cercano a la unidad con una implementación sencilla. En la tesis se presenta el principio de funcionamiento y los principales aspectos del diseño del micro-inversor propuesto. Con la idea de mantener una solución sencilla y de bajo coste, se ha seleccionado un controlador analógico que está originalmente pensado para controlar un corrector del factor de potencia en el mismo modo de conducción que el micro-inversor “forward”. La tesis presenta las principales modificaciones necesarias, con especial atención a la detección del cruce por cero de la corriente (ZCD por sus siglas en inglés) y la compatibilidad del controlador con la inclusión de un algoritmo de búsqueda del punto de máxima potencia (MPPT por sus siglas en inglés). Los resultados experimentales muestran las limitaciones de la implementación elegida e identifican al transformador como el principal contribuyente a las pérdidas del micro-inversor. El principal objetivo de esta tesis es contribuir a la aplicación de técnicas de control y diseño de sistemas multifase en micro-inversores fotovoltaicos. En esta tesis se van a considerar dos configuraciones multifase diferentes aplicadas al micro-inversor “forward” propuesto. La primera consiste en una variación con conexión paralelo-serie que permite la utilización de transformadores con una relación de vueltas baja, y por tanto bien acoplados, para conseguir una ganancia de tensión adecuada con un mejor rendimiento. Esta configuración emplea el mismo control BCM cuando la potencia extraída del panel solar es máxima. Este método de control implica que la frecuencia de conmutación se incrementa considerablemente cuando la potencia decrece, lo que compromete el rendimiento. Por lo tanto y con la intención de mantener unos bueno niveles de rendimiento ponderado, el micro-inversor funciona en modo de conducción discontinuo (DCM, por sus siglas en inglés) cuando la potencia extraía del panel solar es menor que la máxima. La segunda configuración multifase considerada en esta tesis es la aplicación de la técnica de paralelo con entrelazado. Además se han considerado dos técnicas diferentes para decidir el número de fases activas: dependiendo de la potencia continua extraída del panel solar y dependiendo de la potencia instantánea demandada por el micro-inversor. La aplicación de estas técnicas es interesante en los sistemas fotovoltaicos conectados a la red eléctrica por la posibilidad que brindan de obtener un rendimiento prácticamente plano en un amplio rango de potencia. Las configuraciones con entrelazado se controlan en DCM para evitar la necesidad de un control de corriente, lo que es importante cuando el número de fases es alto. Los núcleos adecuados para todas las configuraciones multifase consideradas se seleccionan usando el producto de áreas. Una vez seleccionados los núcleos se ha realizado un diseño detallado de cada uno de los transformadores. Con la información obtenida de los diseños y los resultados de simulación, se puede analizar el impacto que el número de transformadores utilizados tiene en el tamaño y el rendimiento de las distintas configuraciones. Los resultados de este análisis, presentado en esta tesis, se utilizan posteriormente para comparar las distintas configuraciones. Muchas otras topologías se han presentado en la literatura para abordar los diferentes aspectos a considerar en los micro-inversores, que han sido presentados anteriormente. La mayoría de estas topologías utilizan un transformador de alta frecuencia para solventar el salto de tensión y evitar problemas de seguridad y de puesta a tierra. En cualquier caso, es interesante evaluar si topologías sin aislamiento galvánico son aptas para su utilización como micro-inversores. En esta tesis se presenta una revisión de inversores con capacidad de elevar tensión, que se comparan bajo las mismas especificaciones. El objetivo es proporcionar la información necesaria para valorar si estas topologías son aplicables en los módulos AC. Las principales contribuciones de esta tesis son: • La aplicación del control BCM a un convertidor “forward” para obtener un micro-inversor de una etapa sencillo y de bajo coste. • La modificación de dicho micro-inversor con conexión paralelo-series de transformadores que permite reducir la corriente de los semiconductores y una ganancia de tensión adecuada con transformadores altamente acoplados. • La aplicación de técnicas de entrelazado y decisión de apagado de fases en la puesta en paralelo del micro-inversor “forward”. • El análisis y la comparación del efecto en el tamaño y el rendimiento del incremento del número de transformadores en las diferentes configuraciones multifase. • La eliminación de las medidas y los lazos de control de corriente en las topologías multifase con la utilización del modo de conducción discontinuo y un algoritmo MPPT sin necesidad de medida de corriente. • La recopilación y comparación bajo las mismas especificaciones de topologías inversoras con capacidad de elevar tensión, que pueden ser adecuadas para la utilización como micro-inversores. Esta tesis está estructurada en seis capítulos. El capítulo 1 presenta el marco en que se desarrolla la tesis así como el alcance de la misma. En el capítulo 2 se recopilan las topologías existentes de micro-invesores con aislamiento y aquellas sin aislamiento cuya implementación en un módulo AC es factible. Asimismo se presenta la comparación entre estas topologías bajo las mismas especificaciones. El capítulo 3 se centra en el micro-inversor “forward” que se propone originalmente en esta tesis. La aplicación de las técnicas multifase se aborda en los capítulos 4 y 5, en los que se presentan los análisis en función del número de transformadores. El capítulo está orientado a la propuesta paralelo-serie mientras que la configuración con entrelazado se analiza en el capítulo 5. Por último, en el capítulo 6 se presentan las contribuciones de esta tesis y los trabajos futuros. ABSTRACT In the last decade the photovoltaic (PV) installed power increased with an average growth of 49% per year and it is expected to cover the 16% of the global electricity consumption by 2050. Most of the installed PV power corresponds to grid-connected systems, with a significant percentage of residential installations. In these PV systems, the inverter is essential since it is the responsible of transferring into the grid the extracted power from the PV modules. Several architectures have been proposed for grid-connected residential PV systems, including the AC-module technology. An AC-module consists of an inverter, also known as micro-inverter, which is attached to a PV module. The AC-module technology offers modularity, redundancy and individual MPPT of each module. In addition, the expansion of this technology will enable the possibility of economies of scale of mass market and “plug and play” for the user, thus reducing the overall cost of the installation. However, the micro-inverter must be able to provide the required voltage boost to interface a low voltage PV module to the grid while keeping an acceptable efficiency in a wide power range. Furthermore, the quality standards must be satisfied and size and lifetime of the solutions must be always considered. In this thesis a single-stage forward micro-inverter with boundary mode operation is proposed to address the micro-inverter requirements. The transformer in the proposed topology remains as in the classic forward converter and bidirectional switches in the secondary side allows direct connection to the grid. In addition the selected control strategy allows high power factor current with a simple implementation. The operation of the topology is presented and the main design issues are introduced. With the intention to propose a simple and low-cost solution, an analog controller for a PFC operated in boundary mode is utilized. The main necessary modifications are discussed, with the focus on the zero current detection (ZCD) and the compatibility of the controller with a MPPT algorithm. The experimental results show the limitations of the selected analog controller implementation and the transformer is identified as a main losses contributor. The main objective of this thesis is to contribute in the application of control and design multiphase techniques to the PV micro-inverters. Two different multiphase configurations have been applied to the forward micro-inverter proposed in this thesis. The first one consists of a parallel-series connected variation which enables the use of low turns ratio, i.e. well coupled, transformers to achieve a proper voltage boost with an improved performance. This multiphase configuration implements BCM control at maximum load however. With this control method the switching frequency increases significantly for light load operation, thus jeopardizing the efficiency. Therefore, in order to keep acceptable weighted efficiency levels, DCM operation is selected for low power conditions. The second multiphase variation considered in this thesis is the interleaved configuration with two different phase shedding techniques: depending on the DC power extracted from the PV panel, and depending on the demanded instantaneous power. The application of interleaving techniques is interesting in PV grid-connected inverters for the possibility of flat efficiency behavior in a wide power range. The interleaved variations of the proposed forward micro-inverter are operated in DCM to avoid the current loop, which is important when the number of phases is large. The adequate transformer cores for all the multiphase configurations are selected according to the area product parameter and a detailed design of each required transformer is developed. With this information and simulation results, the impact in size and efficiency of the number of transformer used can be assessed. The considered multiphase topologies are compared in this thesis according to the results of the introduced analysis. Several other topological solutions have been proposed to solve the mentioned concerns in AC-module application. The most of these solutions use a high frequency transformer to boost the voltage and avoid grounding and safety issues. However, it is of interest to assess if the non-isolated topologies are suitable for AC-module application. In this thesis a review of transformerless step-up inverters is presented. The compiled topologies are compared using a set benchmark to provide the necessary information to assess whether non-isolated topologies are suitable for AC-module application. The main contributions of this thesis are: • The application of the boundary mode control with constant off-time to a forward converter, to obtain a simple and low-cost single-stage forward micro-inverter. • A modification of the forward micro-inverter with primary-parallel secondary-series connected transformers to reduce the current stress and improve the voltage gain with highly coupled transformers. •The application of the interleaved configuration with different phase shedding strategies to the proposed forward micro-inverter. • An analysis and comparison of the influence in size and efficiency of increasing the number of transformers in the parallel-series and interleaved multiphase configurations. • Elimination of the current loop and current measurements in the multiphase topologies by adopting DCM operation and a current sensorless MPPT. • A compilation and comparison with the same specifications of suitable non-isolated step-up inverters. This thesis is organized in six chapters. In Chapter 1 the background of single-phase PV-connected systems is discussed and the scope of the thesis is defined. Chapter 2 compiles the existing solutions for isolated micro-inverters and transformerless step-up inverters suitable for AC-module application. In addition, the most convenient non-isolated inverters are compared using a defined benchmark. Chapter 3 focuses on the originally proposed single-stage forward micro-inverter. The application of multiphase techniques is addressed in Chapter 4 and Chapter 5, and the impact in different parameters of increasing the number of phases is analyzed. In Chapter 4 an original primary-parallel secondary-series variation of the forward micro-inverter is presented, while Chapter 5 focuses on the application of the interleaved configuration. Finally, Chapter 6 discusses the contributions of the thesis and the future work.

Volumetric calibration of process vessels using digital computer techniques /

The paper describes a procedure for accurately and speedily calibrating tanks used for the chemical processing of nuclear materials. The procedure features the use of (1) precalibrated vessels certified to deliver known volumes of liquid, (2) calibrated linear measuring devices, and (3) a digital computer for manipulating data and producing printed calibration information. Calibration records of the standards are traceable to primary standards. Logic is incorporated in the computer program to accomplish curve fitting and perform the tests to accept or to reject the calibration, based on statistical, empirical, and report requirements. This logic is believed to be unique.

Macroeconomic Dynamics of Market Risk Capital Requirements and Credit Supply Interdependence

Thesis (Ph.D.)--University of Washington, 2016-06

Applying ontologies to business and systems modelling techniques and perspectives: Lessons learned

For many years in the area of business systems analysis and design, practitioners and researchers alike have been searching for some comprehensive basis on which to evaluate, compare, and engineer techniques that are promoted for use in the modelling of systems' requirements. To date, while many frameworks, factors, and facets have been forthcoming, none appear to be based on a sound theory. In light of this dilemma, over the last 10 years, attention has been devoted by researchers to the use of ontology to provide some theoretical basis for the advancement of the business systems modelling discipline. This paper outlines how we have used a particular ontology for this purpose over the last five years. In particular we have learned that the understandability and the applicability of the selected ontology must be clear for IS professionals, the results of any ontological evaluation must be tempered by economic efficiency considerations of the stakeholders involved, and ontologies may have to be focused for the business purpose and type of user involved in the modelling situation.

Statistical racing techniques for improved empirical evaluation of evolutionary algorithms

In empirical studies of Evolutionary Algorithms, it is usually desirable to evaluate and compare algorithms using as many different parameter settings and test problems as possible, in border to have a clear and detailed picture of their performance. Unfortunately, the total number of experiments required may be very large, which often makes such research work computationally prohibitive. In this paper, the application of a statistical method called racing is proposed as a general-purpose tool to reduce the computational requirements of large-scale experimental studies in evolutionary algorithms. Experimental results are presented that show that racing typically requires only a small fraction of the cost of an exhaustive experimental study.

Requirements for modelling e-business processes

Companies must not see e-Business as a panacea but instead assess the specific impact of implementing e-Business on their business from both an internal and external perspective. E-Business is promoted as being able to increase the speed of response and reduce costs locally but these benefits must be assessed for the wider business rather than as local improvements. This paper argues that any assessment must include quantitative analysis that covers the physical as well as the information flows within a business. It is noted that as business processes are e-enabled their structure does not significantly change and it is only by the use of modelling techniques that the operational impact can be ascertained. The paper reviews techniques that are appropriate for this type of analysis as well as specific modelling tools and applications. Through this review a set of requirements for e-Business process modelling is derived.

Development of real-time process control systems using formal techniques

A major application of computers has been to control physical processes in which the computer is embedded within some large physical process and is required to control concurrent physical processes. The main difficulty with these systems is their event-driven characteristics, which complicate their modelling and analysis. Although a number of researchers in the process system community have approached the problems of modelling and analysis of such systems, there is still a lack of standardised software development formalisms for the system (controller) development, particular at early stage of the system design cycle. This research forms part of a larger research programme which is concerned with the development of real-time process-control systems in which software is used to control concurrent physical processes. The general objective of the research in this thesis is to investigate the use of formal techniques in the analysis of such systems at their early stages of development, with a particular bias towards an application to high speed machinery. Specifically, the research aims to generate a standardised software development formalism for real-time process-control systems, particularly for software controller synthesis. In this research, a graphical modelling formalism called Sequential Function Chart (SFC), a variant of Grafcet, is examined. SFC, which is defined in the international standard IEC1131 as a graphical description language, has been used widely in industry and has achieved an acceptable level of maturity and acceptance. A comparative study between SFC and Petri nets is presented in this thesis. To overcome identified inaccuracies in the SFC, a formal definition of the firing rules for SFC is given. To provide a framework in which SFC models can be analysed formally, an extended time-related Petri net model for SFC is proposed and the transformation method is defined. The SFC notation lacks a systematic way of synthesising system models from the real world systems. Thus a standardised approach to the development of real-time process control systems is required such that the system (software) functional requirements can be identified, captured, analysed. A rule-based approach and a method called system behaviour driven method (SBDM) are proposed as a development formalism for real-time process-control systems.

Cryptographic techniques for personal communication systems security

The advent of personal communication systems within the last decade has depended upon the utilization of advanced digital schemes for source and channel coding and for modulation. The inherent digital nature of the communications processing has allowed the convenient incorporation of cryptographic techniques to implement security in these communications systems. There are various security requirements, of both the service provider and the mobile subscriber, which may be provided for in a personal communications system. Such security provisions include the privacy of user data, the authentication of communicating parties, the provision for data integrity, and the provision for both location confidentiality and party anonymity. This thesis is concerned with an investigation of the private-key and public-key cryptographic techniques pertinent to the security requirements of personal communication systems and an analysis of the security provisions of Second-Generation personal communication systems is presented. Particular attention has been paid to the properties of the cryptographic protocols which have been employed in current Second-Generation systems. It has been found that certain security-related protocols implemented in the Second-Generation systems have specific weaknesses. A theoretical evaluation of these protocols has been performed using formal analysis techniques and certain assumptions made during the development of the systems are shown to contribute to the security weaknesses. Various attack scenarios which exploit these protocol weaknesses are presented. The Fiat-Sharmir zero-knowledge cryptosystem is presented as an example of how asymmetric algorithm cryptography may be employed as part of an improved security solution. Various modifications to this cryptosystem have been evaluated and their critical parameters are shown to be capable of being optimized to suit a particular applications. The implementation of such a system using current smart card technology has been evaluated.

An evaluation of task analysis techniques for industrial process control

The concept of a task is fundamental to the discipline of ergonomics. Approaches to the analysis of tasks began in the early 1900's. These approaches have evolved and developed to the present day, when there is a vast array of methods available. Some of these methods are specific to particular contexts or applications, others more general. However, whilst many of these analyses allow tasks to be examined in detail, they do not act as tools to aid the design process or the designer. The present thesis examines the use of task analysis in a process control context, and in particular the use of task analysis to specify operator information and display requirements in such systems. The first part of the thesis examines the theoretical aspect of task analysis and presents a review of the methods, issues and concepts relating to task analysis. A review of over 80 methods of task analysis was carried out to form a basis for the development of a task analysis method to specify operator information requirements in industrial process control contexts. Of the methods reviewed Hierarchical Task Analysis was selected to provide such a basis and developed to meet the criteria outlined for such a method of task analysis. The second section outlines the practical application and evolution of the developed task analysis method. Four case studies were used to examine the method in an empirical context. The case studies represent a range of plant contexts and types, both complex and more simple, batch and continuous and high risk and low risk processes. The theoretical and empirical issues are drawn together and a method developed to provide a task analysis technique to specify operator information requirements and to provide the first stages of a tool to aid the design of VDU displays for process control.

The application of computerised modelling techniques in manufacturing system design

The absence of a definitive approach to the design of manufacturing systems signifies the importance of a control mechanism to ensure the timely application of relevant design techniques. To provide effective control, design development needs to be continually assessed in relation to the required system performance, which can only be achieved analytically through computer simulation. The technique providing the only method of accurately replicating the highly complex and dynamic interrelationships inherent within manufacturing facilities and realistically predicting system behaviour. Owing to the unique capabilities of computer simulation, its application should support and encourage a thorough investigation of all alternative designs. Allowing attention to focus specifically on critical design areas and enabling continuous assessment of system evolution. To achieve this system analysis needs to efficient, in terms of data requirements and both speed and accuracy of evaluation. To provide an effective control mechanism a hierarchical or multi-level modelling procedure has therefore been developed, specifying the appropriate degree of evaluation support necessary at each phase of design. An underlying assumption of the proposal being that evaluation is quick, easy and allows models to expand in line with design developments. However, current approaches to computer simulation are totally inappropriate to support the hierarchical evaluation. Implementation of computer simulation through traditional approaches is typically characterized by a requirement for very specialist expertise, a lengthy model development phase, and a correspondingly high expenditure. Resulting in very little and rather inappropriate use of the technique. Simulation, when used, is generally only applied to check or verify a final design proposal. Rarely is the full potential of computer simulation utilized to aid, support or complement the manufacturing system design procedure. To implement the proposed modelling procedure therefore the concept of a generic simulator was adopted, as such systems require no specialist expertise, instead facilitating quick and easy model creation, execution and modification, through simple data inputs. Previously generic simulators have tended to be too restricted, lacking the necessary flexibility to be generally applicable to manufacturing systems. Development of the ATOMS manufacturing simulator, however, has proven that such systems can be relevant to a wide range of applications, besides verifying the benefits of multi-level modelling.

A rule based model for the objective determination of the e-business requirements of a manufacturing organisation

The starting point of this research was the belief that manufacturing and similar industries need help with the concept of e-business, especially in assessing the relevance of possible e-business initiatives. The research hypotheses was that it should be possible to produce a systematic model that defines, at a useful level of detail, the probable e-business requirements of an organisation based on objective criteria with an accuracy of 85%-90%. This thesis describes the development and validation of such a model. A preliminary model was developed from a variety of sources, including a survey of current and planned e-business activity and representative examples of e-business material produced by e-business solution providers. The model was subject to a process of testing and refinement based on recursive case studies, with controls over the improving accuracy and stability of the model. Useful conclusions were also possible as to the relevance of e-business functions to the case study participants themselves. Techniques were evolved to synthesise the e-business requirements of an organisation and present them at a management summary level of detail. The results of applying these techniques to all the case studies used in this research were discussed. The conclusion of the research was that the case study methodology employed was successful. A model was achieved suitable for practical application in a manufacturing organisation requiring help with a requirements definition process.

Requirements-aware systems:a research agenda for RE for self-adaptive systems

Requirements are sensitive to the context in which the system-to-be must operate. Where such context is well-understood and is static or evolves slowly, existing RE techniques can be made to work well. Increasingly, however, development projects are being challenged to build systems to operate in contexts that are volatile over short periods in ways that are imperfectly understood. Such systems need to be able to adapt to new environmental contexts dynamically, but the contextual uncertainty that demands this self-adaptive ability makes it hard to formulate, validate and manage their requirements. Different contexts may demand different requirements trade-offs. Unanticipated contexts may even lead to entirely new requirements. To help counter this uncertainty, we argue that requirements for self-adaptive systems should be run-time entities that can be reasoned over in order to understand the extent to which they are being satisfied and to support adaptation decisions that can take advantage of the systems' self-adaptive machinery. We take our inspiration from the fact that explicit, abstract representations of software architectures used to be considered design-time-only entities but computational reflection showed that architectural concerns could be represented at run-time too, helping systems to dynamically reconfigure themselves according to changing context. We propose to use analogous mechanisms to achieve requirements reflection. In this paper we discuss the ideas that support requirements reflection as a means to articulate some of the outstanding research challenges.

How the web of things challenges requirements engineering

As a subset of the Internet of Things (IoT), the Web of Things (WoT) shares many characteristics with wireless sensor and actuator networks (WSANs) and ubiquitous computing systems (Ubicomp). Yet to a far greater degree than the IoT, WSANs or Ubicomp, the WoT will integrate physical and information objects, necessitating a means to model and reason about a range of context types that have hitherto received little or no attention from the RE community. RE practice is only now developing the means to support WSANs and Ubicomp system development, including faltering first steps in the representation of context. We argue that these techniques will need to be developed further, with a particular focus on rich context types, if RE is to support WoT application development. © 2012 Springer-Verlag.

Knowledge elicitation and knowledge representation in a large domain with multiple experts

This paper describes the knowledge elicitation and knowledge representation aspects of a system being developed to help with the design and maintenance of relational data bases. The size algorithmic components. In addition, the domain contains multiple experts, but any given expert's knowledge of this large domain is only partial. The paper discusses the methods and techniques used for knowledge elicitation, which was based on a "broad and shallow" approach at first, moving to a "narrow and deep" one later, and describes the models used for knowledge representation, which were based on a layered "generic and variants" approach. © 1995.