A Ku-band active transmit-array module with a horn or patch array as a signal launching/receiving device

This paper is concerned with the design of a Ku-band active transmit-array module of transistor amplifiers excited by either a pyramidal horn or a patch array Optimal distances between the active transmit array and the signal-launching:receiving device, which is either a passive corporate-fed array or a horn, are determined to maximise the power gain at a design frequency: Having established these conditions, the complete structure is investigated in terms of operational bandwidth and near-field and far-field distributions measured at the output side of the transmit array, The experimental results show that the use of a corporate-fed array as an illuminating/receiving device gives higher gain and significantly larger operational bandwidth, An explanation for this behavior is sought.

An investigation into the interference rejection capability of a linear array in a wireless communications system

The suitable use of an array antenna at the base station of a wireless communications system can result in improvement in the signal-to-interference ratio (SIR). In general, the SIR is a function of the direction of arrival of the desired signal and depends on the configuration of the array, the number of elements, and their spacing. In this paper, we consider a uniform linear array antenna and study the effect of varying the number of its elements and inter-element spacing on the SIR performance. (C) 2002 Wiley Periodicals, Inc.

Analysis of an array of monopoles with the use of a radial waveguide approach

A radial guide field matching method (RGFMM) is used to analyze a circular array antenna consisting of one active monopole surrounded by a concentric array of passive monopoles terminated in arbarary loads. An equivalent admittance matrix for this antenna system is determined to study the input admittance of the active monopole when the peripheral elements are terminated in open or short circuits. RGFMM results are compared with free-space method of moments (FS-MoM) results for a small switched-beam array a seven monopoles. Good agreement is noted. (C) 2002 Wiley Periodicals, Inc.

Microstrip circular phased array design and development using microwave antenna CAD tools

The complex design and development of a planar multilayer phased array antenna in microstrip technology can be simplified using two commercially available design tools 1) Ansoft Ensemble and 2) HP-EEsof Touchstone. In the approach presented here, Touchstone is used to design RF switches and phase shifters whose scattering parameters are incorporated in Ensemble simulations using its black box tool. Using this approach, Ensemble is able to fully analyze the performance of radiating and beamforming layers of a phased array prior to its manufacturing. This strategy is demonstrated in a design example of a 12-element linearly-polarized circular phased array operating at L band. A comparison between theoretical and experimental results of the array is demonstrated.

Investigations into a power-combining structure using a reflect array of dual-feed aperture-coupled microstrip patch antennas

This paper details an investigation of a power combiner that uses a reflect array of dual-feed aperture-coupled microstrip patch antennas and a corporate-fed dual-polarized array as a signal distributing/combining device. In this configuration, elements of the reflect array receive a linearly polarized wave and retransmit it with an orthogonal polarization using variable-length sections of microstrip lines connecting receive and transmit ports. By applying appropriate lengths of these delay lines, the array focuses the transmitted wave onto the feed array. The operation of the combiner is investigated for a small-size circular reflect array for the cases of -3 dB, -6 dB and -10 dB edge illumination by the 2 x 2-element dual-polarized array.

Interference rejection capabilities of different types of array antennas in cellular systems

The suitable use of array antennas in cellular systems results in improvement in the signal-to-interference ratio (StR), This property is the basis for introducing smart or adaptive antenna systems. in general, the SIR depends on the array configuration and is a function of the direction of the desired user and interferers. Here, the SIR performance for linear and circular arrays is analysed and compared.

A refinement calculus for logic programs

Existing refinement calculi provide frameworks for the stepwise development of imperative programs from specifications. This paper presents a refinement calculus for deriving logic programs. The calculus contains a wide-spectrum logic programming language, including executable constructs such as sequential conjunction, disjunction, and existential quantification, as well as specification constructs such as general predicates, assumptions and universal quantification. A declarative semantics is defined for this wide-spectrum language based on executions. Executions are partial functions from states to states, where a state is represented as a set of bindings. The semantics is used to define the meaning of programs and specifications, including parameters and recursion. To complete the calculus, a notion of correctness-preserving refinement over programs in the wide-spectrum language is defined and refinement laws for developing programs are introduced. The refinement calculus is illustrated using example derivations and prototype tool support is discussed.

Nondeterministic gates for photonic single-rail quantum logic

We discuss techniques for producing, manipulating, and measuring qubits encoded optically as vacuum- and single-photon states. We show that a universal set of nondeterministic gates can be constructed using linear optics and photon counting. We investigate the efficacy of a test gate given realistic detector efficiencies.

Proposta de um algoritmo GPC adaptativo com baixo custo computacional

Esta dissertação propõe um algoritmo do Controlador Preditivo Generalizado (GPC) com horizonte de controle igual a um para ser aplicado em plantas industriais com modelos variantes no tempo, simples o su ficiente para ser implementado em Controlador Lógico Programável (PLC). A solução explícita do controlador é obtida em função dos parâmetros do modelo e dos parâmetros de sintonia do GPC (horizonte nal de predição hp e o fator de supressão do sinal de controle ), além das entradas e saídas presentes e passadas. A sintonia do fator de supressão e do horizonte de previsão GPC é feita através do lugar das raízes da equação característica do sistema em malha fechada, sempre que os parâmetros do modelo da planta industrial (estável ou instável em malha aberta) forem modificados.

Neural Electrode Array Based on Aluminum: Fabrication and Characterization

A unique neural electrode design is proposed with 3 mm long shafts made from an aluminum-based substrate. The electrode is composed by 100 individualized shafts in a 10 × 10 matrix, in which each aluminum shafts are precisely machined via dicing-saw cutting programs. The result is a bulk structure of aluminum with 65 ° angle sharp tips. Each electrode tip is covered by an iridium oxide thin film layer (ionic transducer) via pulsed sputtering, that provides a stable and a reversible behavior for recording/stimulation purposes, a 40 mC/cm2 charge capacity and a 145 Ω impedance in a wide frequency range of interest (10 Hz-100 kHz). Because of the non-biocompatibility issue that characterizes aluminum, an anodization process is performed that forms an aluminum oxide layer around the aluminum substrate. The result is a passivation layer fully biocompatible that furthermore, enhances the mechanical properties by increasing the robustness of the electrode. For a successful electrode insertion, a 1.1 N load is required. The resultant electrode is a feasible alternative to silicon-based electrode solutions, avoiding the complexity of its fabrication methods and limitations, and increasing the electrode performance.

Automação e controlo de um sistema de armazenamento de bicicletas

A crescente procura da bicicleta como meio de transporte alternativo torna relevante a criação e desenvolvimento de infra-estruturas de apoio, tais como ciclovias e parques para bicicletas. Os sistemas tradicionais de parqueamento de bicicletas com recurso a correntes e cadeados não fornecem segurança nem comodidade. No entanto, começam a surgir, em várias cidades do mundo, parque automáticos onde é possível guardar uma bicicleta em segurança, protegendo-a quer das intempéries quer de actos de vandalismo. Este trabalho apresenta uma proposta para um parque automático de armazenamento de bicicletas, com recurso a caixas individualizadas que garantem a sua segurança, e também de outros bens que podem ser guardados junto da mesma, como por exemplo um capacete ou uma mochila. O sistema proposto no âmbito deste trabalho é um complemento às alternativas existentes. As vantagens apresentadas pelo sistema proposto são: a sua construção modular e personalizada; e a possibilidade de instalação num terreno plano, sem recurso a obras de construção civil. O objectivo foi criar um projecto de automação e controlo de um protótipo, com base na proposta apresentada. O projecto de automação e controlo engloba a escolha dos sensores e dos actuadores. Para o dimensionamento dos motores foi necessário recorrer a um cálculo simplificado da estrutura do robô manipulador. Foi feita a escolha dos sensores, actuadores e do controlador com base nos requisitos funcionais. A programação foi desenvolvida numa linguagem normalizada. O modelo desenvolvido poderá servir de base para um projecto multidisciplinar entre vários departamentos do Instituto e dessa cooperação poderá surgir um novo projecto optimizado para produção e de menor custo.

Codificador JPEG baseado em FPGA

O presente trabalho consiste na implementação em hardware de unidades funcionais dedicadas e optimizadas, para a realização das operações de codificação e descodificação, definidas na norma de codificação com perda Joint Photographic Experts Group (JPEG), ITU-T T.81 ISO/IEC 10918-1. Realiza-se um estudo sobre esta norma de forma a caracterizar os seus principais blocos funcionais. A finalidade deste estudo foca-se na pesquisa e na proposta de optimizações, de forma a minimizar o hardware necessário para a realização de cada bloco, de modo a que o sistema realizado obtenha taxas de compressão elevadas, minimizando a distorção obtida. A redução de hardware de cada sistema, codificador e descodificador, é conseguida à custa da manipulação das equações dos blocos Forward Discrete Cosine Transform (FDCT) e Quantificação (Q) e dos blocos Forward Discrete Cosine Transform (IDCT) e Quantificação Inversa (IQ). Com as conclusões retiradas do estudo e através da análise de estruturas conhecidas, descreveu-se cada bloco em Very-High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) e fez-se a sua síntese em Field Programmable Gate Array (FPGA). Cada sistema implementado recorre à execução de cada bloco em paralelo de forma a optimizar a codificação/descodificação. Assim, para o sistema codificador, será realizada a operação da FDCT e Quantificação sobre duas matrizes diferentes e em simultâneo. O mesmo sucede para o sistema descodificador, composto pelos blocos Quantificação Inversa e IDCT. A validação de cada bloco sintetizado é executada com recurso a vectores de teste obtidos através do estudo efectuado. Após a integração de cada bloco, verificou-se que, para imagens greyscale de referência com resolução de 256 linhas por 256 colunas, é necessário 820,5 μs para a codificação de uma imagem e 830,5 μs para a descodificação da mesma. Considerando uma frequência de trabalho de 100 MHz, processam-se aproximadamente 1200 imagens por segundo.

Microstrip antenna array for multiband dedicated short range communications systems

Dedicated Short Range Communications (DSRC) is the key enabling technology for the present and future vehicular communication for various applications, such as safety improvement and traffic jam mitigation. This paper describes the development of a microstrip antenna array for the roadside equipment of a DSRC system, whose characteristics are according with the vehicular communications standards. The proposed antenna, with circular polarization, has a wide bandwidth, enough to cover the current European DSRC 5.8 GHz band and the future 5.9 GHz band for next generation DSRC communications. (C) 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53: 2794-2796, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26394

Addressing the facilities layout design problem through constraint logic programming

One of the most difficult problems that face researchers experimenting with complex systems in real world applications is the Facility Layout Design Problem. It relies with the design and location of production lines, machinery and equipment, inventory storage and shipping facilities. In this work it is intended to address this problem through the use of Constraint Logic Programming (CLP) technology. The use of Genetic Algorithms (GA) as optimisation technique in CLP environment is also an issue addressed. The approach aims the implementation of genetic algorithm operators following the CLP paradigm.

Hybrid fuzzy Monte Carlo and logic programming model for distribution network reconfiguration in the presence of outages

This paper presents a methodology for distribution networks reconfiguration in outage presence in order to choose the reconfiguration that presents the lower power losses. The methodology is based on statistical failure and repair data of the distribution power system components and uses fuzzy-probabilistic modelling for system component outage parameters. Fuzzy membership functions of system component outage parameters are obtained by statistical records. A hybrid method of fuzzy set and Monte Carlo simulation based on the fuzzy-probabilistic models allows catching both randomness and fuzziness of component outage parameters. Once obtained the system states by Monte Carlo simulation, a logical programming algorithm is applied to get all possible reconfigurations for every system state. In order to evaluate the line flows and bus voltages and to identify if there is any overloading, and/or voltage violation a distribution power flow has been applied to select the feasible reconfiguration with lower power losses. To illustrate the application of the proposed methodology to a practical case, the paper includes a case study that considers a real distribution network.