980 resultados para Power factor corrector


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The Methods for compensation of harmonic currents and voltages have been widely used since these methods allow to reduce to acceptable levels the harmonic distortion in the voltages or currents in a power system, and also compensate reactive. The reduction of harmonics and reactive contributes to the reduction of losses in transmission lines and electrical machinery, increasing the power factor, reduce the occurrence of overvoltage and overcurrent. The active power filter is the most efficient method for compensation of harmonic currents and voltages. The active power filter is necessary to use current and voltage controllers loop. Conventionally, the current and voltage control loop of active filter has been done by proportional controllers integrative. This work, investigated the use of a robust adaptive control technique on the shunt active power filter current and voltage control loop to increase robustness and improve the performance of active filter to compensate for harmonics. The proposed control scheme is based on a combination of techniques for adaptive control pole placement and variable structure. The advantages of the proposed method over conventional ones are: lower total harmonic distortion, more flexibility, adaptability and robustness to the system. Moreover, the proposed control scheme improves the performance and improves the transient of active filter. The validation of the proposed technique was verified initially by a simulation program implemented in C++ language and then experimental results were obtained using a prototype three-phase active filter of 1 kVA

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The scarcity of natural resources and the search for alternative energy sources promote a rapid change in the energy world. Among the renewable energy sources, solar energy is the most promising, presenting technology of greatest growth rate nowadays. Researchers around the world are seeking ways to facilitate their progress, developing technologies with higher efficiency and lower cost. As a contribution to global progress, this master thesis proposes the development of a strategy of maximum power tracking based on perturbation and observation method for photovoltaic systems. The proposed control strategy is based on active power balance of the system, with a reduced number of sensors. It also allows the PV system to act as a regulator of the power quality at the point of commom coupling (PCC), compensating the harmonic distortion and power factor of the current netw

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The use of Field Programmable Gate Array (FPGA) for development of digital control strategies for power electronics applications has aroused a growing interest of many researchers. This interest is due to the great advantages offered by FPGA, which include: lower design effort, high performance and highly flexible prototyping. This work proposes the development and implementation of an unified one-cycle controller for boost CFP rectifier based on FPGA. This controller can be applied to a total of twelve converters, six inverters and six rectifiers defined by four single phase VSI topologies and three voltage modulation types. The topologies considered in this work are: full-bridge, interleaved full-bridge, half-bridge and interleaved half-bridge. While modulations are classified in bipolar voltage modulation (BVM), unipolar voltage modulation (UVM) and clamped voltage modulation (CVM). The proposed project is developed and prototyped using tools Matlab/Simulink® together with the DSP Builder library provided by Altera®. The proposed controller was validated with simulation and experimental results

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This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.

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This paper presents a new family of pulsewidth-modulated (PWM) converters, featuring soft commutation of the semiconductors at zero current (ZC) in the transistors and zero voltage (ZV) in the rectifiers, Besides operating at constant frequency and with reduced commutation losses, these new converters have output characteristics similar to the hard-switching-PWM counterpart, which means that there is no circulating reactive energy that would cause large conduction losses, the new family of zero-current-switching (ZCS)-PWM converters is suitable for high-power applications using insulated gate bipolar transistors (IGBT's). The advantages of the new ZCS-PWM boast converter employing IGBT's, rated at 1.6 kW and operating at 20 kHz, are presented, This new ZCS operation can reduce the average total power dissipation in the semiconductors practically by half, when compared with the hard-switching method, This new ZCS-PWM boost converter is suitable for high-power applications using Ie;BT's in power-factor correction, the principle of operation, theoretical analysis, and experimental results of the new ZCS-PWM boost converter are provided in this paper to verify the performance of this new family of converters.

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This work proposes a methodology to generalize the Y-connections for 12- and 18-pulse autotransformers. A single mathematical expression, obtained through simple trigonometric operations, represents all the connections. The proposed methodology allows choosing any ratio between the input and the output voltages. The converters can operate either as step-up or as step-down voltage. To simplify the design of the windings, graphics are generated to calculate the turn-ratio and the polarity of each secondary winding, with respect to the primary winding. A design example, followed by digital simulations, illustrates the presented steps. Experimental results of two prototypes (12 and 18 pulses) are presented. The results also show that high power factor is an inherent characteristic of multi-pulse converters, without any active or passive power factor pre-regulators needs. (c) 2005 Elsevier B.V. All rights reserved.

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This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

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A novel single-phase voltage source rectifier capable to achieve High-Power-Factor (HPF) for variable speed refrigeration system application, is proposed in this paper. The proposed system is composed by a single-phase high-power-factor boost rectifier, with two cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by a Field Programmable Gate Array (FPGA), associated with a conventional three-phase IGBT bridge inverter (VSI - Voltage Source Inverter), controlled by a Digital Signal Processor (DSP). The soft-switching technique for the input stage is based on zero-current-switching (ZCS) cells. The rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the EEC61000-3-2 standards. The digital controller for the output stage has been developed using a conventional voltage-frequency control (scalar V/f control), and a simplified stator oriented Vector control, in order to verify the feasibility and performance of the proposed digital controls for continuous temperature control applied at a refrigerator prototype.

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Este artigo apresenta os principais resultados e o detalhamento da metodologia e equações de controle de um retificador monofásico pré-regulador de 150kW para sistema trólebus. A estrutura proposta possibilita a Correção ativa do Fator de Potência (CFP) com baixos níveis de Distorção Harmônica Total (DHT) na corrente, em conformidade com a norma internacional IEC 61000-3-4. Fruto de um projeto de Pesquisa, Desenvolvimento e Inovação (P) junto à empresa AES Eletropaulo Metropolitana de São Paulo, em parceria com a empresa de transporte Himalaia S.A., o projeto possui como principais objetivos estimular o interesse para a expansão das linhas de trólebus a partir de uma plataforma de alimentação de menor custo de instalação e manutenção, sem a necessidade de subestações retificadoras, e, com vistas a promover a melhoria da qualidade de vida nos grandes centros urbanos. Nessa nova modalidade proposta para o sistema de alimentação, o trólebus pode ser alimentado tanto pelas redes convencionais em corrente contínua (CC) quanto pelas redes de distribuição em corrente alternada (CA), mantendo-se a disposição a dois fios dos sistemas CC, sendo as mudanças de rede de alimentação (CC ou CA) monitoradas e controladas digitalmente. Todo o sistema de gerenciamento e controle do conversor é realizado digitalmente por FPGA XC3S200. Na evolução do sistema proposto, os autores pretendem inclusive eliminar as linhas aéreas de alimentação, através da utilização de postos de alimentação em CA, especialmente desenvolvidos para os pontos de embarque/desembarque de passageiros para este veículo de transporte coletivo, eliminando-se os aspectos visuais negativos das redes de alimentação deste modal, e, reduzindo-se as falhas de operação do sistema.

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This paper is based on the development and experimental analysis of a DCM Boost interleaved converter suitable for application in traction systems of electrical vehicles pulled by electrical motors (Trolleybus), which are powered by urban DC or AC distribution networks. This front-end structure is capable of providing significant improvements in trolleybuses systems and in the urban distribution network costs, and efficiency. The architecture of proposed converter is composed by five boost power cells in interleaving connection, operating in discontinuous conduction mode. Furthermore, the converter can operate as AC-DC converter, or as DC-DC converter providing the proper DC output voltage range required by DC or AC adjustable speed drivers. Therefore, when supplied by single-phase AC distribution networks, and operating as AC-DC converter, it is capable to provide high power factor, reduced harmonic distortion in the input current, complying with the restrictions imposed by the IEC 61000-3-4 standards. The digital controller has been implemented using a low cost FPGA and developed totally using a hardware description language VHDL and fixed point arithmetic. Thus, two control strategies are evaluated considering the compliance with input current restrictions imposed by IEC 61000-3-4 standards, the regular PWM modulation and a current correction PWM modulation. In order to verify the feasibility and performance of the proposed system, experimental results from a 15 kW low power scale prototype are presented, operating in DC and AC conditions.

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Bending fatigue tests were carried out to clarify the effects of heat treatment parameters: temperature and time after cadmium electroplating on a high strength steel, to avoid hydrogen embrittlement. Temperatures heat of 190 degrees C, 230 degrees C, 250 degrees C and 300 degrees C at 3, 8 and 24 hours together with the base material electroplated, with and without heat treatment, resulted in 14 conditions studied with respect to fatigue behaviour. Statistical data analysis was performed to identify the best combination temperature/time regarding fatigue strength of the ABNT 4340 steel and the results obtained revealed that the fatigue strength depend on temperature/time conditions.

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This work proposes a methodology to generalize the A-connections for 12 and 18-pulse autotransformers. A single mathematical expression, obtained through simple trigonometric operations, represents all the connections. The proposed methodology allows choosing any ratio between the input and the output voltages. The converters can operate either as step-up or as step-down voltage. To simplify the design of the windings, graphics are generated to calculate the turn-ratio and the polarity of each secondary winding, with respect to the primary winding. A design example, followed by digital simulations, and experimental results illustrate the presented steps. The results also show that high power factor is an inherent characteristic of multi-pulse converters, without any active or passive power factor pre-regulators needs.

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An electronic ballast for multiple tubular fluorescent lamp systems is presented. The proposed structure has a high value for the power factor, a dimming capability, and soft switching of the semiconductor devices operated at high frequencies. A zero-current switching pulse width modulated SEPIC converter is used as the rectifying stage and it is controlled using the instantaneous average input current technique. The inverting stage consists of classical resonant half-bridge converter with series-resonant parallel-loaded filters. The dimming control technique is based on varying the switching frequency and monitoring the phase shift of the current drained by the filters and lamps in order to establish a closed loop control. Experimental results are presented that validate the theoretical analysis.

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This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by Field Programmable Gate Array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-vohage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a preregulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.