Analysis and design of constant-frequency peak-current-controlled high-power-factor boost rectifier with slope compensation

This paper presents the analysis and the design of a peak-current-controlled high-power-factor boost rectifier, with slope compensation, operating at constant frequency. The input current shaping is achieved, with continuous inductor current mode, with no multiplier to generate a current reference. The resulting overall circuitry is very simple, in comparison with the average-current-controlled boost rectifier. Experimental results are presented, taken from a laboratory prototype rated at 370 W and operating at 67 kHz. The measured power factor was 0.99, with a input current THD equal to 5.6%, for an input voltage THD equal to 2.26%.

New family of zero-current-switching PWM converter

A new family of dc-to-dc pulse-width-modulated (PWM) converters is presented. These converters feature soft-commutation at zero-current (ZC) in the active switches. The new ZCS-PWM Boost and new ZCS-PWM Zeta converters, both based on the new ZCS-PWM soft-commutation cell proposed, are used as examples to illustrate the operation of the new family of converters.

A Gm-C bump equalizer for low-voltage low-power applications

A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.

Dimmable electronic ballast with high power-factor SEPIC preregulator, for multiple tubular fluorescent lamps

An electronic ballast for multiple tubular fluorescent lamps is presented in this paper. The proposed structure features high power-factor, dimming capability, and soft-switching to the semiconductor devices operated in high frequencies. A Zero-Current-Switching - Pulse-Width-Modulated (ZCS-PWM) SEPIC converter composes the rectifying stage, controlled by the instantaneous average input current technique, performing soft-commutations and high input power factor. Regarding the inverting stage, it is composed by a classical resonant Half-Bridge converter, associated to Series Parallel-Loaded Resonant (SPLR) filters. The dimming control technique employed in this Half-Bridge inverter is based on the phase-shift in the current processed through the sets of filter + lamp. In addition, experimental results are shown in order to validate the developed analysis.

Virtual instrumentation applied to the implementation of IEEE STD 1459-2000 power definitions

This paper discusses the utilization of Virtual Instrumentation to the implementation and evaluation of different power definitions, so that classical formulations and new definitions can be compared without the necessity of acquiring different power meters or analyzers. Accordingly, the definitions of IEEE Standard 1459-2000 for the measurement of power quantities under distorted and unbalanced situations, have been digitally implemented. Thus, several power and power factor components related to the decomposition of the measured voltage and current signals have been obtained. The proposed PC-based Virtual Instrument uses a high performance acquisition board and isolated sensors and transducers. All digital algorithms and routines have been implemented by means of a graphical development system. Regarding to the implementation of STD 1459, this paper also proposes several different algorithms to the required decompositions of voltage, current and power components. © 2005 IEEE.

Frequency-adjustable positive sequence detector for power conditioning applications

This paper proposes a novel and simple positive sequence detector (PSD), which is inherently self-adjustable to fundamental frequency deviations by means of a software-based PLL (Phase Locked Loop). Since the proposed positive sequence detector is not based on Fortescue's classical decomposition and no special input filtering is needed, its dynamic response may be as fast as one fundamental cycle. The digital PLL ensures that the positive sequence components can be calculated even under distorted waveform conditions and fundamental frequency deviations. For the purpose of validating the proposed models, the positive sequence detector has been implemented in a PC-based Power Quality Monitor and experimental results illustrate its good performance. The PSD algorithm has also been evaluated in the control loop of a Series Active Filter and simulation results demonstrate its effectiveness in a closed-loop system. Moreover, considering single-phase applications, this paper also proposes a general single-phase PLL and a Fundamental Wave Detector (FWD) immune to frequency variations and waveform distortions. © 2005 IEEE.

A true programmable HPF hybrid three-phase rectifier

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. The proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. Finally, the proposed control strategy is verified through experimental results from an implemented prototype. ©2008 IEEE.

Power losses analysis and cooling system design of three topologies of multilevel inverters

This paper presents the comparison of three topologies of multilevel inverters applied to drive an induction motor of 500 kVA/4.16 kV. The multilevel inverters analyzed are: a neutral point clamped inverter, a symmetrical cascaded multilevel inverter and a hybrid asymmetrical cascaded multilevel inverter. The performance indexes used in the comparison are total harmonic distortion, first order distortion factor, semiconductors power losses distribution and heat-sink volume. The comparison is developed with the purpose of finding the efficiency and the heat-sink volume where the three systems present the same output filter. ©2008 IEEE.

Hybrid three-phase HPF rectifier with programmable input current THD, using FPGA device and VHDL language

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. Finally, the proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. The proposed strategy is verified by experiments. © 2008 IEEE.

Placement and sizing evaluation of distributed generation in electric power systems

This paper presents a methodology for the placement and sizing evaluation of distributed generation (DG) in electric power systems. The candidate locations for DG placement are identified on the bases of Locational Marginal Prices (LMP's) obtained from an optimal power flow solution. The problem is formulated for two different objectives: social welfare maximization and profit maximization. For each DG unit an optimal placement is identified for each of the objectives.

HPF boost interleaved operating in discontinuous conduction mode for trolleybus application

This paper deals with results of a research and development (R&D) project in cooperation with Electric Power Distribution Company in São Paulo (Brazil) regarding the development and experimental analysis of a new concept of power drive system suitable for application in traction systems of electrical vehicles pulled by electrical motors, which can be powered by urban DC or AC distribution networks. The proposed front-end structure is composed by five boost power cells in interleaving connection, operating in discontinuous conduction mode as AC-DC converter, or as DC-DC converter, in order to provide the proper DC output voltage range required by DC or AC adjustable speed drivers. Therefore, when supplied by single-phase AC distribution networks, and operating as AC-DC converter, it is capable to provide high power factor, reduced harmonic distortion in the input current, complying with the restrictions imposed by the IEC 61000-3-4 standards resulting in significant improvements for the trolleybuses systems efficiency and for the urban distribution network costs. Considering the compliance with input current restrictions imposed by IEC 61000-3-4 standards, two digital control strategies were evaluated. The digital controller has been implemented using a low cost FPGA (XC3S200) and developed totally using a hardware description language VHDL and fixed point arithmetic. Experimental results from a 15 kW low power scale prototype operating in DC and AC conditions are presented, in order to verify the feasibility and performance of the proposed system. © 2009 IEEE.

Conservative power theory discussion and evaluation by means of virtual instrumentation

Considering different single and multiphase circuits feeding linear and non-linear loads, this paper presents theoretical discussions and experimental evaluation of the recent Conservative Power Theory (CPT), by means of Virtual Instrumentation concepts. The main goal is to analyze the results of such power theory definitions under nonsinusoidal and unbalanced conditions, pointing out its major advantages, possible drawbacks or relevant aspects for discussion. © 2009 IEEE.

Development of a DC-DC converter for DC bus voltage control of series connected device

The purpose of this work is to study voltage control and energy balance of a split DC bus topology within a power electronics equipment connected to the AC mains, such as UPS systems, wind power generators, active filters and FACTS devices. A typical configuration in such equipment has two mains connected converters sharing a common DC bus, one series connected and the other parallel connected. The DC bus is usually composed by a battery or a capacitor bank. In the proposed topology, the DC bus is divided in two sides, interconnected with a buck-boost converter, which controls power flow and DC voltage on both sides. © 2009 IEEE.

A novel single-phase hpf hybrid rectifier suitable for front-end trolleybus systems

This paper proposal presents the development and the experimental analysis of a new single-phase hybrid rectifier structure with high power factor (PF) and low harmonic distortion of current (THDI), suitable for application in traction systems of electrical vehicles pulled by electrical motors (trolleybus), which are powered by urban distribution network. This front-end rectifier structure is capable of providing significant improvements in trolleybuses systems and in the urban distribution network costs, and efficiency. The proposed structure is composed by an ordinary single-phase diode rectifier with parallel connection of a switched converter. It is outlined that the switched converter is capable of composing the input line current waveform assuring high power factor (HPF) and low THDI, as well as ordinary front-end converter. However, the power rating of the switched converter is about 34% of the total output power, assuring robustness and reliability. Therefore, the proposed structure was named single-phase HPF hybrid rectifier. A prototype rated at 15kW was developed and analyzed in laboratory. It was found that the input line current harmonic spectrum is in accordance with the harmonic limits imposed by IEC61000-3-4. The principle of operation, the mathematical analysis, the PWM control strategy, and experimental results of a 15kW prototype are also presented in this paper. © 2009 IEEE.

Multiarea optimal power flow using multiobjective evolutionary algorithm

In this work the multiarea optimal power flow (OPF) problem is decoupled into areas creating a set of regional OPF subproblems. The objective is to solve the optimal dispatch of active and reactive power for a determined area, without interfering in the neighboring areas. The regional OPF subproblems are modeled as a large-scale nonlinear constrained optimization problem, with both continuous and discrete variables. Constraints violated are handled as objective functions of the problem. In this way the original problem is converted to a multiobjective optimization problem, and a specifically-designed multiobjective evolutionary algorithm is proposed for solving the regional OPF subproblems. The proposed approach has been examined and tested on the RTS-96 and IEEE 354-bus test systems. Good quality suboptimal solutions were obtained, proving the effectiveness and robustness of the proposed approach. ©2009 IEEE.