976 resultados para internet computing


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Utilización de las TICs en las distintas áreas de conocimiento y edición de un periódico escolar digital, así como la conexión de la emisora escolar para su escucha a través de internet incluida dentro de su página web.

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El proyecto ha consistido en la instalación y administración de una red inalámbrica y la instalación y administración de un servidor de servicios de internet. Entre los servicios suministrados han estado: un servidor web, al que se podrá acceder desde dentro y fuera del centro a través de una dirección IP pública; un servidor de correo para proporcionar correo electrónico al alumnado del centro, con un dominio propio; y un servidor ftp para que cualquier alumno o alumna pueda descargarse los recursos que deposite el profesorado de sus respectivas materias-áreas-módulos. En cuanto a la administración de la red inalámbrica, para proteger el acceso de usuarios no registrados o no autorizados a la misma se preveerán mecanismos de acceso restringidos a ciertas tarjetas y-o a ciertos usuarios.

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Se incluye el estudio-investigación sobre el entorno socioecónomico de la zona comercial próxima al centro; la relación de empresas del entorno; los cuestionarios pasados a las empresas; los planos de la zona; la carta-presentación del proyecto a las empresas y un listado con la asociación de profesionales de las nuevas tecnologías de la provincia de Málaga

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Se presenta memoria final de proyecto educativo que pretende diagnosticar el nivel léxico del alumnado en inglés, mediante la adaptación e informatización de pruebas tipo test, búsqueda de materiales didácticos y elaboración de un banco de actividades para la adquisición y mejora del vocabulario. Se realiza en el IES Albayzín en Granada. El proceso consta de varias fases: en la fase inicial se trabajó 'las utilidades de internet-el uso de internet para la enseñanza de lenguas' y en la fase de selección se realizó un curso intensivo con el programa de autor hot potatoes. Los resultados obtenidos han sido: determinar qué palabras necesita saber un alumno que acabe la educación secundaria; haber conseguido un test fiable y válido que mida esas 1660 palabras; haber diseñado ejercicios específicos para incentivar el aprendizaje de ese vocabulario con distintos niveles de dificultad; ponerlo todo en soporte informático; crear una página web; investigación rigurosa de libros de texto de educación primaria y secundaria; contrastar, probar, discutir métodos y procedimientos experimentando nuevas formas de trabajo en clase y aprendiendo informática como herramienta de trabajo y comunicación.

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El trabajo es fruto de las actividades elaboradas para la fase presencial del 'Curso básico de Internet a distancia' organizado por el CPR de Cartagena-La Unión

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Guía compuesta por diferentes unidades didácticas para secundaria, dirigida a docentes que quieran analizar la publicidad de Internet con sus alumnos como parte del tema transversal de educación del consumidor. Los contenidos que se tratan son: el mercadeo, los formatos publicitarios de las páginas web, el mercadeo apoyado en bases de datos, actitudes ante la publicidad en Internet y estrategias.

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The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers. In this work we present a number of new CMOS logic families, Charge Recovery Logic (CRL) as well as the much improved Split-Level Charge Recovery Logic (SCRL), within which the transfer of charge between the nodes occurs quasistatically. Operating quasistatically, these logic families have an energy dissipation that drops linearly with operating frequency, i.e., their power consumption drops quadratically with operating frequency as opposed to the linear drop of conventional CMOS. The circuit techniques in these new families rely on constructing an explicitly reversible pipelined logic gate, where the information necessary to recover the energy used to compute a value is provided by computing its logical inverse. Information necessary to uncompute the inverse is available from the subsequent inverse logic stage. We demonstrate the low energy operation of SCRL by presenting the results from the testing of the first fully quasistatic 8 x 8 multiplier chip (SCRL-1) employing SCRL circuit techniques.

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General-purpose computing devices allow us to (1) customize computation after fabrication and (2) conserve area by reusing expensive active circuitry for different functions in time. We define RP-space, a restricted domain of the general-purpose architectural space focussed on reconfigurable computing architectures. Two dominant features differentiate reconfigurable from special-purpose architectures and account for most of the area overhead associated with RP devices: (1) instructions which tell the device how to behave, and (2) flexible interconnect which supports task dependent dataflow between operations. We can characterize RP-space by the allocation and structure of these resources and compare the efficiencies of architectural points across broad application characteristics. Conventional FPGAs fall at one extreme end of this space and their efficiency ranges over two orders of magnitude across the space of application characteristics. Understanding RP-space and its consequences allows us to pick the best architecture for a task and to search for more robust design points in the space. Our DPGA, a fine- grained computing device which adds small, on-chip instruction memories to FPGAs is one such design point. For typical logic applications and finite- state machines, a DPGA can implement tasks in one-third the area of a traditional FPGA. TSFPGA, a variant of the DPGA which focuses on heavily time-switched interconnect, achieves circuit densities close to the DPGA, while reducing typical physical mapping times from hours to seconds. Rigid, fabrication-time organization of instruction resources significantly narrows the range of efficiency for conventional architectures. To avoid this performance brittleness, we developed MATRIX, the first architecture to defer the binding of instruction resources until run-time, allowing the application to organize resources according to its needs. Our focus MATRIX design point is based on an array of 8-bit ALU and register-file building blocks interconnected via a byte-wide network. With today's silicon, a single chip MATRIX array can deliver over 10 Gop/s (8-bit ops). On sample image processing tasks, we show that MATRIX yields 10-20x the computational density of conventional processors. Understanding the cost structure of RP-space helps us identify these intermediate architectural points and may provide useful insight more broadly in guiding our continual search for robust and efficient general-purpose computing structures.

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Traditionally, we've focussed on the question of how to make a system easy to code the first time, or perhaps on how to ease the system's continued evolution. But if we look at life cycle costs, then we must conclude that the important question is how to make a system easy to operate. To do this we need to make it easy for the operators to see what's going on and to then manipulate the system so that it does what it is supposed to. This is a radically different criterion for success. What makes a computer system visible and controllable? This is a difficult question, but it's clear that today's modern operating systems with nearly 50 million source lines of code are neither. Strikingly, the MIT Lisp Machine and its commercial successors provided almost the same functionality as today's mainstream sytsems, but with only 1 Million lines of code. This paper is a retrospective examination of the features of the Lisp Machine hardware and software system. Our key claim is that by building the Object Abstraction into the lowest tiers of the system, great synergy and clarity were obtained. It is our hope that this is a lesson that can impact tomorrow's designs. We also speculate on how the spirit of the Lisp Machine could be extended to include a comprehensive access control model and how new layers of abstraction could further enrich this model.

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Recently, researchers have introduced the notion of super-peers to improve signaling efficiency as well as lookup performance of peer-to-peer (P2P) systems. In a separate development, recent works on applications of mobile ad hoc networks (MANET) have seen several proposals on utilizing mobile fleets such as city buses to deploy a mobile backbone infrastructure for communication and Internet access in a metropolitan environment. This paper further explores the possibility of deploying P2P applications such as content sharing and distributed computing, over this mobile backbone infrastructure. Specifically, we study how city buses may be deployed as a mobile system of super-peers. We discuss the main motivations behind our proposal, and outline in detail the design of a super-peer based structured P2P system using a fleet of city buses.

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We present a low cost and easily deployed infrastructure for location aware computing that is built using standard Bluetooth® technologies and personal computers. Mobile devices are able to determine their location to room-level granularity with existing bluetooth technology, and to even greater resolution with the use of the recently adopted bluetooth 1.2 specification, all while maintaining complete anonymity. Various techniques for improving the speed and resolution of the system are described, along with their tradeoffs in privacy. The system is trivial to implement on a large scale – our network covering 5,000 square meters was deployed by a single student over the course of a few days at a cost of less than US$1,000.

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Conocer la realidad en torno al uso de Internet y el uso que hacen los docentes del Portal Enlaces del Ministerio de Educación chileno considerando los factores esenciales para la utilización de futuras estrategias, técnicas o materiales que puedan desarrollarse para aprovechar educativamente los potenciales de las páginas web. 25 establecimientos que imparten Educación Básica para niños en la Comuna de Valparaíso (Chile). Para la recogida de información se opta por la utilización de una encuesta estructurada que se aplico a los profesores de los centros participantes en el estudio. a) Un gran porcentaje de los profesores encuestados se ha conectado en alguna ocasión a Internet, poseen correo electrónico, obtienen recursos para su labor educativa a través de la red y visitan periódicamente sitios de Internet; b) Un porcentaje menor del profesorado admite haber participado en un chat o en una videoconferencia y señalan conocer cuales son los servicios que pueden obtener de Internet; c) Menos de la mitad de los profesores conocen los objetivos del Portal Enlaces; d) Solo un doce por ciento visita periódicamente este portal; e) Más del setenta por ciento del profesorado nunca ha participado en el foro de Enlaces y un veintiuno por ciento declara haberlo hecho en una ocasión. a) Existe un buen grado de conocimientos y manejo de Internet por parte de los profesores; b) La gran mayoría de ellos no lo han logrado a través del Portal Enlaces; c) La experiencia acumulada respecto al tema de Internet, por parte de los docentes, no es necesariamente fruto del uso de Internet con fines educativos; d) El portal Enlaces está lejos de ser un sitio que cumpla con los objetivos de unir a los estudiantes y profesores del país y de ser un lugar usado normalmente por los docentes para obtener materiales, ideas, etc.

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L'article proposa una reflexió sobre els resultats d'un qüestionari sobre els nous mitjans audiovisuals administrat a estudiants d'ESO de Catalunya durant els anys 1999,2001 i 2003. Les dades mostren l'evolució de la disponibilitat a casa d'ordinador, Internet i telèfon mòbil per part dels adolescents

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Memory errors are a common cause of incorrect software execution and security vulnerabilities. We have developed two new techniques that help software continue to execute successfully through memory errors: failure-oblivious computing and boundless memory blocks. The foundation of both techniques is a compiler that generates code that checks accesses via pointers to detect out of bounds accesses. Instead of terminating or throwing an exception, the generated code takes another action that keeps the program executing without memory corruption. Failure-oblivious code simply discards invalid writes and manufactures values to return for invalid reads, enabling the program to continue its normal execution path. Code that implements boundless memory blocks stores invalid writes away in a hash table to return as the values for corresponding out of bounds reads. he net effect is to (conceptually) give each allocated memory block unbounded size and to eliminate out of bounds accesses as a programming error. We have implemented both techniques and acquired several widely used open source servers (Apache, Sendmail, Pine, Mutt, and Midnight Commander).With standard compilers, all of these servers are vulnerable to buffer overflow attacks as documented at security tracking web sites. Both failure-oblivious computing and boundless memory blocks eliminate these security vulnerabilities (as well as other memory errors). Our results show that our compiler enables the servers to execute successfully through buffer overflow attacks to continue to correctly service user requests without security vulnerabilities.

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Examples of compositional data. The simplex, a suitable sample space for compositional data and Aitchison's geometry. R, a free language and environment for statistical computing and graphics