Netwar Geopolitics: Security, Failed States and Illicit Flows

Recent and emerging security policies and practices claim a mutual vulnerability that closely links human insecurity in failed states with the threat to powerful states from illicit flows. This article first examines this ‘emerging orthodoxy’ of transnational security issues that reinforces the securitisation of poverty and the poor. It then subjects this orthodoxy to theoretical and empirical critique. Theoretically it shows that this orthodoxy is formed as a ‘geopolitical imagination’ that associates and stabilises particular views of weak states and illicit flows in a ‘netwar imagination’ by reasserting and reconfiguring traditional assumptions of the spatiality and nature of threats. A final empirical section, focusing on drug production and nuclear smuggling, argues that those assumptions and their assemblage are a partial, incomplete and often self-referential reading of illicit flows.

Non Classical Design in MOSFETs for Improving OTA gain-bandwidth trade off

In this paper, gain-bandwidth (GB) trade-off associated with analog device/circuit design due to conflicting requirements for enhancing gain and cutoff frequency is examined. It is demonstrated that the use of a nonclassical source/drain (S/D) profile (also known as underlap channel) can alleviate the GB trade-off associated with analog design. Operational transconductance amplifier (OTA) with 60 nm underlap S/D MOSFETs achieve 15 dB higher open loop voltage gain along with three times higher cutoff frequency as compared to OTA with classical nonunderlap S/D regions. Underlap design provides a methodology for scaling analog devices into the sub-100 nm regime and is advantageous for high temperature applications with OTA, preserving functionality up to 540 K. Advantages of underlap architecture over graded channel (GC) or laterally asymmetric channel (LAC) design in terms of GB behavior are demonstrated. Impact of transistor structural parameters on the performance of OTA is also analyzed. Results show that underlap OTAs designed with spacer-to-straggle ratio of 3.2 and operated below a bias current of 80 microamps demonstrate optimum performance. The present work provides new opportunities for realizing future ultra wide band OTA design with underlap DG MOSFETs in silicon-on-insulator (SOI) technology. Index Terms—Analog/RF, double gate, gain-bandwidth product, .

Bad Faith in European Trade Mark Law

Analyses how the European Court of Justice has interpreted the EU law rules against the registration of a trade mark or Community trade mark by an applicant in bad faith. Reviews case law from the UK courts, Office of Harmonisation in the Internal Market and Community courts on the role of bad faith as a moral standard. Considers case law on the narrow interpretation of bad faith in view of other EU provisions limiting trade marks.