992 resultados para hardware implementation
Resumo:
We give an overview on the development of "horizontal" European Committee for Standardisation (CEN) standards for characterising soils, sludges and biowaste in the context of environmental legislation in the European Union (EU). We discuss the various steps in the development of a horizontal standard (i.e. assessment of the possibility of such a standard, review of existing normative documents, pre-normative testing and validation) and related problems. We also provide a synopsis of European and international standards covered by the so-called Project HORIZONTAL. (C) 2004 Elsevier Ltd. All rights reserved.
Resumo:
These notes have been issued on a small scale in 1983 and 1987 and on request at other times. This issue follows two items of news. First, WaIter Colquitt and Luther Welsh found the 'missed' Mersenne prime M110503 and advanced the frontier of complete Mp-testing to 139,267. In so doing, they terminated Slowinski's significant string of four consecutive Mersenne primes. Secondly, a team of five established a non-Mersenne number as the largest known prime. This result terminated the 1952-89 reign of Mersenne primes. All the original Mersenne numbers with p < 258 were factorised some time ago. The Sandia Laboratories team of Davis, Holdridge & Simmons with some little assistance from a CRAY machine cracked M211 in 1983 and M251 in 1984. They contributed their results to the 'Cunningham Project', care of Sam Wagstaff. That project is now moving apace thanks to developments in technology, factorisation and primality testing. New levels of computer power and new computer architectures motivated by the open-ended promise of parallelism are now available. Once again, the suppliers may be offering free buildings with the computer. However, the Sandia '84 CRAY-l implementation of the quadratic-sieve method is now outpowered by the number-field sieve technique. This is deployed on either purpose-built hardware or large syndicates, even distributed world-wide, of collaborating standard processors. New factorisation techniques of both special and general applicability have been defined and deployed. The elliptic-curve method finds large factors with helpful properties while the number-field sieve approach is breaking down composites with over one hundred digits. The material is updated on an occasional basis to follow the latest developments in primality-testing large Mp and factorising smaller Mp; all dates derive from the published literature or referenced private communications. Minor corrections, additions and changes merely advance the issue number after the decimal point. The reader is invited to report any errors and omissions that have escaped the proof-reading, to answer the unresolved questions noted and to suggest additional material associated with this subject.
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The authors propose a bit serial pipeline used to perform the genetic operators in a hardware genetic algorithm. The bit-serial nature of the dataflow allows the operators to be pipelined, resulting in an architecture which is area efficient, easily scaled and is independent of the lengths of the chromosomes. An FPGA implementation of the device achieves a throughput of >25 million genes per second
Resumo:
This paper describes the design, implementation and characterisation of a contactless power transfer system for rotating applications. The power transfer system is based upon a zero-voltage-switched, full-bridge, DC-DC converter, but utilises a non-standard transformer. This transformer allows power transfer between its primary and secondary windings while also allowing free rotation between these windings. The aim of this research is to develop a solution that could replace mechanical slip-rings in certain applications where a non-contacting system would be advantageous. Based upon the design method presented in this paper, a 2 kW prototype system is constructed. Results obtained from testing the 2 kW prototype are presented and discussed. This discussion considers how the performance of the transformer varies with rotation and also the overall efficiency of the system
Resumo:
iLearn is a Web 2.0 tool developed in Blackboard to help students with Personal Development Planning (PDP). This paper describes a case study on how the innovative use of mobile digital technology in iLearn e-Portfolio for developing reflective portfolios for PDP benefits the students. The e-Portfolio tool benefits students as it enables them to create and share portfolios, record achievements and reflections that support future job applications and promotion. Students find it beneficial because they can make use of iLearn e-Portfolio to keep academic records and achievements, activities and interests, work experience, reflective practice, employer information and some other useful resources, and also to tailor their CV and covering letters including evidence to support their CV, transferable skills and selling points. Useful information for preparing for an interview, reflecting after an event and any thoughts and evaluation can be kept in iLearn e-Portfolio. Keeping assessment and feedback records in iLearn e-Portfolio enables students to know their progress, to identify any gaps they need to fill to develop their study practices and areas for development. The key points from the feedback on the assignments and assessments are beneficial for future improvement. The reflections on the assignments and how students make use of the advice are particularly useful to improve their overall performance. In terms of pedagogical benefits, the “Individual Learner Profile” records and reviews evidence in verbal communication, basic and higher academic skills, time management, numeracy skill and IT skills, students become increasingly aware of their own strengths and any weaker areas that may require development. The e-Portfolio also provides opportunity for students to reflect on the experience and skills they have gained whilst participating in activities outside their studies. As the iLearn e-Portfolio is a reflective practice tool, it is consistent with the principle of Schon's reflective practitioner to reframe problems and to explore the consequences of actions. From the students’ feedback, for those who engage regularly in iLearn, they are better able to set agendas for their Personal Tutorial meetings and provide their Personal Tutor with a unique record of their achievements, skills and attributes which help them writing effective references for them. They make the most of their student experience in general. They also enhance their transferable skills and employability overall. The iLearn e-Portfolio prepares for the workplace and life beyond University including continuing professional development. Students are aware of their transferable skills, evidence of the skills and skill level, including award or accreditation, and their personal reflection on their transferable skills. It is beneficial for students to be aware of their transferable skills, to produce evidence of the skills and skills level such as award and accreditation, and to record their personal reflection on their transferable skills. Finally, the innovative use of mobile digital technology in iLearn e-Portfolio for developing reflective portfolios for PDP will improve their employability.
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The creation of OFDM based Wireless Personal Area Networks (WPANs) has allowed the development of high bit-rate wireless communication devices suitable for streaming High Definition video between consumer products, as demonstrated in Wireless-USB and Wireless-HDMI. However, these devices need high frequency clock rates, particularly for the OFDM, FFT and symbol processing sections resulting in high silicon cost and high electrical power. The high clock rates make hardware prototyping difficult and verification is therefore very important but costly. Acknowledging that electrical power in wireless consumer devices is more critical than the number of implemented logic gates, this paper presents a Double Data Rate (DDR) architecture for implementation inside a OFDM baseband codec in order to reduce the high frequency clock rates by a complete factor of 2. The presented architecture has been implemented and tested for ECMA-368 (Wireless- USB context) resulting in a maximum clock rate of 264MHz instead of the expected 528MHz clock rate existing anywhere on the baseband codec die.
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In a sequential clinical trial, accrual of data on patients often continues after the stopping criterion for the study has been met. This is termed “overrunning.” Overrunning occurs mainly when the primary response from each patient is measured after some extended observation period. The objective of this article is to compare two methods of allowing for overrunning. In particular, simulation studies are reported that assess the two procedures in terms of how well they maintain the intended type I error rate. The effect on power resulting from the incorporation of “overrunning data” using the two procedures is evaluated.