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FinFETs are recognized as promising candidates for the CMOS nanometer era. In this paper the most recent results for cryogenic operation of FinFETs will be demonstrated with special emphasis on analog applications. Threshold voltage, subthreshold slope and carrier mobility will be studied. Also some important figures of merit for analog circuit operation as for readout electronics, such as transconductance, output conductance and intrinsic voltage gain will be covered. It is demonstrated that the threshold voltage of undoped narrow FinFETs is less temperature-dependent than for a planar single-gate device with similar doping concentration. The temperature reduction improves the transconductance over drain current ratio in any operational region. On the other hand, the output conductance is degraded when the temperature is reduced. The combination of these effects shows that the intrinsic gain of a L = 90 nm FinFET is degraded by 2 dB when the temperature reduces from 300 K to 100 K. (C) 2009 Elsevier Ltd. All rights reserved.

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This paper presents a relatively simple method to fabricate field-emitter arrays from silicon substrates. These devices are obtained from silicon micromachining by means of the HI-PS technique-a combination of hydrogen ion implantation and porous silicon used as sacrificial layer. Also, a new process sequence is proposed and implemented to fabricate self-aligned integrated field-emission devices based on this technique. Electrical characteristics of the microtips obtained show good agreement with the Fowler-Nordheim theory, which are suitable for the proposed application.