996 resultados para Referential stamp


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In transmission line transient analyses, a single real transformation matrix can obtain exact modes when the analyzed line is transposed. For non-transposed lines, the results are not exact. In this paper, non-symmetrical and non transposed three-phase line samples are analyzed with a single real transformation matrix application (Clarke's matrix). Some interesting characteristics of this matrix application are: single, real, frequency independent, line parameter independent, identical for voltage and current determination. With Clarke's matrix use, mathematical simplifications are obtained and the developed model can be applied directly in programs based on time domain. This model works without convolution procedures to deal with phase-mode transformation. In EMTP programs, Clarke's matrix can be represented by ideal transformers and the frequency dependent line parameters can be represented by modified-circuits. With these representations, the electrical values at any line point can be accessed for phase domain or mode domain using the Clarke matrix or its inverse matrix. For symmetrical and non-transposed lines, the model originates quite small errors. In addition, the application of the proposed model to the non-symmetrical and non-transposed three phase transmission lines is investigated. ©2005 IEEE.

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There has been a rapid increase in the complexity and integration of many safety-critical systems. In consequence, it is becoming increasingly difficult to identify the causes of incidents and accidents back through the complex interactions that lead to an adverse event. At the same time, there is a growing appreciation of the need to consider a broad range of contextual factors in the aftermath of any mishap. A number of regulators, operators and research teams have responded to these developments by proposing novel techniques to support the analysis of complex, safety-critical incidents. It is important to illustrate these different approaches by applying them to a number of common case studies. The following pages, therefore, show how STAMP and AcciMap might support the Serviço Público Federal investigation into the explosion and fire of the Brazilian launch vehicle VLS-1 VO3. © 2006 Elsevier Ltd. All rights reserved.

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This paper discusses the importance of the voltage referential for power quality monitoring and power systempsilas instrumentation. Considering the operating conditions of simple power circuits, it will be demonstrated that an incorrect choice of the voltages referential may result in erroneous quantification of some power quality indices, especially in three-phase four wire circuits. The use of a virtual reference point and the neutral conductor as reference have been considered and the simulation results confirm the influence of the voltage reference selection in the evaluation of total harmonic distortion, unbalance factors and voltage sags. Finally a way of linking both methods will be discussed by means of Blakesleypsilas theorem. © Copyright 2010 IEEE - All Rights Reserved.

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This article describes a survey of prescriptions dispensed in drugstores and pharmacies in the city of Araraquara in the state of São Paulo, Brazil, in May 2006. Their contents were assessed for compliance with the laws in force on drug prescription and dispensing. A total of 1,335 prescriptions were examined: 40 (3%) were unsigned, 212 (15.9%) did not contain the prescribing physician's stamp, 170 (12.7%) were undated. There were prescriptions containing corrections (4.6%), and written in code (4.4%). Only 58.8% were legible and easy to understand; nevertheless all of them were dispensed. Some did not specify the name of the patient (7.2%). On how to use the medication prescribed, not a single prescription contained all the information required by law. Specifically, 7.6% lacked information on dosage, 54.3% on presentation, 33.6% on how to take the drug, and 51.2% on duration of treatment. The data show a general failure to comply with the laws on drug prescription and dispensing. Incomplete information on the drugs and their correct use could lead to irrational use and errors in medication. The lack of prescribers' signature and stamp, date of emission and name of patient can lead to fraudulent and counterfeit prescriptions. Thus, the data found point to the need for capacitation of prescribing and dispensing professionals and the importance of the role of professional associations in guiding their members.

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This paper investigates the major similarities and discrepancies of three important current decompositions proposed for the interpretation of unbalanced and/or non linear three-phase four-wire circuits. The considered approaches were the so-called FBD Theory, the pq-Theory and the CPT. Although the methods are based on different concepts, the results obtained under ideal conditions (sinusoidal and balanced signals) are very similar. The main differences appear in the presence of unbalanced and non linear load conditions. It will be demonstrated and discussed how the choice of the voltage referential and the return conductor impedance can influence in the resulting current components, as well as, the way of interpreting a power circuit with return conductor. Under linear unbalanced conditions, both FBD and pq-Theory suggest that the some current components contain a third-order harmonic. Besides, neither pq-Theory nor FBD method are able to provide accurate information for reactive current under unbalanced and distorted conditions, what seems to be done by means of the CPT. © 2009 IEEE.

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This paper investigates the major similarities and discrepancies among three important current decompositions proposed for the interpretation of unbalanced and/or non linear three-phase four-wire power circuits. The considered approaches were the so-called FBD Theory, the pq-Theory and the CPT. Although the methods are based on different concepts, the results obtained under ideal conditions (sinusoidal and balanced signals) are very similar. The main differences appear in the presence of unbalanced and non linear load conditions. It will be demonstrated and discussed how the choice of the voltage referential and the return conductor impedance can influence in the resulting current components, as well as, the way of interpreting a power circuit with return conductor. Under linear unbalanced conditions, both FBD and pq-Theory suggest that the some current components contain a third-order harmonic. Besides, neither pq-Theory nor FBD method are able to provide accurate information for reactive current under unbalanced and distorted conditions, what can be done by means of the CPT. © 2009 IEEE.

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Includes bibliography

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Software Transactional Memory (STM) systems have poor performance under high contention scenarios. Since many transactions compete for the same data, most of them are aborted, wasting processor runtime. Contention management policies are typically used to avoid that, but they are passive approaches as they wait for an abort to happen so they can take action. More proactive approaches have emerged, trying to predict when a transaction is likely to abort so its execution can be delayed. Such techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction should run. In this paper we propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. Moreover, it avoids most of the issues caused by pseudo parallelism, as it only launches as many system-level threads as the number of available processor cores. We discuss LUTS design and present three conflict-avoidance heuristics built around LUTS scheduling capabilities. Experimental results, conducted with STMBench7 and STAMP benchmark suites, show LUTS efficiency when running high contention applications and how conflict-avoidance heuristics can improve STM performance even more. In fact, our transaction scheduling techniques are capable of improving program performance even in overloaded scenarios. © 2011 Springer-Verlag.

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Transactional memory (TM) is a new synchronization mechanism devised to simplify parallel programming, thereby helping programmers to unleash the power of current multicore processors. Although software implementations of TM (STM) have been extensively analyzed in terms of runtime performance, little attention has been paid to an equally important constraint faced by nearly all computer systems: energy consumption. In this work we conduct a comprehensive study of energy and runtime tradeoff sin software transactional memory systems. We characterize the behavior of three state-of-the-art lock-based STM algorithms, along with three different conflict resolution schemes. As a result of this characterization, we propose a DVFS-based technique that can be integrated into the resolution policies so as to improve the energy-delay product (EDP). Experimental results show that our DVFS-enhanced policies are indeed beneficial for applications with high contention levels. Improvements of up to 59% in EDP can be observed in this scenario, with an average EDP reduction of 16% across the STAMP workloads. © 2012 IEEE.

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Software transaction memory (STM) systems have been used as an approach to improve performance, by allowing the concurrent execution of atomic blocks. However, under high-contention workloads, STM-based systems can considerably degrade performance, as transaction conflict rate increases. Contention management policies have been used as a way to select which transaction to abort when a conflict occurs. In general, contention managers are not capable of avoiding conflicts, as they can only select which transaction to abort and the moment it should restart. Since contention managers act only after a conflict is detected, it becomes harder to effectively increase transaction throughput. More proactive approaches have emerged, aiming at predicting when a transaction is likely to abort, postponing its execution. Nevertheless, most of the proposed proactive techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction to run. This article proposes LUTS, a lightweight user-level transaction scheduler. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. We discuss LUTS design and propose a dynamic conflict-avoidance heuristic built around its scheduling capabilities. Experimental results, conducted with the STAMP and STMBench7 benchmark suites, running on TinySTM and SwissTM, show how our conflict-avoidance heuristic can effectively improve STM performance on high contention applications. © 2012 Springer Science+Business Media, LLC.

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Pós-graduação em Estudos Linguísticos - IBILCE

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)