973 resultados para normalizer circuits
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
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Observamos o comportamento locomotor de 40 crianças (de 5 a 8 anos) e de 40 adultos jovens (de 19 a 28 anos) frente a restrições ambientais, que percorreram dois circuitos em condições de luminosidade total e reduzida e transporte de carga (sem carga, 3% e 7% da massa corporal), andando o mais rápido possível e evitando contato com objetos. O tempo gasto na tarefa foi obtido por meio de um cronômetro digital, em três tentativas por condição. ANOVA para três fatores (circuito x iluminação x carga) revelou que: as crianças demoraram mais tempo para realizar a tarefa quando carga foi adicionada; crianças mais jovens percorreram o circuito em tempo maior que crianças mais velhas; as condições não alteraram a locomoção dos adultos. Concluímos que crianças necessitam integrar as informações sensoriais e acoplá-las ao sistema efetor. Programas de intervenção são necessários para facilitar essa integração sem restrição da mobilidade das crianças.
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
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The Compact Muon Solenoid (CMS) detector is described. The detector operates at the Large Hadron Collider (LHC) at CERN. It was conceived to study proton-proton (and lead-lead) collisions at a centre-of-mass energy of 14 TeV (5.5 TeV nucleon-nucleon) and at luminosities up to 10(34)cm(-2)s(-1) (10(27)cm(-2)s(-1)). At the core of the CMS detector sits a high-magnetic-field and large-bore superconducting solenoid surrounding an all-silicon pixel and strip tracker, a lead-tungstate scintillating-crystals electromagnetic calorimeter, and a brass-scintillator sampling hadron calorimeter. The iron yoke of the flux-return is instrumented with four stations of muon detectors covering most of the 4 pi solid angle. Forward sampling calorimeters extend the pseudo-rapidity coverage to high values (vertical bar eta vertical bar <= 5) assuring very good hermeticity. The overall dimensions of the CMS detector are a length of 21.6 m, a diameter of 14.6 m and a total weight of 12500 t.
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A thorough study of the thermal performance of multipass parallel cross-flow and counter-cross-flow heat exchangers has been carried out by applying a new numerical procedure. According to this procedure, the heat exchanger is discretized into small elements following the tube-side fluid circuits. Each element is itself a one-pass mixed-unmixed cross-flow heat exchanger. Simulated results have been validated through comparisons to results from analytical solutions for one- to four-pass, parallel cross-flow and counter-cross-flow arrangements. Very accurate results have been obtained over wide ranges of NTU (number of transfer units) and C* (heat capacity rate ratio) values. New effectiveness data for the aforementioned configurations and a higher number of tube passes is presented along with data for a complex flow configuration proposed elsewhere. The proposed procedure constitutes a useful research tool both for theoretical and experimental studies of cross-flow heat exchangers thermal performance.
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
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The electrochemical corrosion and passivation of Al-5Zn-1.7Mg-0.23Cu-0.053Nb alloys, submitted to different heat treatments (cold-rolled, annealed, quenched and aged, and quenched in two steps and aged), in sulphate-containing chloride solutions, has been studied by means of cyclic polarization, electrochemical impedance spectroscopy (EIS), scanning electron microscopy (SEM), energy-dispersive X-ray (EDX), and X-ray photoelectron spectroscopy (XPS). The cyclic polarization curves showed that sulphate addition to the chloride solution produced a poor reproducible shift of the breakdown potential to more positive potentials. The repassivation potentials, much more reproducible, and practically separating the passive from the pitting potential region, were slightly displaced in the negative direction with that addition. When the alloys were potentiodynamically polarized in the passive potential region, sulphate was incorporated in the oxide film, thus precluding chloride ingress. In addition, Zn depletion was favoured, whereas Mg losses were avoided. Different equivalent circuits corresponding to different alloys and potentials in the passive and pitting regions were employed to account for the electrochemical processes taking place in each condition. This work shows that sulphate makes these alloys more sensitive to corrosion, increasing the fracture properties of the surface layer and favouring the pitting attack over greater areas than chloride alone. (C) 2002 Elsevier B.V. Ltd. All rights reserved.
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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
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No Sofista, mediante os circuitos do procedimento ontológico-binário das divisões dialéticas, Platão busca não somente chegar à verdade das coisas em si, mas, também, a sua correta expressão. A superação das aporias relativas à natureza da linguagem por um tratamento metódico rigoroso, que minimiza suas limitações e inadvertências e a instala numa dimensão transcendente, entre os gêneros do Ser, assegura-lhe o estatuto de discurso filosófico, capaz de dizer aquilo que é como ele é.
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Este texto apresenta algumas hipóteses e idéias sobre o comércio de abastecimento da cidade de São Paulo, entre os anos 1765-1822, através de dados quantitativos e qualitativos levantados em dois conjuntos documentais produzidos pelo Senado da Câmara: Atas e Papéis Avulsos. Este comércio é entendido como um dos circuitos do organismo colonial, conforme proposto por José Roberto do Amaral Lapa. Neste sentido, vem sendo constatado seu funcionamento autônomo, de acordo com os fluxos do mercado interno, as ações dos negociantes-arrematadores de contratos e as reações do Senado da Câmara de São Paulo para enfrentar seus contextos de crise e a radicalização de relações de poder em torno deste circuito mercantil, como fator desencadeador de disputas e hostilidades entre interesses políticos locais, negociantes-arrematadores e autoridades régias.
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
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A linear, tunable CMOS transconductance stage is introduced. Drain voltage of the input transistor operating in triode region is settled by a regulation loop and a first-order linear relationship between g(m) and a de bias voltage is achieved. In addition to easy tuning, this technique offers circuit simplicity, wide dynamic range, high input and output impedances and low consumption. The transconductor is presented on both single-ended and fully-differential versions. A 3rd-order elliptical low-pass g(m)-C filter with a nominal roll-off frequency of 2MHz is used as one example for the many applications of the proposed transconductor. SPICE data describe circuits performances and filter tunabilily Passband is tuned at a rate of 2.36KHz/mV and good linearity is indicated by a 0.89% THD for an 800mV(p-p) balanced-driven input.
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This paper provides an insight to the trade-off between settling time and power consumption in regulated current mirrors as building parts in micropower current-switching D/A converters. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are evaluated. Raising pole frequencies in micropower circuits, while meeting consumption requirements, is basically limited by parasitic capacitances. For such cases, an alternative is to impose a twin-pole condition in which design constraints are somewhat relieved and settling slightly improved. Relationships between pole frequencies, transistor geometry and bias are established and design guidelines for regulated current mirrors founded. By placing loop-transistors in either weak or strong inversion, small (W/L) ratios are allowed and stray capacitances reduced. Simulated waveforms suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves both simulated and experimental settling performance.
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An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.