Microstructure and texture evolution during sub-transus thermomechanical processing of Ti-6Al-4V-0.1B alloy: part I. hot rolling in (alpha plus beta) phase field

In the current study, the evolution of microstructure and texture has been studied for Ti-6Al-4V-0.1B alloy during sub-transus thermomechanical processing. This part of the work deals with the deformation response of the alloy by rolling in the (alpha + beta) phase field. The (alpha + beta) annealing behavior of the rolled specimen is communicated in part II. Rolled microstructures of the alloys exhibit either kinked or straight alpha colonies depending on their orientations with respect to the principal rolling directions. The Ti-6Al-4V-0.1B alloy shows an improved rolling response compared with the alloy Ti-6Al-4V because of smaller alpha lamellae size, coherency of alpha/beta interfaces, and multiple slip due to orientation factors. Accelerated dynamic globularization for this alloy is similarly caused by the intralamellar transverse boundary formation via multiple slip and strain accumulation at TiB particles. The (0002)(alpha) pole figures of rolled Ti-6Al-4V alloy shows ``TD splitting'' at lower rolling temperatures because of strong initial texture. Substantial beta phase mitigates the effect of starting texture at higher temperature so that ``RD splitting'' characterizes the basal pole figure. Weak starting texture and easy slip transfer for Ti-6Al-4V-0.1B alloy produce simultaneous TD and RD splittings in basal pole figures at all rolling temperatures.

Microstructure and texture evolution during sub-transus thermo-mechanical processing of Ti-6Al-4V-0.1B alloy: part II. static annealing in (alpha plus beta) regime

The first part of this study describes the evolution of microstructure and texture in Ti-6Al-4V-0.1B alloy during sub-transus rolling vis-A -vis the control alloy Ti-6Al-4V. In the second part, the static annealing response of the two alloys at self-same conditions is compared and the principal micromechanisms are analyzed. Faster globularization kinetics has been observed in the Ti-6Al-4V-0.1B alloy for equivalent annealing conditions. This is primarily attributed to the alpha colonies, which leads to easy boundary splitting via multiple slip activation in this alloy. The other mechanisms facilitating lamellar to equiaxed morphological transformations, e.g., termination migration and cylinderization, also start early in the boron-modified alloy due to small alpha colony size, small aspect ratio of the alpha lamellae, and the presence of TiB particles in the microstructure. Both the alloys exhibit weakening of basal fiber (ND||aOE (c) 0001 >) and strengthening of prism fiber (RD||aOE (c) aOE(a)) upon annealing. A close proximity between the orientations of fully globularized primary alpha and secondary alpha phases during alpha -> beta -> alpha transformation has accounted for such a texture modification.

Processing of enriched elemental boron (B-10 similar to 65 at. %)

Procedures were developed for purification and processing of electrodeposited enriched boron powder for control rod application in India's first commercial Proto Type Fast Breeder Reactor (PFBR). Methodology for removal of anionic (F-, Cl-, BF4-) and cationic (Fe2+, Fe3+, Ni2+) impurities was developed. Parameters for grinding boron flakes obtained after electrodeposition were optimized to obtain the boron powder having particle size less than 100 gm. The rate of removal of impurities was studied with respect to time and concentration of the reagents used for purification. Process parameters for grinding and removal of impurities were optimized. A flowsheet was proposed which helps in minimizing the purification time and concentration of the reagent used for the effective removal of impurities. The purification methodology developed in this work could produce boron that meets the technical specifications for control rod application in a fast reactor.

Optimal design of timer-based, distributed selection with unknown number of nodes

The timer-based selection scheme is a popular, simple, and distributed scheme that is used to select the best node from a set of available nodes. In it, each node sets a timer as a function of a local preference number called a metric, and transmits a packet when its timer expires. The scheme ensures that the timer of the best node, which has the highest metric, expires first. However, it fails to select the best node if another node transmits a packet within Delta s of the transmission by the best node. We derive the optimal timer mapping that maximizes the average success probability for the practical scenario in which the number of nodes in the system is unknown but only its probability distribution is known. We show that it has a special discrete structure, and present a recursive characterization to determine it. We benchmark its performance with ad hoc approaches proposed in the literature, and show that it delivers significant gains. New insights about the optimality of some ad hoc approaches are also developed.

Nonparametric distributed sequential detection via universal source coding

We consider nonparametric or universal sequential hypothesis testing when the distribution under the null hypothesis is fully known but the alternate hypothesis corresponds to some other unknown distribution. These algorithms are primarily motivated from spectrum sensing in Cognitive Radios and intruder detection in wireless sensor networks. We use easily implementable universal lossless source codes to propose simple algorithms for such a setup. The algorithms are first proposed for discrete alphabet. Their performance and asymptotic properties are studied theoretically. Later these are extended to continuous alphabets. Their performance with two well known universal source codes, Lempel-Ziv code and KT-estimator with Arithmetic Encoder are compared. These algorithms are also compared with the tests using various other nonparametric estimators. Finally a decentralized version utilizing spatial diversity is also proposed and analysed.

Modified current space vector based powerline communication method for distributed inverters interfaced smart grids

The following paper presents a Powerline Communication (PLC) Method for grid interfaced inverters, for smart grid application. The PLC method is based on the concept of the composite vector which involves multiple components rotating at different harmonic frequencies. The pulsed information is modulated on the fundamental component of the grid current as a specific repeating sequence of a particular harmonic. The principle of communication is same as that of power flow, thus reducing the complexity. The power flow and information exchange are simultaneously accomplished by the interfacing inverters based on current programmed vector control, thus eliminating the need for dedicated hardware. Simulation results have been shown for inter-inverter communication, both under ideal and distorted conditions, using various harmonic modulating signals.

Design and Analysis of an Acknowledgment-Aware Asynchronous MPR MAC Protocol for Distributed WLANs

Multi-packet reception (MPR) promises significant throughput gains in wireless local area networks (WLANs) by allowing nodes to transmit even in the presence of ongoing transmissions in the medium. However, the medium access control (MAC) layer must now be redesigned to facilitate rather than discourage - these overlapping transmissions. We investigate asynchronous MPR MAC protocols, which successfully accomplish this by controlling the node behavior based on the number of ongoing transmissions in the channel. The protocols use the backoff timer mechanism of the distributed coordination function, which makes them practically appealing. We first highlight a unique problem of acknowledgment delays, which arises in asynchronous MPR, and investigate a solution that modifies the medium access rules to reduce these delays and increase system throughput in the single receiver scenario. We develop a general renewal-theoretic fixed-point analysis that leads to expressions for the saturation throughput, packet dropping probability, and average head-of-line packet delay. We also model and analyze the practical scenario in which nodes may incorrectly estimate the number of ongoing transmissions.

Identification of fault location in power distribution system with distributed generation using support vector machines

This paper presents a multi-class support vector machine (SVMs) approach for locating and diagnosing faults in electric power distribution feeders with the penetration of Distributed Generations (DGs). The proposed approach is based on the three phase voltage and current measurements which are available at all the sources i.e. substation and at the connection points of DG. To illustrate the proposed methodology, a practical distribution feeder emanating from 132/11kV-grid substation in India with loads and suitable number of DGs at different locations is considered. To show the effectiveness of the proposed methodology, practical situations in distribution systems (DS) such as all types of faults with a wide range of varying fault locations, source short circuit (SSC) levels and fault impedances are considered for studies. The proposed fault location scheme is capable of accurately identify the fault type, location of faulted feeder section and the fault impedance. The results demonstrate the feasibility of applying the proposed method in practical in smart grid distribution automation (DA) for fault diagnosis.

TCP: thread contention predictor for parallel programs

With proliferation of chip multicores (CMPs) on desktops and embedded platforms, multi-threaded programs have become ubiquitous. Existence of multiple threads may cause resource contention, such as, in on-chip shared cache and interconnects, depending upon how they access resources. Hence, we propose a tool - Thread Contention Predictor (TCP) to help quantify the number of threads sharing data and their sharing pattern. We demonstrate its use to predict a more profitable shared, last level on-chip cache (LLC) access policy on CMPs. Our cache configuration predictor is 2.2 times faster compared to the cycle-accurate simulations. We also demonstrate its use for identifying hot data structures in a program which may cause performance degradation due to false data sharing. We fix layout of such data structures and show up-to 10% and 18% improvement in execution time and energy-delay product (EDP), respectively.