Fretting wear study of Cu-10 wt% TiB2 and Cu-10 wt% TiB2-10 wt% Pb composites

In developing materials with better tribological properties, it is always conceived that the addition of softer phase would result in better frictional behavior. In order to address this issue, we report here the results of fretting wear study on Cu-10 wt% TiB2 and Cu-10 wt% TiB2-10 wt% Pb composites, sintered using spark plasma sintering (SPS) technique. It was found out that the addition of softer phase i.e. 10 wt % Pb to Cu-10 wt% TiB2 composites has not resulted in the lowering of the coefficient of friction (COF). The combination of steady state COF (0.6) and wear rate (10(-3) mm(3)/N-m) was measured and such properties are even better than that obtained with TiB2 coatings reported in the literature. For Cu-10 wt% TiB2 sintered at different temperature, a lower wear resistance with increase in hardness is being measured. An attempt has been made to correlate the observed wear behavior with the surface and subsurface deformation. The formation of a wear-resistant delaminated tribolayer consisting of TiB2 particles and ultrafine oxide debris (Cu, Fe, Ti)(x)O-y was the reason assigned for the observed low wear rate of these composites. (C) 2013 Elsevier B.V. All rights reserved.

A Reduced Device-Count Hybrid Multilevel Inverter Topology with single DC Source and Improved Fault Tolerance

A new hybrid multilevel power converter topology is presented in this paper. The proposed power converter topology uses only one DC source and floating capacitors charged to asymmetrical voltage levels, are used for generating different voltage levels. The SVPWM based control strategy used in this converter maintains the capacitor voltages at the required levels in the entire modulation range including the over-modulation region. For the voltage levels: nine and above, the number of components required in the proposed topology is significantly lower, compared to the conventional multilevel inverter topologies. The number of capacitors required in this topology reduces drastically compared to the conventional flying capacitor topology, when the number of levels in the inverter output increases. This topology has better fault tolerance, as it is capable of operating with reduced number of levels, in the entire modulation range, in the event of any failure in the H-bridges. The transient as well as the steady state performance of the nine-level version of the proposed topology is experimentally verified in the entire modulation range including the over-modulation region.