Computer tools to aid the learning and design steps for photovoltaic systems

This paper presents novel simulation tools to assist the lecturers about learning processes on renewable energy sources, considering photovoltaic (PV) systems. The PV behavior, functionality and its interaction with power electronic converters are investigated in the simulation tools. The main PV output characteristics, I (current) versus V (voltage) and P (power) versus V (voltage), were implemented in the tools, in order to aid the users for the design steps. In order to verify the effectiveness of the developed tools the simulation results were compared with Matlab. Finally, a prototype was implemented with the purpose to compare the experimental results with the results from the proposed tools, validating its operational feasibility. © 2011 IEEE.

Power Electronics course: Analysis and evaluation of the educational software and the environment learning

This paper presents the analysis and evaluation of the Power Electronics course at So Paulo State University-UNESP-Campus of Ilha Solteira(SP)-Brazil, which includes the usage of interactive Java simulations tools and an educational software to aid the teaching of power electronic converters. This platform serves as an oriented course for the lectures and supplementary support for laboratory experiments in the power electronics courses. The simulation tools provide an interactive and dynamic way to visualize the power electronics converters behavior together with the educational software, which contemplates the theory and a list of subjects for circuit simulations. In order to verify the performance and the effectiveness of the proposed interactive educational platform, it is presented a statistical analysis considering the last three years. © 2011 IEEE.

HW/SW for an intelligent transducer network based on IEEE 1451 standard

This work describes a hardware/software co-design system development, named IEEE 1451 platform, to be used in process automation. This platform intends to make easier the implementation of IEEE standards 1451.0, 1451.1, 1451.2 and 1451.5. The hardware was built using NIOS II processor resources on Alteras Cyclone II FPGA. The software was done using Java technology and C/C++ for the processors programming. This HW/SW system implements the IEEE 1451 based on a control module and supervisory software for industrial automation. © 2011 Elsevier B.V.

A visual tool for building synchronous generator capability curves

Synchronous generators are essential components of electric power systems. They are present both in hydro and thermal power plants, performing the function of converting mechanical into electrical energy. This paper presents a visual approach to manipulate parameters that affect operation limits of synchronous generators, using a specifically designed software. The operating characteristics of synchronous generators, for all possible modes of operation, are revised in order to link the concepts to the graphic objects. The approach matches the distance learning tool requirements and also enriches the learning process by developing student trust and understanding of the concepts involved in building synchronous machine capability curves. © 2012 IEEE.

Transaction scheduling using dynamic conflict avoidance

Software transaction memory (STM) systems have been used as an approach to improve performance, by allowing the concurrent execution of atomic blocks. However, under high-contention workloads, STM-based systems can considerably degrade performance, as transaction conflict rate increases. Contention management policies have been used as a way to select which transaction to abort when a conflict occurs. In general, contention managers are not capable of avoiding conflicts, as they can only select which transaction to abort and the moment it should restart. Since contention managers act only after a conflict is detected, it becomes harder to effectively increase transaction throughput. More proactive approaches have emerged, aiming at predicting when a transaction is likely to abort, postponing its execution. Nevertheless, most of the proposed proactive techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction to run. This article proposes LUTS, a lightweight user-level transaction scheduler. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. We discuss LUTS design and propose a dynamic conflict-avoidance heuristic built around its scheduling capabilities. Experimental results, conducted with the STAMP and STMBench7 benchmark suites, running on TinySTM and SwissTM, show how our conflict-avoidance heuristic can effectively improve STM performance on high contention applications. © 2012 Springer Science+Business Media, LLC.

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MATIUDE - monitoramento e acesso a transdutores inteligentes (Padrão IEEE 1451) utilizando dispositivos embarcados (celulares e PDA´s)

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Manipulação remota de um braço mecânico (Scorbot ER - III) utilizando a rede mundial de computadores

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Desenvolvimento de uma base de dados para fatores de transcrição de seres humanos e suas redes de interação: Human Transcriptional Regulation Interaction Database (HTRIDB 2.0)

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Firewall Dinâmico: uma implementação cliente/servidor

Pós-graduação em Ciência da Computação - IBILCE

Le capital social dans des communautés rurales en Haïti: une étude exploratoire

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Sistema avançado de realidade virtual para visualização de estruturas odontológicas

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Convergência digital de sistemas de aprendizado colaborativo, considerando ambientes da web e da TV digital no Brasil

Pós-graduação em Ciência da Computação - IBILCE

Plataforma de simulação computacional paralela com base nos conceitos de relógios lógicos e tempo virtual

Pós-graduação em Ciência da Computação - IBILCE

Implementação de uma plataforma HW/SW para automação industrial, utilizando hardware reconfigurável com processador NIOS II em conformidade com o padrão IEEE 1451

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)