Operational experience on a grid connected 100 kWe biomass gasification power plant in Karnataka, India

The paper reports the operational experience from a 100 kWe gasification power plant connected to the grid in Karnataka. Biomass Energy for Rural India (BERI) is a program that implemented gasification based power generation with an installed capacity of 0.88 MWe distributed over three locations to meet the electrical energy needs in the district of Tumkur. The operation of one 100 kWe power plant was found unsatisfactory and not meeting the designed performance. The Indian Institute of Science, Bangalore, the technology developer, took the initiative to ensure the system operation, capacity building and prove the designed performance. The power plant connected to the grid consists of the IISc gasification system which includes reactor, cooling, cleaning system, fuel drier and water treatment system to meet the producer gas quality for an engine. The producer gas is used as a fuel in Cummins India Limited, GTA 855 G model, turbo charged engine and the power output is connected to the grid. The system has operated for over 1000 continuous hours, with only about 70 h of grid outages. The total biomass consumption for 1035 h of operation was 111 t at an average of 107 kg/h. Total energy generated was 80.6 MWh reducing over loot of CO(2) emissions. The overall specific fuel consumption was about 1.36 kg/kWh, amounting to an overall efficiency from biomass to electricity of about 18%. The present operations indicate that a maintenance schedule for the plant can be at the end of 1000 h. The results for another 1000 h of operation by the local team are also presented. (C) 2011 International Energy Initiative. Published by Elsevier Inc. All rights reserved.

The estimation of the thermodynamic properties of ternary alloys from binary data using the shortest distance composition path

A new composition path, Xi-Xj=constant, is suggested for the semi-empirical calculation of the thermodynamic properties of ternary ‘substitutional’ solutions from binary data, when the binary systems show deviations from the regular solution model. A comparison is made between the results obtained for integral and partial properties using this composition path and those calculated employing other composition paths suggested in literature. It appears that the best estimate of the ternary properties is obtained when binary data at compositions closest to the ternary composition are used.

Multilevel inverters for low-power application

Multilevel inverters are an attractive solution in the medium-voltage and high-power applications. However in the low-power range also it can be a better solution compared to two-level inverters, if MOSFETs are used as devices switching in the order of 100 kHz. The effect of clamping diodes in the diode-clamped multilevel inverters play an important role in determining its efficiency. Power loss introduced by the reverse recovery of MOSFET body diode prohibits the use of MOSFET in hard-switched inverter legs. A technique of avoiding reverse recovery loss of MOSFET body diode in a three-level neutral point clamped inverter is suggested. The use of multilevel inverters topology enables operation at high switching frequency without sacrificing efficiency. High switching frequency of operation reduces the output filter requirement, which in turn helps in reducing the size of the inverter. This study elaborates the trade-off analysis to quantify the suitability of multilevel inverters in the low-power applications. Advantages of using a MOSFET-based three-level diode-clamped inverter for a PM motor drive and UPS systems are discussed.

Computation of thermodynamic properties of quaternary and higher order systems from binary data using shortest distance composition paths

Equations for the computation of integral and partial thermodynamic properties of mixing in quarternary systems are derived using data on constituent binary systems and shortest distance composition paths to the binaries. The composition path from a quarternary composition to the i-j binary is characterized by a constant value of (Xi − Xj). The merits of this composition path over others with constant values for View the MathML source or Xi are discussed. Finally the equations are generalized for higher order systems. They are exact for regular solutions, but may be used in a semiempirical mode for non-regular solutions.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.

Information-theoretic and communication-theoretic optimal power allocation for fading channels

In this paper we review the most peculiar and interesting information-theoretic and communications features of fading channels. We first describe the statistical models of fading channels which are frequently used in the analysis and design of communication systems. Next, we focus on the information theory of fading channels, by emphasizing capacity as the most important performance measure. Both single-user and multiuser transmission are examined. Further, we describe how the structure of fading channels impacts code design, and finally overview equalization of fading multipath channels.

A power scalable receiver front-end at 2.4 GHz

We propose a Low Noise Amplifier (LNA) architecture for power scalable receiver front end (FE) for Zigbee. The motivation for power scalable receiver is to enable minimum power operation while meeting the run-time performance needed. We use simple models to find empirical relations between the available signal and interference levels to come up with required Noise Figure (NF) and 3rd order Intermodulation Product (IIP3) numbers. The architecture has two independent digital knobs to control the NF and IIP3. Acceptable input match while using adaptation has been achieved by using an Active Inductor configuration for the source degeneration inductor of the LNA. The low IF receiver front end (LNA with I and Q mixers) was fabricated in 130nm RFCMOS process and tested.

An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology

Chronic recording of neural signals is indispensable in designing efficient brain–machine interfaces and to elucidate human neurophysiology. The advent of multichannel micro-electrode arrays has driven the need for electronics to record neural signals from many neurons. The dynamic range of the system can vary over time due to change in electrode–neuron distance and background noise. We propose a neural amplifier in UMC 130 nm, 1P8M complementary metal–oxide–semiconductor (CMOS) technology. It can be biased adaptively from 200 nA to 2 $mu{rm A}$, modulating input referred noise from 9.92 $mu{rm V}$ to 3.9 $mu{rm V}$. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. Optimum sizing of the input transistors minimizes the accentuation of the input referred noise of the amplifier and obviates the need of large input capacitance. The amplifier achieves a noise efficiency factor of 2.58. The amplifier can pass signal from 5 Hz to 7 kHz and the bandwidth of the amplifier can be tuned for rejecting low field potentials (LFP) and power line interference. The amplifier achieves a mid-band voltage gain of 37 dB. In vitro experiments are performed to validate the applicability of the neural low noise amplifier in neural recording systems.

Power and Discrete Rate Adaptation for Energy Harvesting Wireless Nodes

Energy Harvesting (EH) nodes, which harvest energy from the environment in order to communicate over a wireless link, promise perpetual operation of a wireless network with battery-powered nodes. In this paper, we address the throughput optimization problem for a rate-adaptive EH node that chooses its rate from a set of discrete rates and adjusts its power depending on its channel gain and battery state. First, we show that the optimal throughput of an EH node is upper bounded by the throughput achievable by a node that is subject only to an average power constraint. We then propose a simple transmission scheme for an EH node that achieves an average throughput close to the upper bound. The scheme's parameters can be made to account for energy overheads such as battery non-idealities and the energy required for sensing and processing. The effect of these overheads on the average throughput is also analytically characterized.

Analysis of non-uniform waveguide in MZI and optimization of the power confinement in the waveguide

The technological world has attained a new dimension with the advent of miniaturization and a major breakthrough has evolved in the form of moems, technically more advanced than mems. This breakthrough has paved way for the scientists to research and conceive their innovation. This paper presents a mathematical analysis of the wave propagation along the non-uniform waveguide with refractive index varying along the z axis implemented on the cantilever beam of MZI based moem accelerometer. Secondly the studies on the wave bends with minimum power loss focusing on two main aspects of bend angle and curvature angle is also presented.

High voltage DC power supply topology for pulsed load applications with converter switching synchronized to load pulses

High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. This paper proposes a methodology to tackle the problems associated with this type of application. Synchronization of converter switching with load pulses enables the converter to switch at half the load switching frequency. Low switching frequency helps in ensuring safety of HV transformer insulation and reduction of losses due to skin and proximity effect. Phase-modulated series resonant converter with ZVS is used as the power converter.

Input voltage modulated high voltage DC power supply topology for pulsed load applications

High voltage power supplies for radar applications are investigated which are subjected to pulsed load with stringent specifications. In the proposed solution, power conversion is done in two stages. A low power-high frequency converter modulates the input voltage of a high power-low frequency converter. This method satisfies all the performance specifications and takes care of the critical aspects of HV transformer.

Developments in amplitude-comparator techniques for distance relays

The paper reports the development of new amplitude-comparator techniques which allow the instantaneous comparison of the amplitude of the signals derived from primary line quantities. These techniques are used to derive a variety of impedance characteristics. The merits of the new relaying system are: the simple mode of the relay circuitry, the derivation of closed polar characteristics (i.e. quadrilateral) by a single measuring gate and sharp discontinuities in the polar characteristics. Design principles and circuit models in their schematic form are described and, in addition, a comprehensive theoretical basis for comparison is also presented. Dynamic test results are presented for a quadrilateral characteristic of potentially general application.

New approach to distance relays with quadrilateral polar characteristic for e.h.v.-line protection

A new technique is presented using principles of multisignal relaying for the synthesis of a universal-type quadrilateral polar characteristic. The modus operandi consists in the determination of the phase sequence of a set of voltage phasors and the provision of a trip signal for one sequence while blocking for the other. Two versions, one using ferrite-core logic and another using transistor logic, are described in detail. The former version has the merit of simplicity and has the added advantage of not requiring any d.c. supply. The unit is flexible, as it permits independent control of the characteristic along the resistance and reactance axis through suitable adjustments of replica impedance angles. The maximum operating time is about 20ms for all switching angles, and with faults within 95% of the protected section. The maximum transient overreach is about 8%.