961 resultados para FPGA boards


Relevância:

10.00% 10.00%

Publicador:

Resumo:

With increasing calls for global health research there is growing concern regarding the ethical challenges encountered by researchers from high-income countries (HICs) working in low or middle-income countries (LMICs). There is a dearth of literature on how to address these challenges in practice. In this article, we conduct a critical analysis of three case studies of research conducted in LMICs.We apply emerging ethical guidelines and principles specific to global health research and offer practical strategies that researchers ought to consider. We present case studies in which Canadian health professional students conducted a health promotion project in a community in Honduras; a research capacity-building program in South Africa, in which Canadian students also worked alongside LMIC partners; and a community-university partnered research capacity-building program in which Ecuadorean graduate students, some working alongside Canadian students, conducted community-based health research projects in Ecuadorean communities.We examine each case, identifying ethical issues that emerged and how new ethical paradigms being promoted could be concretely applied.We conclude that research ethics boards should focus not only on protecting individual integrity and human dignity in health studies but also on beneficence and non-maleficence at the community level, explicitly considering social justice issues and local capacity-building imperatives.We conclude that researchers from HICs interested in global health research must work with LMIC partners to implement collaborative processes for assuring ethical research that respects local knowledge, cultural factors, the social determination of health, community participation and partnership, and making social accountability a paramount concern.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

With increasing calls for global health research there is growing concern regarding the ethical challenges encountered by researchers from high-income countries (HICs) working in low or middle-income countries (LMICs). There is a dearth of literature on how to address these challenges in practice. In this article, we conduct a critical analysis of three case studies of research conducted in LMICs.We apply emerging ethical guidelines and principles specific to global health research and offer practical strategies that researchers ought to consider. We present case studies in which Canadian health professional students conducted a health promotion project in a community in Honduras; a research capacity-building program in South Africa, in which Canadian students also worked alongside LMIC partners; and a community-university partnered research capacity-building program in which Ecuadorean graduate students, some working alongside Canadian students, conducted community-based health research projects in Ecuadorean communities.We examine each case, identifying ethical issues that emerged and how new ethical paradigms being promoted could be concretely applied.We conclude that research ethics boards should focus not only on protecting individual integrity and human dignity in health studies but also on beneficence and non-maleficence at the community level, explicitly considering social justice issues and local capacity-building imperatives.We conclude that researchers from HICs interested in global health research must work with LMIC partners to implement collaborative processes for assuring ethical research that respects local knowledge, cultural factors, the social determination of health, community participation and partnership, and making social accountability a paramount concern.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

Introduction. Following the June 2012 European Council decision to place the ‘Single Supervisory Mechanism’ (SSM) within the European Central Bank, the general presumption in the policy discussions has been that there should be ‘Chinese walls’ between the supervisory and monetary policy arms of the ECB. The current legislative proposal, in fact, is explicit on this account. On the contrary, however, this paper finds that there is no need to impose a strict separation between these two functions. The authors argue, in fact, that a strict separation of supervision and monetary policy is not even desirable during a financial crisis when the systemic stability of the financial system represents the biggest threat to a monetary policy that aims at price stability. In their view, the key problem hampering the ECB today is that it lacks detailed information on the state of health of the banking system, which is often highly confidential. Chinese walls would not solve this problem. Moreover, in light of the fact that the new, proposed Supervisory Board will be composed to a large extent of representatives of the same institutions that also dominate the Governing Council, the paper finds that it does not make sense to have Chinese walls between two boards with largely overlapping memberships. In addition, it recommends that some members of the Supervisory Boards should be “independents” in order to reduce the tendency of supervisors to unduly delay the recognition of losses.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

The authors propose a bit serial pipeline used to perform the genetic operators in a hardware genetic algorithm. The bit-serial nature of the dataflow allows the operators to be pipelined, resulting in an architecture which is area efficient, easily scaled and is independent of the lengths of the chromosomes. An FPGA implementation of the device achieves a throughput of >25 million genes per second

Relevância:

10.00% 10.00%

Publicador:

Resumo:

We advocate the use of systolic design techniques to create custom hardware for Custom Computing Machines. We have developed a hardware genetic algorithm based on systolic arrays to illustrate the feasibility of the approach. The architecture is independent of the lengths of chromosomes used and can be scaled in size to accommodate different population sizes. An FPGA prototype design can process 16 million genes per second.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

We have designed a highly parallel design for a simple genetic algorithm using a pipeline of systolic arrays. The systolic design provides high throughput and unidirectional pipelining by exploiting the implicit parallelism in the genetic operators. The design is significant because, unlike other hardware genetic algorithms, it is independent of both the fitness function and the particular chromosome length used in a problem. We have designed and simulated a version of the mutation array using Xilinix FPGA tools to investigate the feasibility of hardware implementation. A simple 5-chromosome mutation array occupies 195 CLBs and is capable of performing more than one million mutations per second. I. Introduction Genetic algorithms (GAs) are established search and optimization techniques which have been applied to a range of engineering and applied problems with considerable success [1]. They operate by maintaining a population of trial solutions encoded, using a suitable encoding scheme.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

This paper analyses the way the CGIAR system has incorporated social research in its agenda. Since 1995, the social science staff capacity in the CGIAR has decreased by 24%, and the overall balance of social science research is still significantly tilted away from the core germplasm enhancement, production systems/natural resources management, and technology adoption work - the 'bread and butter' of technology generation and development effort - toward ex-ante and ex-post activities, Further, the bulk of the social science research has low social research content despite the significant expansion of the CGIAR initial goal of increasing the proverbial pile of rice' to poverty alleviation and sustainable food security. The paper concludes that a concerted effort is now required to mainstream social research in the CGIAR system, and this cannot occur without the full support of the CGIAR donors, the CGIAR senior managers, and the centre boards and executive staff.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

The 2001 Code of Practice for Special Educational Needs (DfES, 2001) explicitly states that students with IEPs should have an active role in the writing and implementing of them. A research project was conducted in which 19 Year 8 students in three schools were interviewed, with the findings cross-referenced against an examination of their individual education plans (IEPs) and interviews with the SENCos. Very few students were able to communicate a clear understanding of IEPs. Students' stated targets mostly reflected mainstream target-setting: very few stated targets matched with those in their IEPs. Consistent with these findings is literature which argues that meaningfully involving students in the IEP process takes considerable time and effort, which would appear to imply that the number of students with IEPs in any one school must be limited. Against this are pressures, particularly from OFSTED but also from examination boards, to have IEPs available as evidence that students' needs are being met. The article concludes by suggesting that SENCos look to limit the number of IEPs issued, alongside a robust defence of the school's special educational needs policy within the school evaluation form to ensure that students' needs are met and also are seen to be met.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

Design for low power in FPGA is rather limited since technology factors affecting power are either fixed or limited for FPGA families. This paper investigates opportunities for power savings of a pipelined 2D IDCT design at the architecture and logic level. We report power consumption savings of over 25% achieved in FPGA circuits obtained from clock gating implementation of optimizations made at the algorithmic level(1).

Relevância:

10.00% 10.00%

Publicador:

Resumo:

This paper presents the evaluation in power consumption of gated clocks pipelined circuits with different register configurations in Virtex-based FPGA devices. Power impact of a gated clock circuitry aimed at reducing flip-flops output rate at the bit level is studied. Power performance is also given for pipeline stages based on the implementation of a double edge-triggered flip-flop. Using a pipelined Cordic Core circuit as an example, this study did not find evidence in power benefits either when gated clock at the bit-level or double-edge triggered flip-flops used when synthesized with FPGA logic resources.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

A Fractal Quantizer is proposed that replaces the expensive division operation for the computation of scalar quantization by more modest and available multiplication, addition and shift operations. Although the proposed method is iterative in nature, simulations prove a virtually undetectable distortion to the naked eve for JPEG compressed images using a single iteration. The method requires a change to the usual tables used in JPEG algorithins but of similar size. For practical purposes, performing quantization is reduced to a multiplication plus addition operation easily programmed in either low-end embedded processors and suitable for efficient and very high speed implementation in ASIC or FPGA hardware. FPGA hardware implementation shows up to x15 area-time savingscompared to standars solutions for devices with dedicated multipliers. The method can be also immediately extended to perform adaptive quantization(1).

Relevância:

10.00% 10.00%

Publicador:

Resumo:

This paper discusses the design, implementation and synthesis of an FFT module that has been specifically optimized for use in the OFDM based Multiband UWB system, although the work is generally applicable to many other OFDM based receiver systems. Previous work has detailed the requirements for the receiver FFT module within the Multiband UWB ODFM based system and this paper draws on those requirements coupled with modern digital architecture principles and low power design criteria to converge on our optimized solution. The FFT design obtained in this paper is also applicable for implementation of the transmitter IFFT module therefore only needing one FFT module for half-duplex operation. The results from this paper enable the baseband designers of the 200Mbit/sec variant of Multiband UWB systems (and indeed other OFDM based receivers) using System-on-Chip (SoC), FPGA and ASIC technology to create cost effective and low power solutions biased toward the competitive consumer electronics market.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

This paper discusses the architectural design, implementation and associated simulated peformance results of a possible receiver solution fir a multiband Ultra-Wideband (UWB) receiver. The paper concentrates on the tradeoff between the soft-bit width and numerical precision requirements for the receiver versus performance. The required numerical precision results obtained in this paper can be used by baseband designers of cost effective UWB systems using Systein-on-Chip (SoC), FPGA and ASIC technology solutions biased toward the competitive consumer electronics market(1).

Relevância:

10.00% 10.00%

Publicador:

Resumo:

Space applications demand the need for building reliable systems. Autonomic computing defines such reliable systems as self-managing systems. The work reported in this paper combines agent-based and swarm robotic approaches leading to swarm-array computing, a novel technique to achieve self-managing distributed parallel computing systems. Two swarm-array computing approaches based on swarms of computational resources and swarms of tasks are explored. FPGA is considered as the computing system. The feasibility of the two proposed approaches that binds the computing system and the task together is simulated on the SeSAm multi-agent simulator.

Relevância:

10.00% 10.00%

Publicador:

Resumo:

Space applications demand the need for building reliable systems. Autonomic computing defines such reliable systems as self-managing systems. The work reported in this paper combines agent-based and swarm robotic approaches leading to swarm-array computing, a novel technique to achieve self-managing distributed parallel computing systems. Two swarm-array computing approaches based on swarms of computational resources and swarms of tasks are explored. FPGA is considered as the computing system. The feasibility of the two proposed approaches that binds the computing system and the task together is simulated on the SeSAm multi-agent simulator.