Application of electron beams in thermal processing of semiconductor materials and devices

Rapid and effective thermal processing methods using electron beams are described in this paper. Heating times ranging from a fraction of a second to several seconds and temperatures up to 1400°C are attainable. Applications such as the annealing of ion implanted material, both without significant dopant diffusion and with highly controlled diffusion of impurities, are described. The technique has been used successfully to activate source/drain regions for fine geometry NMOS transistors. It is shown that electron beams can produce localised heating of semiconductor substrates and a resolution of approximately 1 μm has been achieved. Electron beam heating has been applied to improving the crystalline quality of silicon-on sapphire used in CMOS device fabrication. Silicon layers with defect levels approaching bulk material have been obtained. Finally, the combination of isothermal and selective annealing is shown to have application in recrystallisation of polysilicon films on an insulating layer. The approach provides the opportunity of producing a silicon-on-insulator substrate with improved crystalline quality compared to silicon-on-sapphire at a potentially lower cost. It is suggested that rapid heating methods are expected to provide a real alternative to conventional furnace processing of semiconductor devices in the development of fabrication technology. © 1984 Benn electronics Publications Ltd, Luton.

Performance of CMOS Devices in Silicon-on-Sapphire Films After Solid-Phase Epitaxial Growth With Rapid Electron-Beam Heating

The crystal quality of 0.3-μm-thick as-grown epitaxial silicon-on-sapphire (SOS) was improved using solid-phase epitaxy (SPE) by implantation with silicon to 1015 ions/cm2 at 175 keV and rapid annealing using electron-beam heating, n-channel and p-channel transistormobilities increased by 31 and 19 percent, respectively, and a reduction in ring-oscillator stage delay confirmed that crystal defects near the upper silicon surface had been removed. Leakage in n-channel transistors was not significantly affected by the regrowth process but for p-channel transistors back-channel leakage was considerably greater than for the control devices. This is attributed to aluminum released by damage to the sapphire during silicon implantation. © 1985 IEEE

Density, sp3 content and internal layering of DLC films by X-ray reflectivity and electron energy loss spectroscopy

A variety of hydrogenated and non-hydrogenated amorphous carbon thin films have been characterized by means of grazing-incidence X-ray reflectivity (XRR) to give information about their density, thickness, surface roughness and layering. We used XRR to validate the density of ta-C, ta-C:H and a-C:H films derived from the valence plasmon in electron energy loss spectroscopy measurements, up to 3.26 and 2.39 g/cm3 for ta-C and ta-C:H, respectively. By comparing XRR and electron energy loss spectroscopy (EELS) data, we have been able for the first time to fit a common electron effective mass of m*/me = 0.87 for all amorphous carbons and diamond, validating the `quasi-free' electron approach to density from valence plasmon energy. While hydrogenated films are found to be substantially uniform in density across the film, ta-C films grown by the filtered cathodic vacuum arc (FCVA) show a multilayer structure. However, ta-C films grown with an S-bend filter show a high uniformity and only a slight dependence on the substrate bias of both sp3 and layering.

Hydrogenated amorphous silicon and silicon nitride deposited at less than 100° C by ECR-PECVD for thin film transistors

A systematic study has been made of the growth of both hydrogenated amorphous silicon (a-Si:H) and silicon nitride (a-SiN) by electron cyclotron resonance plasma enhanced chemical vapour deposition (ECR-PECVD). In the case of a-SiN, helium and nitrogen gas is injected into the system such that it passes through the resonance zone. These highly ionised gases provide sufficient energy to ionise the silane gas, which is injected further downstream. It is demonstrated that a gas phase reaction occurs between the silane and nitrogen species. It is control of the ratio of silane to nitrogen in the plasma which is critical for the production of stoichiometric a-SiN. Material has been produced at 80°C with a Si:N ratio of 1:1.3 a breakdown strength of ∼6 MV cm-1 and resistivity of > 1014 Ω cm. In the case of a-Si:H, helium and hydrogen gas is injected into the ECR zone and silane is injected downstream. It is shown that control of the gas phase reactions is critical in this process also. a-Si:H has been deposited at 80 °C with a dark conductivity of 10-11 Ω-1 cm-1 and a photosensitivity of justbelowl 4×104. Such materials are suitable for use in thin film transistors on plastic substrates.

High-frequency acousto-electric single-photon source

We propose a single optical photon source for quantum cryptography based on the acoustoelectric effect. Surface acoustic waves (SAWs) propagating through a quasi-one-dimensional channel have been shown to produce packets of electrons that reside in the SAW minima and travel at the velocity of sound. In our scheme, the electron packets are injected into a p-type region, resulting in photon emission. Since the number of electrons in each packet can be controlled down to a single electron, a stream of single- (or N-) photon states, with a creation time strongly correlated with the driving acoustic field, should be generated. ©2000 The American Physical Society.

Fabrication of an organic field effect transistor using nano imprinting of Ag inks and semiconducting polymers

A simple and cheap procedure for flexible electronics fabrication was demonstrated by imprinting metallic nanoparticles (NPs) on flexible substrates. Silver NPs with an average diameter of 10 nm were prepared via an improved chemical approach and Ag Np ink was produced in α-terpineol with a concentration up to 15%. Silver micro/nanostructures with a dimension varying from nanometres to microns were produced on a flexible substrate (polyimide) by imprinting the as-prepared silver ink. The fine fluidic properties of an Ag NP/α-terpineol solution and low melting temperatures of silver nanoparticles render a low pressure and low temperature procedure, which is well suited for flexible electronics fabrication. The effects of sintering and mechanical bending on the conductivity of imprinted silver contacts were also investigated. Large area organic field effect transistors (OFET) on flexible substrates were fabricated using an imprinted silver electrode and semiconducting polymer. The OFET with silver electrodes imprinted from our prepared oleic acid stabilized Ag nanoparticle ink show an ideal ohmic contact; therefore, the OFET exhibit high performance (Ion/Ioff ratio: 1 × 103; mobility: 0.071 cm2 V-1 s-1). © 2010 IOP Publishing Ltd.

Low temperature (< 100 °c) deposited P-type cuprous oxide thin films: Importance of controlled oxygen and deposition energy

With the emergence of transparent electronics, there has been considerable advancement in n-type transparent semiconducting oxide (TSO) materials, such as ZnO, InGaZnO, and InSnO. Comparatively, the availability of p-type TSO materials is more scarce and the available materials are less mature. The development of p-type semiconductors is one of the key technologies needed to push transparent electronics and systems to the next frontier, particularly for implementing p-n junctions for solar cells and p-type transistors for complementary logic/circuits applications. Cuprous oxide (Cu2O) is one of the most promising candidates for p-type TSO materials. This paper reports the deposition of Cu2O thin films without substrate heating using a high deposition rate reactive sputtering technique, called high target utilisation sputtering (HiTUS). This technique allows independent control of the remote plasma density and the ion energy, thus providing finer control of the film properties and microstructure as well as reducing film stress. The effect of deposition parameters, including oxygen flow rate, plasma power and target power, on the properties of Cu2O films are reported. It is known from previously published work that the formation of pure Cu2O film is often difficult, due to the more ready formation or co-formation of cupric oxide (CuO). From our investigation, we established two key concurrent criteria needed for attaining Cu2O thin films (as opposed to CuO or mixed phase CuO/Cu2O films). First, the oxygen flow rate must be kept low to avoid over-oxidation of Cu2O to CuO and to ensure a non-oxidised/non-poisoned metallic copper target in the reactive sputtering environment. Secondly, the energy of the sputtered copper species must be kept low as higher reaction energy tends to favour the formation of CuO. The unique design of the HiTUS system enables the provision of a high density of low energy sputtered copper radicals/ions, and when combined with a controlled amount of oxygen, can produce good quality p-type transparent Cu2O films with electrical resistivity ranging from 102 to 104 Ω-cm, hole mobility of 1-10 cm2/V-s, and optical band-gap of 2.0-2.6 eV. These material properties make this low temperature deposited HiTUS Cu 2O film suitable for fabrication of p-type metal oxide thin film transistors. Furthermore, the capability to deposit Cu2O films with low film stress at low temperatures on plastic substrates renders this approach favourable for fabrication of flexible p-n junction solar cells. © 2011 Elsevier B.V. All rights reserved.

Effect of gate dielectric scaling in nanometer scale vertical thin film transistors

A short channel vertical thin film transistor (VTFT) with 30 nm SiN x gate dielectric is reported for low voltage, high-resolution active matrix applications. The device demonstrates an ON/OFF current ratio as high as 10 9, leakage current in the fA range, and a sub-threshold slope steeper than 0.23 V/dec exhibiting a marked improvement with scaling of the gate dielectric thickness. © 2011 American Institute of Physics.

Soft-lithographic processed soluble micropatterns of reduced graphene oxide for wafer-scale thin film transistors and gas sensors

PDMS based imprinting is firstly developed for patterning of rGO on a large area. High quality stripe and square shaped rGO patterns are obtained and the electrical properties of the rGO film can be adjusted by the concentration of GO suspension. The arrays of rGO electronics are fabricated from the patterned film by a simple shadow mask method. Gas sensors, which are based on these rGO electronics, show high sensitivity and recyclable usage in sensing NH 3. © 2012 The Royal Society of Chemistry.

High-efficiency InGaN/GaN quantum well structures on large area silicon substrates

The growth techniques which have enabled the realization of InGaN-based multi-quantum-well (MQW) structures with high internal quantum efficiencies (IQE) on 150mm (6-in.) silicon substrates are reviewed. InGaN/GaN MQWs are deposited onto GaN templates on large-area (111) silicon substrates, using AlGaN strain-mediating interlayers to inhibit thermal-induced cracking and wafer-bowing, and using a SiN x interlayer to reduce threading dislocation densities in the active region of the MQW structure. MQWs with high IQE approaching 60% have been demonstrated. Atomic resolution electron microscopy and EELS analysis have been used to study the nature of the important interface between the Si(111) substrate and the AlN nucleation layer. We demonstrate an amorphous SiN x interlayer at the interface about 2nm wide, which does not, however, prevent good epitaxy of the AlN on the Si(111) substrate. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Energy recovery from high-frequency clocks using DC-DC converters

Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed to operate the converter circuitry, resulting in an effective efficiency greater than 100%. Furthermore, the converter output can be used to operate additional power-saving features like low-voltage islands or body bias voltages. ©2008 IEEE.

High velocity vortex channeling in vicinal YBCO thin films

We report on electrical transport measurements at high current densities on optimally doped YBa 2Cu 3O 7-δ thin films grown on vicinal SrTiO 3 substrates. Data were collected by using a pulsed-current technique in a four-probe arrangement, allowing to extend the current-voltage characteristics to high supercritical current densities (up to 24 MA cm -2) and high electric fields (more than 20 V/cm), in the superconducting state at temperatures between 30 and 80 K. The electric measurements were performed on tracks perpendicular to the vicinal step direction, such that the current crossed between ab planes, under magnetic field rotated in the plane defined by the crystallographic c axis and the current density. At magnetic field orientation parallel to the cuprate layers, evidence for the sliding motion along the ab planes (vortex channeling) was found. The signature of vortex channeling appeared to get enhanced with increasing electric field, due to the peculiar depinning features in the kinked vortex range. They give rise to a current-voltage characteristics steeper than in the more off-plane rectilinear vortex orientations, in the electric field range below approximately 1 V/cm. Roughly above this value, the high vortex channeling velocities (up to 8.6 km/s) could be ascribed to the flux flow, although the signature of ohmic transport appeared to be altered by unavoidable macroscopic self-heating and hot-electron-like effects. © 2012 Elsevier B.V. All rights reserved.

Hot electron field emission via individually transistor-ballasted carbon nanotube arrays.

We present electronically controlled field emission characteristics of arrays of individually ballasted carbon nanotubes synthesized by plasma-enhanced chemical vapor deposition on silicon-on-insulator substrates. By adjusting the source-drain potential we have demonstrated the ability to controllable limit the emission current density by more than 1 order of magnitude. Dynamic control over both the turn-on electric field and field enhancement factor have been noted. A hot electron model is presented. The ballasted nanotubes are populated with hot electrons due to the highly crystalline Si channel and the high local electric field at the nanotube base. This positively shifts the Fermi level and results in a broad energy distribution about this mean, compared to the narrow spread, lower energy thermalized electron population in standard metallic emitters. The proposed vertically aligned carbon nanotube field-emitting electron source offers a viable platform for X-ray emitters and displays applications that require accurate and highly stable control over the emission characteristics.