Sub-Wavelength Profile 2-D Leaky-Wave Antennas With Two Periodic Layers

A fast and accurate analysis and synthesis technique for high-gain sub-wavelength 2-D Fabry-Perot leaky-wave antennas (LWA) consisting of two periodic metallodielectric arrays over a ground plane is presented. Full-wave method of moments (MoM) together with reciprocity is employed for the estimation of the near fields upon plane wave illumination and the extraction of the radiation patterns of the LWA. This yields a fast and rigorous tool for the characterisation of this type of antennas. A thorough convergence study for different antenna designs is presented and the operation principles of these antennas as well as the radiation characteristics are discussed. Moreover, design guidelines to tailor the antenna profile, the dimensions of the arrays as well as the antenna directivity and bandwidth are provided. A study on the radiation efficiency for antennas with different profiles is also presented and the trade off between directivity and radiation bandwidth is discussed. Numerical examples are given throughout to demonstrate the technique. A finite size antenna model is simulated using commercial software (CST Microstripes 2009) which validates the technique.

Impact of gate-source/drain channel architecture on the performance of an operational transconductance amplifier (OTA)

In this work, we report on the significance of gate-source/drain extension region (also known as underlap design) optimization in double gate (DG) FETs to improve the performance of an operational transconductance amplifier (OTA). It is demonstrated that high values of intrinsic voltage gain (A(VO_OTA)) > 55 dB and unity gain frequency (f(T_OTA)) similar to 57 GHz in a folded cascode OTA can be achieved with gate-underlap channel design in 60 nm DG MOSFETs. These values correspond to 15 dB improvement in A(VO_OTA) and three fold enhancement in f(T_OTA) over a conventional non-underlap design. OTA performance based on underlap single gate SOI MOSFETs realized in ultra-thin body (UTB) and ultra-thin body BOX (UTBB) technologies is also evaluated. A(VO_OTA) values exhibited by a DG MOSFET-based OTA are 1.3-1.6 times higher as compared to a conventional UTB/UTBB single gate OTA. f(T_OTA) values for DG OTA are 10 GHz higher for UTB OTAs whereas a twofold improvement is observed with respect to UTBB OTAs. The simultaneous improvement in A(VO_OTA) and f(T_OTA) highlights the usefulness of underlap channel architecture in improving gain-bandwidth trade-off in analog circuit design. Underlap channel OTAs demonstrate high degree of tolerance to misalignment/oversize between front and back gates without compromising the performance, thus relaxing crucial process/technology-dependent parameters to achieve 'idealized' DG MOSFETs. Results show that underlap OTAs designed with a spacer-to-straggle (s/sigma) ratio of 3.2 and operated below a bias current (IBIAS) of 80 mu A demonstrate optimum performance. The present work provides new opportunities for realizing future ultra-wide band OTA design with underlap DG MOSFETs.

Quality factor of E-plane periodically loaded waveguide resonators and filter applications

The quality factor of microwave resonators miniaturised by virtue of periodic loading is assessed. Five X-band resonators in E-plane technology with different miniaturisation factors have been designed to resonate at approximately the same frequency. The loaded quality factor is extracted from the fractional bandwidth and subsequently employed to estimate the unloaded quality factor. The study reveals that the unloaded quality factor drops approximately linearly with the miniaturisation. Subsequently design guidelines for E-plane filters with periodically loaded resonators are provided by means of an example involving a fifth-order filter. Full-wave simulated and experimental results are presented to validate the study.

Adaptive Code Allocation for Interference Management on the Downlink of DS-CDMA Systems

A new technique based on adaptive code-to-user allocation for interference management on the downlink of BPSK based TDD DS-CDMA systems is presented. The principle of the proposed technique is to exploit the dependency of multiple access interference on the instantaneous symbol values of the active users. The objective is to adaptively allocate the available spreading sequences to users on a symbol-by-symbol basis to optimize the decision variables at the downlink receivers. The presented simulations show an overall system BER performance improvement of more than an order of a magnitude with the proposed technique while the adaptation overhead is kept less than 10% of the available bandwidth.

Ultrafast Low-Loss 40-70 GHz SPST Switch

The design and characterizations of an ultrafast single-pole single-throw (SPST) absorptive differential switch are presented. The switch exhibits low insertion loss less than 1 dB, and isolation better than 16 dB from 40 to 70 GHz. Sub-nanosecond switching time is achieved by adopting a differential current-steering technique. The total measured rise and fall time are 75 ps envisaging that switching rates up to 13 Gb/s are achievable. To our best knowledge, this is the fastest, lowest insertion loss V-band SPST switch yet reported that can operate over a wide bandwidth of 30 GHz.

Anisotropic Impedance Surfaces for Linear to Circular Polarization Conversion

Anisotropic impedance surfaces are employed as low-profile and broadband reflectors that convert orthogonal linear to right- and left-handed circular polarization respectively. By virtue of anisotropy, it is possible to independently control the reflection characteristics of two orthogonal linearly polarized incident plane waves and therefore achieve linear to circular polarization conversion. Equivalent circuits for anisotropic impedance surfaces with arbitrarily shaped elements are employed to demonstrate the operating principle and a design procedure is proposed. The proposed design procedure is demonstrated by means of an example involving a dipole array. A prototype is designed and its performance characteristics are evaluated. The 3-dB relative axial ratio bandwidth exceeds 60%, while low loss and angular stability are also reported. Numerical and experimental results on a fabricated prototype are presented to validate the synthesis and the performance. © 2006 IEEE.

Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs

Per-core scratchpad memories (or local stores) allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architectures become more distributed. We have designed cache-integrated network interfaces, appropriate for scalable multicores, that combine the best of two worlds – the flexibility of caches and the efficiency of scratchpad memories: on-chip SRAM is configurably shared among caching, scratchpad, and virtualized network interface (NI) functions. This paper presents our architecture, which provides local and remote scratchpad access, to either individual words or multiword blocks through RDMA copy. Furthermore, we introduce event responses, as a technique that enables software configurable communication and synchronization primitives. We present three event response mechanisms that expose NI functionality to software, for multiword transfer initiation, completion notifications for software selected sets of arbitrary size transfers, and multi-party synchronization queues. We implemented these mechanisms in a four-core FPGA prototype, and measure the logic overhead over a cache-only design for basic NI functionality to be less than 20%. We also evaluate the on-chip communication performance on the prototype, as well as the performance of synchronization functions with simulation of CMPs with up to 128 cores. We demonstrate efficient synchronization, low-overhead communication, and amortized-overhead bulk transfers, which allow parallelization gains for fine-grain tasks, and efficient exploitation of the hardware bandwidth.

Frequency selective surface using nested split ring slot elements as a lens with mechanically reconfigurable beam steering capability

The design is described of a double layer frequency selective surface which can produce a differential phase shift of 180 ° as the wave propagates through it at normal incidence. The hand of an applied circularly polarized signal is reversed due to the 180° phase shift, and it is demonstrated that the exit circularly polarized output signal can be phase advanced or phase retarded by 180 ° upon rotation of the elements comprising the structure. This feature allows the surface to act as a spatial phase shifter. In this paper the beam steering capabilities of a 10 × 10 array of such elements are demonstrated. Here the individual elements comprising the array are rotated relative to each other in order to generate a progressive phase shift. At normal incidence the 3 dB Axial Ratio Bandwidth for LHCP to RHCP conversion is 5.3% and the insertion loss was found to be -2.3 dB, with minimum axial ratio of 0.05 dB. This array is shown to be able to steer a beam from -40 ° to +40 ° while holding axial ratio at the pointing angle to below 4 dB. The measured radiation patterns match the theoretical calculation and full-wave simulation results. © 2010 IEEE.

Retrodirective Rotman Lens Constraining Factors

The mechanism by which a retrodirective Rotman lens operates is examined theoretically and prediction is compared with measurement. By deriving the reflection matrix based on the phase delay relationship between the beam ports and the array ports we show that if the phase delay difference between neighbouring ports is constrained in a particular way that the reflection matrix becomes an inverse diagonal matrix and the Rotman lens functions as a Van Atta Array hence can perform retrodirective reflection. Further, the primary factors governing the bandwidth and beam pointing error of the lens are elaborated.

MeV negative ion source from ultra-intense laser-matter interaction

Experimental demonstration of negative ion acceleration to MeV energies from sub-micron size droplets of water spray irradiated by ultra-intense laser pulses is presented. Thanks to the specific target configuration and laser parameters, more than 109 negative ions per steradian solid angle in 5% energy bandwidth are accelerated in a stable and reliable manner. To our knowledge, by virtue of the ultra-short duration of the emission, this is by far the brightest negative ion source reported. The data also indicate the existence of beams of neutrals with at least similar numbers and energies.

XOR-based hash functions

Bank conflicts can severely reduce the bandwidth of an interleaved multibank memory and conflict misses increase the miss rate of a cache or a predictor. Both occurrences are manifestations of the same problem: Objects which should be mapped to different indices are accidentally mapped to the same index. Suitable chosen hash functions can avoid conflicts in each of these situations by mapping the most frequently occurring patterns conflict-free. A particularly interesting class of hash functions are the XOR-based hash functions, which compute each set index bit as the exclusive-or of a subset of the address bits. When implementing an XOR-based hash function, it is extremely important to understand what patterns are mapped conflict-free and how a hash function can be constructed to map the most frequently occurring patterns without conflicts. Hereto, this paper presents two ways to reason about hash functions: by their null space and by their column space. The null space helps to quickly determine whether a pattern is mapped conflict-free. The column space is more useful for other purposes, e. g., to reduce the fan-in of the XOR-gates without introducing conflicts or to evaluate interbank dispersion in skewed-associative caches. Examples illustrate how these ideas can be applied to construct conflict-free hash functions.

Evaluating the impact of network density, hidden nodes and capture effect for throughput guarantee in multi-hop wireless networks

To optimize the performance of wireless networks, one needs to consider the impact of key factors such as interference from hidden nodes, the capture effect, the network density and network conditions (saturated versus non-saturated). In this research, our goal is to quantify the impact of these factors and to propose effective mechanisms and algorithms for throughput guarantees in multi-hop wireless networks. For this purpose, we have developed a model that takes into account all these key factors, based on which an admission control algorithm and an end-to-end available bandwidth estimation algorithm are proposed. Given the necessary network information and traffic demands as inputs, these algorithms are able to provide predictive control via an iterative approach. Evaluations using analytical comparison with simulations as well as existing research show that the proposed model and algorithms are accurate and effective.

Automatic FPGA Synthesis of Memory Intensive C-based Kernels

Realising high performance image and signal processing
applications on modern FPGA presents a challenging implementation problem due to the large data frames streaming through these systems. Specifically, to meet the high bandwidth and data storage demands of these applications, complex hierarchical memory architectures must be manually specified
at the Register Transfer Level (RTL). Automated approaches which convert high-level operation descriptions, for instance in the form of C programs, to an FPGA architecture, are unable to automatically realise such architectures. This paper
presents a solution to this problem. It presents a compiler to automatically derive such memory architectures from a C program. By transforming the input C program to a unique dataflow modelling dialect, known as Valved Dataflow (VDF), a mapping and synthesis approach developed for this dialect can
be exploited to automatically create high performance image and video processing architectures. Memory intensive C kernels for Motion Estimation (CIF Frames at 30 fps), Matrix Multiplication (128x128 @ 500 iter/sec) and Sobel Edge Detection (720p @ 30 fps), which are unrealisable by current state-of-the-art C-based synthesis tools, are automatically derived from a C description of the algorithm.

High performance IP lookup circuit using DDR SDRAM

DDR-SDRAM based data lookup techniques are evolving into a core technology for packet lookup applications for data network, benefitting from the features of high density, high bandwidth and low price of DDR memory products in the market. Our proposed DDR-SDRAM based lookup circuit is capable of achieving IP header lookup for network line-rates of up to 10Gbps, providing a solution on high-performance and economic packet header inspections. ©2008 IEEE.

Amplitude-modulation characteristics of power-combining Class-E amplifier with finite choke

Power back-off performances of a new variant power-combining Class-E amplifier under different amplitude-modulation schemes such as continuous wave (CW), envelope elimination and restoration (EER), envelope tracking (ET) and outphasing are for the first time investigated in this study. Finite DC-feed inductances rather than massive RF chokes as used in the classic single-ended Class-E power amplifier (PA) resulted from the approximate yet effective frequency-domain circuit analysis provide the wherewithal to increase modulation bandwidth up to 80% higher than the classic single-ended Class-E PA. This increased modulation bandwidth is required for the linearity improvement in the EER/ET transmitters. The modified output load network of the power-combining Class-E amplifier adopting three-harmonic terminations technique relaxes the design specifications for the additional filtering block typically required at the output stage of the transmitter chain. Qualitative agreements between simulation and measurement results for all four schemes were achieved where the ET technique was proven superior to the other schemes. When the PA is used within the ET scheme, an increase of average drain efficiency of as high as 40% with respect to the CW excitation was obtained for a multi-carrier input signal with 12 dB peak-to-average power ratio. © 2011 The Institution of Engineering and Technology.