Theory of the electronic and optical properties of dilute bismide alloys

Dilute bismide alloys, containing small fractions of bismuth (Bi), have recently attracted interest due to their potential for applications in a range of semiconductor devices. Experiments have revealed that dilute bismide alloys such as GaBixAs1−x, in which a small fraction x of the atoms in the III-V semiconductor GaAs are replaced by Bi, exhibit a number of unusual and unique properties. For example, the band gap energy (E g) decreases rapidly with increasing Bi composition x, by up to 90 meV per % Bi replacing As in the alloy. This band gap reduction is accompanied by a strong increase in the spin-orbit-splitting energy (ΔSO) with increasing x, and both E g and ΔSO are characterised by strong, composition-dependent bowing. The existence of a ΔSO > E g regime in the GaBixAs1−x alloy has been demonstrated for x ≳10%, a band structure condition which is promising for the development of highly efficient, temperature stable semiconductor lasers that could lead to large energy savings in future optical communication networks. In addition to their potential for specific applications, dilute bismide alloys have also attracted interest from a fundamental perspective due to their unique properties. In this thesis we develop the theory of the electronic and optical properties of dilute bismide alloys. By adopting a multi-scale approach encompassing atomistic calculations of the electronic structure using the semi-empirical tight-binding method, as well as continuum calculations based on the k•p method, we develop a fundamental understanding of this unusual class of semiconductor alloys and identify general material properties which are promising for applications in semiconductor optoelectronic and photovoltaic devices. By performing detailed supercell calculations on both ordered and disordered alloys we explicitly demonstrate that Bi atoms act as isovalent impurities when incorporated in dilute quantities in III-V (In)GaAs(P) materials, strongly perturbing the electronic structure of the valence band. We identify and quantify the causes and consequences of the unusual electronic properties of GaBixAs1−x and related alloys, and our analysis is reinforced throughout by a series of detailed comparisons to the results of experimental measurements. Our k•p models of the band structure of GaBixAs1−x and related alloys, which we derive directly from detailed atomistic calculations, are ideally suited to the study of dilute bismide-based devices. We focus in the latter part of the thesis on calculations of the electronic and optical properties of dilute bismide quantum well lasers. In addition to developing an understanding of the effects of Bi incorporation on the operational characteristics of semiconductor lasers, we also present calculations which have been used explicitly in designing and optimising the first generation of GaBixAs1−x-based devices.

Policy-induced technology adoption: Evidence from the U.S. lead phasedown

Theory suggests that economic instruments, such as pollution taxes or tradable permits, can provide more efficient technology adoption incentives than conventional regulatory standards. We explore this issue for an important industry undergoing dramatic decreases in allowed pollution - the U.S. petroleum industry's phasedown of lead in gasoline. Using a duration model applied to a panel of refineries from 1971-1995, we find that the pattern of technology adoption is consistent with an economic response to market incentives, plant characteristics, and alternative policies. Importantly, evidence suggests that the tradable permit system used during the phasedown provided incentives for more efficient technology adoption decisions.

Modelling the performance of lead-Free solder interconnects for copper bumped flip-chip devices

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Application of CFD in vacuum dezincing process

Most lead bullion is refined by pyrometallurgical methods - this involves a serics of processes that remove the antimony (softening) silver (Parkes process), zinc (vacuum dezincing) and if need be, bismuth (Betterton-Kroll process). The first step, softening, removes the antimony, arsenic and tin by air oxidation in a furnace or by the Harris process. Next, in the Parkes process, zinc is added to the melt to remove the silver and gold. Insoluble zinc, silver and gold compounds are skimmed off from the melt surface. Excess zinc added during desilvering is removed from lead bullion using one of ghree methods: * Vacuum dezincing; * Chlorine dezincing; or * Harris dezincing. The present study concentrates on the Vacuum dezincing process for lead refining. The main aims of the research are to develop mathematical model(s), using Computational Fluid Dyanmics (CFD) a Surface Averaged Model (SAM), to predict the process behaviour under various operating conditions, thus providing detailed information of the process - insight into its reaction to changes of key operating parameters. Finally, the model will be used to optimise the process in terms of initial feed concentration, temperature, vacuum height cooling rate, etc.

Numerical simulation of vacuum dezincing of lead alloy

Removing zinc by distillation can leave the lead bullion virtually free of zinc and also produces pure zinc crystals. Batch distillation is considered in a hemispherical kettle with water-cooled lid, under high vacuum (50 Pa or less). Sufficient zinc concentration at the evaporating surface is achieved by means of a mechanical stirrer. The numerical model is based on the multiphysics simulation package PHYSICA. The fluid flow module of the code is used to simulate the action of the stirring impeller and to determine the temperature and concentration fields throughout the liquid volume including the evaporating surface. The rate of zinc evaporation and condensation is then modelled using Langmuir’s equations. Diffusion of the zinc vapour through the residual air in the vacuum gap is also taken into account. Computed results show that the mixing is sufficient and the rate-limiting step of the process is the surface evaporation driven by the difference of the equilibrium vapour pressure and the actual partial pressure of zinc vapour. However, at higher zinc concentrations, the heat transfer through the growing zinc crystal crust towards the cold steel lid may become the limiting factor because the crystallization front may reach the melting point. The computational model can be very useful in optimising the process within its safe limits.

Intermetallic phase detection in lead-free solders using synchrotron X-ray diffraction

The high-intensity, high-resolution x-ray source at the European Synchrotron Radiation Facility (ESRF) has been used in x-ray diffraction (XRD) experiments to detect intermetallic compounds (IMCs) in lead-free solder bumps. The IMCs found in 95.5Sn3.8Ag0.7Cu solder bumps on Cu pads with electroplated-nickel immersion-gold (ENIG) surface finish are consistent with results based on traditional destructive methods. Moreover, after positive identification of the IMCs from the diffraction data, spatial distribution plots over the entire bump were obtained. These spatial distributions for selected intermetallic phases display the layer thickness and confirm the locations of the IMCs. For isothermally aged solder samples, results have shown that much thicker layers of IMCs have grown from the pad interface into the bulk of the solder. Additionally, the XRD technique has also been used in a temperature-resolved mode to observe the formation of IMCs, in situ, during the solidification of the solder joint. The results demonstrate that the XRD technique is very attractive as it allows for nondestructive investigations to be performed on expensive state-of-the-art electronic components, thereby allowing new, lead-free materials to be fully characterized.

Modelling the Performance of Flexible Substrates for Lead-Free Applications

In this paper, the performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track. Secondly, an ACF flip chip was taken as a typical lead-free application of the flex substrate. The reflow effect on the reliability of ACF interconnections was analyzed. Higher stress was identified along the interface between the conductive particle and the metallization, and the interfacial stress increases with the reflow peak temperature and the coefficient of thermal expansion (CTE) of the adhesive. The moisture effect on the reliability of ACF joints were studied using a macro-micro modeling technique, the predominantly tensile stress found at the interface between the conductive particle and metallization could reduce the contact area and even cause the electrical failure. Modeling results are consistent with the findings in the experimental work

Modelling the Lamination Process for Ruggedised Displays

Active matrix liquid crystal displays (AMLCD) need to be protected in severe environments. This is achieved through a ruggedisation process, where the display is laminated with cover glasses to become a more robust structure. The ruggedisation process can in itself cause stresses in the display and this can lead to delamination failures during the lamination process, during qualification testing or in-service. Controlling the magnitude of stress in a display during the lamination process is of course very important and this depends highly on the materials used. This paper discusses the use of finite element analysis to investigate the use of different materials in the lamination process and how such materials can affect the stress magnitude in the display.

Optimising the wave soldering process for lead free solders

Nitrogen is now used in wave soldering machines to help lower the amount of dross that can be formed on the solder bath surface. The paper provides details on the use of computational fluid dynamics in helping understand the flow profiles of nitrogen in a wave soldering machine and to predict the concentration of nitrogen and oxygen around the solder bath.

Modeling the effect of lead-free soldering on flexible substrates

Flexible Circuit Boards (FPCs) are now being widely used in the electronic industries especially in the areas of electronic packages. Due to European lead-free legislation which has been implemented since July 2006, electronic packaging industries have to switch to use in the lead-free soldering technology. This change has posed a number of challenges in terms of development of lead-free solders and compatible substrates. An increase of at least 20-50 degrees in the reflow temperature is a concern and substantial research is required to investigate a sustainable design of flexible circuit boards as carrier substrates. This paper investigates a number of design variables such as copper conductor width, type of substrate materials, effect of insulating materials, etc. Computer modeling has been used to investigate thermo-mechanical behavior, and reliability, of flexible substrates after they have been subjected to a lead- free solder processing. Results will show particular designs that behave better for a particular rise in peak reflow temperature. Also presented will be the types of failures that can occur in these substrates and what particular materials are more reliable.

Analyzing the performance of flexible substrates for lead-free applications

The performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track and the thickness of the flex. Secondly, an anisotropic conductive film (ACF) flip chip was taken as a typical lead-free application of the flex substrate and the moisture effect on the reliability of ACF joints were studied using a 3D macro-micro modeling technique. It is found that the time to be saturated of an ACF flip chip is much dependent on the moisture diffusion rate in the polyimide substrate. The majority moisture diffuses into the ACF layer from the substrate side rather than the periphery of the ACF. The moisture induced stress was predicted and the predominant tensile stress was found at the interface between the conductive particle and metallization which could reduce the contact area and even cause the electrical failure

Thermal-mechanical analysis of flexible substrates during lead-free solder reflow

This paper presents modeling results about the performance of flexible substrates when subjected to higher lead-free reflow temperatures. Both adhesiveless and adhesive types of polyimide substrates were studied. Finite element (FE) models of flex substrates were built, two copper tracks located in the centre of the substrate was considered. The thermal induced shear stress in the flex substrate during the lead-free reflow process was studied and the effect of the design changes including the track thickness, flex thickness, and copper width were studied. For both types of flexes, the one of most important variables for minimizing damage to the substrate is the height of the copper tracks. The height of flex and the width of copper track show less impact. Beside of the geometry effects, the increase in reflow peak temperature can also result in a significant increase in the interfacial stress between the copper track and flex. Higher stresses were identified within the adhesive flex due to the big CTE mismatch between the copper and adhesive/dielectric

Performance and reliability of flexible substrates when subjected to lead-free processing

The use of flexible substrates is growing in many applications such as computer peripherals, hand held devices, telecommunications, automotive, aerospace, etc. The drive to adopt flexible circuits is due to their ability to reduce size, weight, assembly time and cost of the final product.They also accommodate flexibility by allowing relative movement between component parts and provide a route for three dimensional packaging. This paper will describe some of the current research results from the Flex-No-Lead project, a European Commission sponsored research program. The principle aim of this project is to investigate the processing, performance, and reliability of flexible substrates when subjected to new environmentally friendly, lead-free soldering technologies. This paper will discuss the impact of specific design variables on performance and reliability. In particular the paper will focus on copper track designs, substrate material, dielectric material and solder-mask defined joints.

Effect of reflow profile and thermal cycle ageing on the intermetallic formation and growth in lead-free soldering

The formation and growth of intermetallic compound layer thickness is one of the important issues in search for reliable electronic and electrical connections. Intermetallic compounds (IMCs) are an essential part of solder joints. At low levels, they have a strengthening effect on the joint; but at higher levels, they tend to make solder joints more brittle. If the solder joint is subjected to long-standing exposure of high temperature, this could result in continuous growth of intermetallic compound layer. The brittle intermetallic compound layer formed in this way is very much prone to fracture and cold therefore lead to mechanical and electrical failure of the joint. Therefore, the primary aim of this study is to investigate the growth of intermetallic compound layer thickness subjected to five different reflow profiles. The study also looks at the effect of three different temperature cycles (with maximum cycle temperature of 25 0C, 40 0C and 60 0C) on intermetallic compound formation and their growth behaviour.. Two different Sn-Ag-Cu solder pastes (namely paste P1 and paste P2) which were different in flux medium, were used for the study. The result showed that the growth of intermetallic compound layer thickness was a function of ageing temperature. It was found that the rate of growth of intermetallic compound layer thickness of paste P1 was higher than paste P2 at the same temperature condition. This behaviour could be related to the differences in flux mediums of solder paste samples used.

Investigation of wall-slip behaviour in lead-free solder pastes and isotropic conductive adhesives

Slippage due to wall depletion effect is well-known in rheological investigation. The aim of this study was to investigate the influence of the paste microstructure on slip formation for the paste materials (lead-free solder paste and isotropic conductive adhesives). The effect of different flowgeometries, gap heights and surface roughness on the paste viscosity was investigated. The utilisation of different measuring geometries has not clearly showed the presence of wall-slip in the paste samples. The existence of wall-slip was found to be pronounced when gap heights were varied using the parallel plate geometry. It was also found that altering the surface roughness of the parallel plate measuring geometry did not significantly eliminate wall-slip as expected. But results indicate that the use of a relatively rough surface helps to increase paste adhesion to the plates and to a certain extent inducing structural breakdown in the paste. Most importantly, the study also demonstrated on how the wall-slip formation in the paste material could be utilised for understanding of the paste microstructure and its flow behaviour.