983 resultados para Freezing and processing


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El interés creciente en encontrar alimentos precocinados congelados que se asemejen a productos naturales, capaces de superar un procesado con el menor daño, ha generado un aumento en el estudio de nuevos productos en este campo de la investigación. Las características de cada matriz alimentaria, la composición y estructura de los ingredientes, así como el efecto de las interacciones entre ellos, modifica la textura, estructura y las propiedades físicas y sensoriales del alimento, así como su aceptación por el consumidor. En este contexto, la investigación realizada en esta tesis doctoral se ha llevado a cabo en puré de patata considerado como una matriz alimentaria semisólida y se ha centrado en analizar los efectos de la concentración y modificación de la composición en las propiedades reológicas y de textura, en las propiedades físico-químicas y estructurales, así como en los atributos sensoriales de los purés de patata cuando a estos se le añaden diferentes ingredientes funcionales como fibra de guisante, inulina, aceite de oliva, aislado de proteína de soja, ácidos grasos omega 3 y/o sus mezclas. Para ello, se han realizado cuatro estudios donde se determinan las propiedades reológicas mediante ensayos dinámicos oscilatorios y en estado estacionario, los parámetros instrumentales de textura mediante ensayos de extrusión inversa y de penetración cónica, además de los cambios estructurales a través de cromatografía iónica con detector de pulsos amperométrico, cromatografía de gases con detector de ionización de llama y microscopía electrónica de barrido. Conjuntamente, se han evaluado los atributos sensoriales de los diferentes purés generando los descriptores que mejor definen la calidad sensorial del producto, utilizando un panel de jueces entrenados y valorándose la aceptación global de los nuevos productos mediante un panel de consumidores. En un primer estudio, el puré de patata natural congelado elaborado con crioprotectores se enriqueció con fibra dietética insoluble (fibra de guisante), fibra dietética soluble (inulina) y sus mezclas. La fibra de guisante influyó significativa y negativamente en la textura del puré de patata, percibiéndose en el producto un incremento de la dureza y de la arenosidad, mientras que la inulina produjo un ablandamiento del sistema. En un segundo estudio, el puré de patata natural fresco y congelado/descongelado elaborado con y sin crioprotectores, se enriqueció con fibra dietética soluble (inulina), aceite de oliva virgen extra y sus mezclas. La adición de estos dos ingredientes generó un ablandamiento de la matriz del sistema, produciéndose, sin embargo, un efecto sinérgico entre ambos ingredientes funcionales. La inulina tuvo un efecto más significativo en la viscosidad aparente del producto, mientras que el aceite de oliva virgen extra afectó más significativamente a la pseudoplasticidad, al índice de consistencia y a la viscosidad plástica del mismo. El proceso de congelación y descongelación utilizado favoreció la reducción del tamaño de las partículas de inulina haciéndolas imperceptibles al paladar, obteniéndose productos más cremosos y con mayor aceptabilidad global que sus homólogos frescos. En un tercer estudio, el puré de patata natural fresco y congelado/descongelado elaborado con crioprotectores se enriqueció con mezclas de fibra dietética soluble (inulina) y aislado de proteína de soja. Los resultados demostraron que el ciclo de congelación y descongelación realizado no afecta el grado de polimerización de la inulina. La estructura química de la inulina tampoco se vio afectada por la incorporación de la soja. El proceso de congelación/descongelación, así como la adición de concentraciones altas de inulina y bajas de aislado de proteína de soja, favorecen la disminución de la contribución de la componente viscosa en las propiedades viscoelásticas del puré de patata. La cremosidad fue el único atributo sensorial que presentó una correlación lineal significativa entre las puntuaciones otorgadas por panelistas entrenados y no entrenados. Por último, se elaboró un puré de patata natural fresco y congelado/descongelado optimizado con crioprotectores y enriquecido con la suma de ácido docosahexaenoico (DHA, C22:6 n-3) y ácido eicosapentaenoico (EPA, C20:5 n-3) y con ácido α-linolénico (ALA, C18:3 n-3) microencapsulados. El ciclo de congelación y descongelación no afectó al perfil de ácidos grasos del puré de patata. La adición de omega 3 procedente de aceites de lino y pescado microencapsulados mejora los indicadores nutricionales que definen la calidad de la grasa, obteniéndose un producto más saludable. ABSTRACT The growing interest in finding frozen precooked products that are like a natural product and capable of withstanding initial processing with minimum damage and remaining stable during preservation and reheating prior to consumption has generated an increase in studies of new products in this field of research. The characteristics of each food matrix, the composition and structure of the ingredients and the effect of interactions between them alter the texture, structure and physical and sensory properties of the food product and its acceptance by the consumer. In this context, the research conducted in this doctoral thesis was carried out on mashed potato, considered as a semi-solid food matrix, and focused on analysing the effects of concentration and modification of the composition of the mashed potato matrix on the rheological and textural properties, physicochemical and structural properties and sensory attributes of mashed potato when various functional ingredients are added to it, such as pea fibre, inulin, olive oil, soy protein isolate, omega 3 fatty acids and/or mixtures of these ingredients. Four studies were conducted for this purpose. Rheological properties were determined by oscillatory dynamic tests and stationary state tests, and instrumental texture parameters by backward extrusion and cone penetration tests. Structural changes were studied by ion chromatography with pulsed amperometric detector, gas chromatography with flame ionisation detector and scanning electron microscopy. The sensory attributes of the various mashed potato mixtures were evaluated by generating the descriptors that best defined the sensory quality of the products and using a panel of trained judges, and overall acceptance of the new products was evaluated by a panel of consumers. In the first study, frozen natural mashed potato incorporating cryoprotectants was enriched with insoluble dietary fibre (pea fibre), soluble dietary fibre (inulin) and mixtures of the two. Pea fibre had a significant negative influence on the texture of the mashed potato, producing an increase in hardness and granularity, whereas inulin produced a softening of the system. In the second study, fresh and frozen/thawed natural mashed potato prepared with and without cryoprotectants was enriched with soluble dietary fibre (inulin), extra virgin olive oil and mixtures of the two. The addition of these two ingredients generated softening of the matrix of the system, but a synergic effect between the two functional ingredients was produced. Inulin had a more significant effect on the apparent viscosity of the product, whereas extra virgin olive oil had a more significant effect on its pseudoplasticity, consistency index and plastic viscosity. The freezing and thawing process that was used contributed to a reduction in the size of the inulin particles, making them imperceptible to the palate and producing creamier products with greater overall acceptability than their fresh equivalents. In the third study, the fresh and frozen/thawed natural mashed potato incorporating cryoprotectants was enriched with mixtures of soluble dietary fibre (inulin) and soy protein isolate. The results showed that the freezing and thawing process that was performed did not affect the degree of polymerisation of the inulin. The chemical structure of the inulin was also not affected by the incorporation of soy. The freezing and thawing process and the addition of high concentrations of inulin and low concentrations of soy protein isolate favoured a decrease in the contribution of the viscous component to the viscoelastic properties of the mashed potato. Creaminess was the only sensory attribute that presented a significant linear correlation between the scores given by trained and untrained panellists. Lastly, fresh and frozen/thawed natural mashed potato optimised with cryoprotectants was prepared and enriched with the sum of docosahexaenoic acid (DHA, C22:6 n-3) and eicosapentaenoic acid (EPA, C20:5 n-3) and with α-linolenic acid (ALA, C18:3 n-3), microencapsulated. The freezing and thawing process did not affect the fatty acid profile of the mashed potato. The addition of omega 3 obtained from microencapsulated linseed and fish oils improved the nutritional indicators that define the quality of the fat, producing a healthier product.

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Current fusion devices consist of multiple diagnostics and hundreds or even thousands of signals. This situation forces on multiple occasions to use distributed data acquisition systems as the best approach. In this type of distributed systems, one of the most important issues is the synchronization between signals, so that it is possible to have a temporal correlation as accurate as possible between the acquired samples of all channels. In last decades, many fusion devices use different types of video cameras to provide inside views of the vessel during operations and to monitor plasma behavior. The synchronization between each video frame and the rest of the different signals acquired from any other diagnostics is essential in order to know correctly the plasma evolution, since it is possible to analyze jointly all the information having accurate knowledge of their temporal correlation. The developed system described in this paper allows timestamping image frames in a real-time acquisition and processing system using 1588 clock distribution. The system has been implemented using FPGA based devices together with a 1588 synchronized timing card (see Fig.1). The solution is based on a previous system [1] that allows image acquisition and real-time image processing based on PXIe technology. This architecture is fully compatible with the ITER Fast Controllers [2] and offers integration with EPICS to control and monitor the entire system. However, this set-up is not able to timestamp the frames acquired since the frame grabber module does not present any type of timing input (IRIG-B, GPS, PTP). To solve this lack, an IEEE1588 PXI timing device its used to provide an accurate way to synchronize distributed data acquisition systems using the Precision Time Protocol (PTP) IEEE 1588 2008 standard. This local timing device can be connected to a master clock device for global synchronization. The timing device has a buffer timestamp for each PXI trigger line and requires tha- a software application assigns each frame the corresponding timestamp. The previous action is critical and cannot be achieved if the frame rate is high. To solve this problem, it has been designed a solution that distributes the clock from the IEEE 1588 timing card to all FlexRIO devices [3]. This solution uses two PXI trigger lines that provide the capacity to assign timestamps to every frame acquired and register events by hardware in a deterministic way. The system provides a solution for timestamping frames to synchronize them with the rest of the different signals.

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Los sistemas empotrados han sido concebidos tradicionalmente como sistemas de procesamiento específicos que realizan una tarea fija durante toda su vida útil. Para cumplir con requisitos estrictos de coste, tamaño y peso, el equipo de diseño debe optimizar su funcionamiento para condiciones muy específicas. Sin embargo, la demanda de mayor versatilidad, un funcionamiento más inteligente y, en definitiva, una mayor capacidad de procesamiento comenzaron a chocar con estas limitaciones, agravado por la incertidumbre asociada a entornos de operación cada vez más dinámicos donde comenzaban a ser desplegados progresivamente. Esto trajo como resultado una necesidad creciente de que los sistemas pudieran responder por si solos a eventos inesperados en tiempo diseño tales como: cambios en las características de los datos de entrada y el entorno del sistema en general; cambios en la propia plataforma de cómputo, por ejemplo debido a fallos o defectos de fabricación; y cambios en las propias especificaciones funcionales causados por unos objetivos del sistema dinámicos y cambiantes. Como consecuencia, la complejidad del sistema aumenta, pero a cambio se habilita progresivamente una capacidad de adaptación autónoma sin intervención humana a lo largo de la vida útil, permitiendo que tomen sus propias decisiones en tiempo de ejecución. Éstos sistemas se conocen, en general, como sistemas auto-adaptativos y tienen, entre otras características, las de auto-configuración, auto-optimización y auto-reparación. Típicamente, la parte soft de un sistema es mayoritariamente la única utilizada para proporcionar algunas capacidades de adaptación a un sistema. Sin embargo, la proporción rendimiento/potencia en dispositivos software como microprocesadores en muchas ocasiones no es adecuada para sistemas empotrados. En este escenario, el aumento resultante en la complejidad de las aplicaciones está siendo abordado parcialmente mediante un aumento en la complejidad de los dispositivos en forma de multi/many-cores; pero desafortunadamente, esto hace que el consumo de potencia también aumente. Además, la mejora en metodologías de diseño no ha sido acorde como para poder utilizar toda la capacidad de cómputo disponible proporcionada por los núcleos. Por todo ello, no se están satisfaciendo adecuadamente las demandas de cómputo que imponen las nuevas aplicaciones. La solución tradicional para mejorar la proporción rendimiento/potencia ha sido el cambio a unas especificaciones hardware, principalmente usando ASICs. Sin embargo, los costes de un ASIC son altamente prohibitivos excepto en algunos casos de producción en masa y además la naturaleza estática de su estructura complica la solución a las necesidades de adaptación. Los avances en tecnologías de fabricación han hecho que la FPGA, una vez lenta y pequeña, usada como glue logic en sistemas mayores, haya crecido hasta convertirse en un dispositivo de cómputo reconfigurable de gran potencia, con una cantidad enorme de recursos lógicos computacionales y cores hardware empotrados de procesamiento de señal y de propósito general. Sus capacidades de reconfiguración han permitido combinar la flexibilidad propia del software con el rendimiento del procesamiento en hardware, lo que tiene la potencialidad de provocar un cambio de paradigma en arquitectura de computadores, pues el hardware no puede ya ser considerado más como estático. El motivo es que como en el caso de las FPGAs basadas en tecnología SRAM, la reconfiguración parcial dinámica (DPR, Dynamic Partial Reconfiguration) es posible. Esto significa que se puede modificar (reconfigurar) un subconjunto de los recursos computacionales en tiempo de ejecución mientras el resto permanecen activos. Además, este proceso de reconfiguración puede ser ejecutado internamente por el propio dispositivo. El avance tecnológico en dispositivos hardware reconfigurables se encuentra recogido bajo el campo conocido como Computación Reconfigurable (RC, Reconfigurable Computing). Uno de los campos de aplicación más exóticos y menos convencionales que ha posibilitado la computación reconfigurable es el conocido como Hardware Evolutivo (EHW, Evolvable Hardware), en el cual se encuentra enmarcada esta tesis. La idea principal del concepto consiste en convertir hardware que es adaptable a través de reconfiguración en una entidad evolutiva sujeta a las fuerzas de un proceso evolutivo inspirado en el de las especies biológicas naturales, que guía la dirección del cambio. Es una aplicación más del campo de la Computación Evolutiva (EC, Evolutionary Computation), que comprende una serie de algoritmos de optimización global conocidos como Algoritmos Evolutivos (EA, Evolutionary Algorithms), y que son considerados como algoritmos universales de resolución de problemas. En analogía al proceso biológico de la evolución, en el hardware evolutivo el sujeto de la evolución es una población de circuitos que intenta adaptarse a su entorno mediante una adecuación progresiva generación tras generación. Los individuos pasan a ser configuraciones de circuitos en forma de bitstreams caracterizados por descripciones de circuitos reconfigurables. Seleccionando aquellos que se comportan mejor, es decir, que tienen una mejor adecuación (o fitness) después de ser evaluados, y usándolos como padres de la siguiente generación, el algoritmo evolutivo crea una nueva población hija usando operadores genéticos como la mutación y la recombinación. Según se van sucediendo generaciones, se espera que la población en conjunto se aproxime a la solución óptima al problema de encontrar una configuración del circuito adecuada que satisfaga las especificaciones. El estado de la tecnología de reconfiguración después de que la familia de FPGAs XC6200 de Xilinx fuera retirada y reemplazada por las familias Virtex a finales de los 90, supuso un gran obstáculo para el avance en hardware evolutivo; formatos de bitstream cerrados (no conocidos públicamente); dependencia de herramientas del fabricante con soporte limitado de DPR; una velocidad de reconfiguración lenta; y el hecho de que modificaciones aleatorias del bitstream pudieran resultar peligrosas para la integridad del dispositivo, son algunas de estas razones. Sin embargo, una propuesta a principios de los años 2000 permitió mantener la investigación en el campo mientras la tecnología de DPR continuaba madurando, el Circuito Virtual Reconfigurable (VRC, Virtual Reconfigurable Circuit). En esencia, un VRC en una FPGA es una capa virtual que actúa como un circuito reconfigurable de aplicación específica sobre la estructura nativa de la FPGA que reduce la complejidad del proceso reconfiguración y aumenta su velocidad (comparada con la reconfiguración nativa). Es un array de nodos computacionales especificados usando descripciones HDL estándar que define recursos reconfigurables ad-hoc: multiplexores de rutado y un conjunto de elementos de procesamiento configurables, cada uno de los cuales tiene implementadas todas las funciones requeridas, que pueden seleccionarse a través de multiplexores tal y como ocurre en una ALU de un microprocesador. Un registro grande actúa como memoria de configuración, por lo que la reconfiguración del VRC es muy rápida ya que tan sólo implica la escritura de este registro, el cual controla las señales de selección del conjunto de multiplexores. Sin embargo, esta capa virtual provoca: un incremento de área debido a la implementación simultánea de cada función en cada nodo del array más los multiplexores y un aumento del retardo debido a los multiplexores, reduciendo la frecuencia de funcionamiento máxima. La naturaleza del hardware evolutivo, capaz de optimizar su propio comportamiento computacional, le convierten en un buen candidato para avanzar en la investigación sobre sistemas auto-adaptativos. Combinar un sustrato de cómputo auto-reconfigurable capaz de ser modificado dinámicamente en tiempo de ejecución con un algoritmo empotrado que proporcione una dirección de cambio, puede ayudar a satisfacer los requisitos de adaptación autónoma de sistemas empotrados basados en FPGA. La propuesta principal de esta tesis está por tanto dirigida a contribuir a la auto-adaptación del hardware de procesamiento de sistemas empotrados basados en FPGA mediante hardware evolutivo. Esto se ha abordado considerando que el comportamiento computacional de un sistema puede ser modificado cambiando cualquiera de sus dos partes constitutivas: una estructura hard subyacente y un conjunto de parámetros soft. De esta distinción, se derivan dos lineas de trabajo. Por un lado, auto-adaptación paramétrica, y por otro auto-adaptación estructural. El objetivo perseguido en el caso de la auto-adaptación paramétrica es la implementación de técnicas de optimización evolutiva complejas en sistemas empotrados con recursos limitados para la adaptación paramétrica online de circuitos de procesamiento de señal. La aplicación seleccionada como prueba de concepto es la optimización para tipos muy específicos de imágenes de los coeficientes de los filtros de transformadas wavelet discretas (DWT, DiscreteWavelet Transform), orientada a la compresión de imágenes. Por tanto, el objetivo requerido de la evolución es una compresión adaptativa y más eficiente comparada con los procedimientos estándar. El principal reto radica en reducir la necesidad de recursos de supercomputación para el proceso de optimización propuesto en trabajos previos, de modo que se adecúe para la ejecución en sistemas empotrados. En cuanto a la auto-adaptación estructural, el objetivo de la tesis es la implementación de circuitos auto-adaptativos en sistemas evolutivos basados en FPGA mediante un uso eficiente de sus capacidades de reconfiguración nativas. En este caso, la prueba de concepto es la evolución de tareas de procesamiento de imagen tales como el filtrado de tipos desconocidos y cambiantes de ruido y la detección de bordes en la imagen. En general, el objetivo es la evolución en tiempo de ejecución de tareas de procesamiento de imagen desconocidas en tiempo de diseño (dentro de un cierto grado de complejidad). En este caso, el objetivo de la propuesta es la incorporación de DPR en EHW para evolucionar la arquitectura de un array sistólico adaptable mediante reconfiguración cuya capacidad de evolución no había sido estudiada previamente. Para conseguir los dos objetivos mencionados, esta tesis propone originalmente una plataforma evolutiva que integra un motor de adaptación (AE, Adaptation Engine), un motor de reconfiguración (RE, Reconfiguration Engine) y un motor computacional (CE, Computing Engine) adaptable. El el caso de adaptación paramétrica, la plataforma propuesta está caracterizada por: • un CE caracterizado por un núcleo de procesamiento hardware de DWT adaptable mediante registros reconfigurables que contienen los coeficientes de los filtros wavelet • un algoritmo evolutivo como AE que busca filtros wavelet candidatos a través de un proceso de optimización paramétrica desarrollado específicamente para sistemas caracterizados por recursos de procesamiento limitados • un nuevo operador de mutación simplificado para el algoritmo evolutivo utilizado, que junto con un mecanismo de evaluación rápida de filtros wavelet candidatos derivado de la literatura actual, asegura la viabilidad de la búsqueda evolutiva asociada a la adaptación de wavelets. En el caso de adaptación estructural, la plataforma propuesta toma la forma de: • un CE basado en una plantilla de array sistólico reconfigurable de 2 dimensiones compuesto de nodos de procesamiento reconfigurables • un algoritmo evolutivo como AE que busca configuraciones candidatas del array usando un conjunto de funcionalidades de procesamiento para los nodos disponible en una biblioteca accesible en tiempo de ejecución • un RE hardware que explota la capacidad de reconfiguración nativa de las FPGAs haciendo un uso eficiente de los recursos reconfigurables del dispositivo para cambiar el comportamiento del CE en tiempo de ejecución • una biblioteca de elementos de procesamiento reconfigurables caracterizada por bitstreams parciales independientes de la posición, usados como el conjunto de configuraciones disponibles para los nodos de procesamiento del array Las contribuciones principales de esta tesis se pueden resumir en la siguiente lista: • Una plataforma evolutiva basada en FPGA para la auto-adaptación paramétrica y estructural de sistemas empotrados compuesta por un motor computacional (CE), un motor de adaptación (AE) evolutivo y un motor de reconfiguración (RE). Esta plataforma se ha desarrollado y particularizado para los casos de auto-adaptación paramétrica y estructural. • En cuanto a la auto-adaptación paramétrica, las contribuciones principales son: – Un motor computacional adaptable mediante registros que permite la adaptación paramétrica de los coeficientes de una implementación hardware adaptativa de un núcleo de DWT. – Un motor de adaptación basado en un algoritmo evolutivo desarrollado específicamente para optimización numérica, aplicada a los coeficientes de filtros wavelet en sistemas empotrados con recursos limitados. – Un núcleo IP de DWT auto-adaptativo en tiempo de ejecución para sistemas empotrados que permite la optimización online del rendimiento de la transformada para compresión de imágenes en entornos específicos de despliegue, caracterizados por tipos diferentes de señal de entrada. – Un modelo software y una implementación hardware de una herramienta para la construcción evolutiva automática de transformadas wavelet específicas. • Por último, en cuanto a la auto-adaptación estructural, las contribuciones principales son: – Un motor computacional adaptable mediante reconfiguración nativa de FPGAs caracterizado por una plantilla de array sistólico en dos dimensiones de nodos de procesamiento reconfigurables. Es posible mapear diferentes tareas de cómputo en el array usando una biblioteca de elementos sencillos de procesamiento reconfigurables. – Definición de una biblioteca de elementos de procesamiento apropiada para la síntesis autónoma en tiempo de ejecución de diferentes tareas de procesamiento de imagen. – Incorporación eficiente de la reconfiguración parcial dinámica (DPR) en sistemas de hardware evolutivo, superando los principales inconvenientes de propuestas previas como los circuitos reconfigurables virtuales (VRCs). En este trabajo también se comparan originalmente los detalles de implementación de ambas propuestas. – Una plataforma tolerante a fallos, auto-curativa, que permite la recuperación funcional online en entornos peligrosos. La plataforma ha sido caracterizada desde una perspectiva de tolerancia a fallos: se proponen modelos de fallo a nivel de CLB y de elemento de procesamiento, y usando el motor de reconfiguración, se hace un análisis sistemático de fallos para un fallo en cada elemento de procesamiento y para dos fallos acumulados. – Una plataforma con calidad de filtrado dinámica que permite la adaptación online a tipos de ruido diferentes y diferentes comportamientos computacionales teniendo en cuenta los recursos de procesamiento disponibles. Por un lado, se evolucionan filtros con comportamientos no destructivos, que permiten esquemas de filtrado en cascada escalables; y por otro, también se evolucionan filtros escalables teniendo en cuenta requisitos computacionales de filtrado cambiantes dinámicamente. Este documento está organizado en cuatro partes y nueve capítulos. La primera parte contiene el capítulo 1, una introducción y motivación sobre este trabajo de tesis. A continuación, el marco de referencia en el que se enmarca esta tesis se analiza en la segunda parte: el capítulo 2 contiene una introducción a los conceptos de auto-adaptación y computación autonómica (autonomic computing) como un campo de investigación más general que el muy específico de este trabajo; el capítulo 3 introduce la computación evolutiva como la técnica para dirigir la adaptación; el capítulo 4 analiza las plataformas de computación reconfigurables como la tecnología para albergar hardware auto-adaptativo; y finalmente, el capítulo 5 define, clasifica y hace un sondeo del campo del hardware evolutivo. Seguidamente, la tercera parte de este trabajo contiene la propuesta, desarrollo y resultados obtenidos: mientras que el capítulo 6 contiene una declaración de los objetivos de la tesis y la descripción de la propuesta en su conjunto, los capítulos 7 y 8 abordan la auto-adaptación paramétrica y estructural, respectivamente. Finalmente, el capítulo 9 de la parte 4 concluye el trabajo y describe caminos de investigación futuros. ABSTRACT Embedded systems have traditionally been conceived to be specific-purpose computers with one, fixed computational task for their whole lifetime. Stringent requirements in terms of cost, size and weight forced designers to highly optimise their operation for very specific conditions. However, demands for versatility, more intelligent behaviour and, in summary, an increased computing capability began to clash with these limitations, intensified by the uncertainty associated to the more dynamic operating environments where they were progressively being deployed. This brought as a result an increasing need for systems to respond by themselves to unexpected events at design time, such as: changes in input data characteristics and system environment in general; changes in the computing platform itself, e.g., due to faults and fabrication defects; and changes in functional specifications caused by dynamically changing system objectives. As a consequence, systems complexity is increasing, but in turn, autonomous lifetime adaptation without human intervention is being progressively enabled, allowing them to take their own decisions at run-time. This type of systems is known, in general, as selfadaptive, and are able, among others, of self-configuration, self-optimisation and self-repair. Traditionally, the soft part of a system has mostly been so far the only place to provide systems with some degree of adaptation capabilities. However, the performance to power ratios of software driven devices like microprocessors are not adequate for embedded systems in many situations. In this scenario, the resulting rise in applications complexity is being partly addressed by rising devices complexity in the form of multi and many core devices; but sadly, this keeps on increasing power consumption. Besides, design methodologies have not been improved accordingly to completely leverage the available computational power from all these cores. Altogether, these factors make that the computing demands new applications pose are not being wholly satisfied. The traditional solution to improve performance to power ratios has been the switch to hardware driven specifications, mainly using ASICs. However, their costs are highly prohibitive except for some mass production cases and besidesthe static nature of its structure complicates the solution to the adaptation needs. The advancements in fabrication technologies have made that the once slow, small FPGA used as glue logic in bigger systems, had grown to be a very powerful, reconfigurable computing device with a vast amount of computational logic resources and embedded, hardened signal and general purpose processing cores. Its reconfiguration capabilities have enabled software-like flexibility to be combined with hardware-like computing performance, which has the potential to cause a paradigm shift in computer architecture since hardware cannot be considered as static anymore. This is so, since, as is the case with SRAMbased FPGAs, Dynamic Partial Reconfiguration (DPR) is possible. This means that subsets of the FPGA computational resources can now be changed (reconfigured) at run-time while the rest remains active. Besides, this reconfiguration process can be triggered internally by the device itself. This technological boost in reconfigurable hardware devices is actually covered under the field known as Reconfigurable Computing. One of the most exotic fields of application that Reconfigurable Computing has enabled is the known as Evolvable Hardware (EHW), in which this dissertation is framed. The main idea behind the concept is turning hardware that is adaptable through reconfiguration into an evolvable entity subject to the forces of an evolutionary process, inspired by that of natural, biological species, that guides the direction of change. It is yet another application of the field of Evolutionary Computation (EC), which comprises a set of global optimisation algorithms known as Evolutionary Algorithms (EAs), considered as universal problem solvers. In analogy to the biological process of evolution, in EHW the subject of evolution is a population of circuits that tries to get adapted to its surrounding environment by progressively getting better fitted to it generation after generation. Individuals become circuit configurations representing bitstreams that feature reconfigurable circuit descriptions. By selecting those that behave better, i.e., with a higher fitness value after being evaluated, and using them as parents of the following generation, the EA creates a new offspring population by using so called genetic operators like mutation and recombination. As generations succeed one another, the whole population is expected to approach to the optimum solution to the problem of finding an adequate circuit configuration that fulfils system objectives. The state of reconfiguration technology after Xilinx XC6200 FPGA family was discontinued and replaced by Virtex families in the late 90s, was a major obstacle for advancements in EHW; closed (non publicly known) bitstream formats; dependence on manufacturer tools with highly limiting support of DPR; slow speed of reconfiguration; and random bitstream modifications being potentially hazardous for device integrity, are some of these reasons. However, a proposal in the first 2000s allowed to keep investigating in this field while DPR technology kept maturing, the Virtual Reconfigurable Circuit (VRC). In essence, a VRC in an FPGA is a virtual layer acting as an application specific reconfigurable circuit on top of an FPGA fabric that reduces the complexity of the reconfiguration process and increases its speed (compared to native reconfiguration). It is an array of computational nodes specified using standard HDL descriptions that define ad-hoc reconfigurable resources; routing multiplexers and a set of configurable processing elements, each one containing all the required functions, which are selectable through functionality multiplexers as in microprocessor ALUs. A large register acts as configuration memory, so VRC reconfiguration is very fast given it only involves writing this register, which drives the selection signals of the set of multiplexers. However, large overheads are introduced by this virtual layer; an area overhead due to the simultaneous implementation of every function in every node of the array plus the multiplexers, and a delay overhead due to the multiplexers, which also reduces maximum frequency of operation. The very nature of Evolvable Hardware, able to optimise its own computational behaviour, makes it a good candidate to advance research in self-adaptive systems. Combining a selfreconfigurable computing substrate able to be dynamically changed at run-time with an embedded algorithm that provides a direction for change, can help fulfilling requirements for autonomous lifetime adaptation of FPGA-based embedded systems. The main proposal of this thesis is hence directed to contribute to autonomous self-adaptation of the underlying computational hardware of FPGA-based embedded systems by means of Evolvable Hardware. This is tackled by considering that the computational behaviour of a system can be modified by changing any of its two constituent parts: an underlying hard structure and a set of soft parameters. Two main lines of work derive from this distinction. On one side, parametric self-adaptation and, on the other side, structural self-adaptation. The goal pursued in the case of parametric self-adaptation is the implementation of complex evolutionary optimisation techniques in resource constrained embedded systems for online parameter adaptation of signal processing circuits. The application selected as proof of concept is the optimisation of Discrete Wavelet Transforms (DWT) filters coefficients for very specific types of images, oriented to image compression. Hence, adaptive and improved compression efficiency, as compared to standard techniques, is the required goal of evolution. The main quest lies in reducing the supercomputing resources reported in previous works for the optimisation process in order to make it suitable for embedded systems. Regarding structural self-adaptation, the thesis goal is the implementation of self-adaptive circuits in FPGA-based evolvable systems through an efficient use of native reconfiguration capabilities. In this case, evolution of image processing tasks such as filtering of unknown and changing types of noise and edge detection are the selected proofs of concept. In general, evolving unknown image processing behaviours (within a certain complexity range) at design time is the required goal. In this case, the mission of the proposal is the incorporation of DPR in EHW to evolve a systolic array architecture adaptable through reconfiguration whose evolvability had not been previously checked. In order to achieve the two stated goals, this thesis originally proposes an evolvable platform that integrates an Adaptation Engine (AE), a Reconfiguration Engine (RE) and an adaptable Computing Engine (CE). In the case of parametric adaptation, the proposed platform is characterised by: • a CE featuring a DWT hardware processing core adaptable through reconfigurable registers that holds wavelet filters coefficients • an evolutionary algorithm as AE that searches for candidate wavelet filters through a parametric optimisation process specifically developed for systems featured by scarce computing resources • a new, simplified mutation operator for the selected EA, that together with a fast evaluation mechanism of candidate wavelet filters derived from existing literature, assures the feasibility of the evolutionary search involved in wavelets adaptation In the case of structural adaptation, the platform proposal takes the form of: • a CE based on a reconfigurable 2D systolic array template composed of reconfigurable processing nodes • an evolutionary algorithm as AE that searches for candidate configurations of the array using a set of computational functionalities for the nodes available in a run time accessible library • a hardware RE that exploits native DPR capabilities of FPGAs and makes an efficient use of the available reconfigurable resources of the device to change the behaviour of the CE at run time • a library of reconfigurable processing elements featured by position-independent partial bitstreams used as the set of available configurations for the processing nodes of the array Main contributions of this thesis can be summarised in the following list. • An FPGA-based evolvable platform for parametric and structural self-adaptation of embedded systems composed of a Computing Engine, an evolutionary Adaptation Engine and a Reconfiguration Engine. This platform is further developed and tailored for both parametric and structural self-adaptation. • Regarding parametric self-adaptation, main contributions are: – A CE adaptable through reconfigurable registers that enables parametric adaptation of the coefficients of an adaptive hardware implementation of a DWT core. – An AE based on an Evolutionary Algorithm specifically developed for numerical optimisation applied to wavelet filter coefficients in resource constrained embedded systems. – A run-time self-adaptive DWT IP core for embedded systems that allows for online optimisation of transform performance for image compression for specific deployment environments characterised by different types of input signals. – A software model and hardware implementation of a tool for the automatic, evolutionary construction of custom wavelet transforms. • Lastly, regarding structural self-adaptation, main contributions are: – A CE adaptable through native FPGA fabric reconfiguration featured by a two dimensional systolic array template of reconfigurable processing nodes. Different processing behaviours can be automatically mapped in the array by using a library of simple reconfigurable processing elements. – Definition of a library of such processing elements suited for autonomous runtime synthesis of different image processing tasks. – Efficient incorporation of DPR in EHW systems, overcoming main drawbacks from the previous approach of virtual reconfigurable circuits. Implementation details for both approaches are also originally compared in this work. – A fault tolerant, self-healing platform that enables online functional recovery in hazardous environments. The platform has been characterised from a fault tolerance perspective: fault models at FPGA CLB level and processing elements level are proposed, and using the RE, a systematic fault analysis for one fault in every processing element and for two accumulated faults is done. – A dynamic filtering quality platform that permits on-line adaptation to different types of noise and different computing behaviours considering the available computing resources. On one side, non-destructive filters are evolved, enabling scalable cascaded filtering schemes; and on the other, size-scalable filters are also evolved considering dynamically changing computational filtering requirements. This dissertation is organized in four parts and nine chapters. First part contains chapter 1, the introduction to and motivation of this PhD work. Following, the reference framework in which this dissertation is framed is analysed in the second part: chapter 2 features an introduction to the notions of self-adaptation and autonomic computing as a more general research field to the very specific one of this work; chapter 3 introduces evolutionary computation as the technique to drive adaptation; chapter 4 analyses platforms for reconfigurable computing as the technology to hold self-adaptive hardware; and finally chapter 5 defines, classifies and surveys the field of Evolvable Hardware. Third part of the work follows, which contains the proposal, development and results obtained: while chapter 6 contains an statement of the thesis goals and the description of the proposal as a whole, chapters 7 and 8 address parametric and structural self-adaptation, respectively. Finally, chapter 9 in part 4 concludes the work and describes future research paths.

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La actividad volcánica interviene en multitud de facetas de la propia actividad humana, no siempre negativas. Sin embargo, son más los motivos de peligrosidad y riesgo que incitan al estudio de la actividad volcánica. Existen razones de seguridad que inciden en el mantenimiento del seguimiento y monitorización de la actividad volcánica para garantizar la vida y la seguridad de los asentamientos antrópicos en las proximidades de los edificios volcánicos. En esta tesis se define e implementa un sistema de monitorización de movimientos de la corteza en las islas de Tenerife y La Palma, donde el impacto social que representa un aumento o variación de la actividad volcánica en las islas es muy severo. Aparte de la alta densidad demográfica del Archipiélago, esta población aumenta significativamente, en diferentes periodos a lo largo del año, debido a la actividad turística que representa la mayor fuente de ingresos de las islas. La población y los centros turísticos se diseminan predominantemente a lo largo de las costas y también a lo largo de los flancos de los edificios volcánicos. Quizá el mantenimiento de estas estructuras sociales y socio-económicas son los motivos más importantes que justifican una monitorización de la actividad volcánica en las Islas Canarias. Recientemente se ha venido trabajando cada vez más en el intento de predecir la actividad volcánica utilizando los nuevos sistemas de monitorización geodésica, puesto que la actividad volcánica se manifiesta anteriormente por deformación de la corteza terrestre y cambios en la fuerza de la gravedad en la zona donde más tarde se registran eventos volcánicos. Los nuevos dispositivos y sensores que se han desarrollado en los últimos años en materias como la geodesia, la observación de la Tierra desde el espacio y el posicionamiento por satélite, han permitido observar y medir tanto la deformación producida en el terreno como los cambios de la fuerza de la gravedad antes, durante y posteriormente a los eventos volcánicos que se producen. Estos nuevos dispositivos y sensores han cambiado las técnicas o metodologías geodésicas que se venían utilizando hasta la aparición de los mismos, renovando métodos clásicos y desarrollando otros nuevos que ya se están afianzando como metodologías probadas y reconocidas para ser usadas en la monitorización volcánica. Desde finales de la década de los noventa del siglo pasado se han venido desarrollando en las Islas Canarias varios proyectos que han tenido como objetivos principales el desarrollo de nuevas técnicas de observación y monitorización por un lado y el diseño de una metodología de monitorización volcánica adecuada, por otro. Se presenta aquí el estudio y desarrollo de técnicas GNSS para la monitorización de deformaciones corticales y su campo de velocidades para las islas de Tenerife y La Palma. En su implementación, se ha tenido en cuenta el uso de la infraestructura geodésica y de monitorización existente en el archipiélago a fin de optimizar costes, además de complementarla con nuevas estaciones para dar una cobertura total a las dos islas. Los resultados obtenidos en los proyectos, que se describen en esta memoria, han dado nuevas perspectivas en la monitorización geodésica de la actividad volcánica y nuevas zonas de interés que anteriormente no se conocían en el entorno de las Islas Canarias. Se ha tenido especial cuidado en el tratamiento y propagación de los errores durante todo el proceso de observación, medida y proceso de los datos registrados, todo ello en aras de cuantificar el grado de fiabilidad de los resultados obtenidos. También en este sentido, los resultados obtenidos han sido verificados con otros procedentes de sistemas de observación radar de satélite, incorporando además a este estudio las implicaciones que el uso conjunto de tecnologías radar y GNSS tendrán en un futuro en la monitorización de deformaciones de la corteza terrestre. ABSTRACT Volcanic activity occurs in many aspects of human activity, and not always in a negative manner. Nonetheless, research into volcanic activity is more likely to be motivated by its danger and risk. There are security reasons that influence the monitoring of volcanic activity in order to guarantee the life and safety of human settlements near volcanic edifices. This thesis defines and implements a monitoring system of movements in the Earth’s crust in the islands of Tenerife and La Palma, where the social impact of an increase (or variation) of volcanic activity is very severe. Aside from the high demographic density of the archipelago, the population increases significantly in different periods throughout the year due to tourism, which represents a major source of revenue for the islands. The population and the tourist centres are mainly spread along the coasts and also along the flanks of the volcanic edifices. Perhaps the preservation of these social and socio-economic structures is the most important reason that justifies monitoring volcanic activity in the Canary Islands. Recently more and more work has been done with the intention of predicting volcanic activity, using new geodesic monitoring systems, since volcanic activity is evident prior to eruption because of a deformation of the Earth’s crust and changes in the force of gravity in the zone where volcanic events will later be recorded. The new devices and sensors that have been developed in recent years in areas such as geodesy, the observation of the Earth from space, and satellite positioning have allowed us to observe and measure the deformation produced in the Earth as well as the changes in the force of gravity before, during, and after the volcanic events occur. The new devices and sensors have changed the geodetic techniques and methodologies that were used previously. The classic methods have been renovated and other newer ones developed that are now vouched for as proven recognised methodologies to be used for volcanic monitoring. Since the end of the 1990s, in the Canary Islands various projects have been developed whose principal aim has been the development of new observation and monitoring techniques on the one hand, and the design of an appropriate volcanic monitoring methodology on the other. The study and development of GNSS techniques for the monitoring of crustal deformations and their velocity field is presented here. To carry out the study, the use of geodetic infrastructure and existing monitoring in the archipelago have been taken into account in order to optimise costs, besides complementing it with new stations for total coverage on both islands. The results obtained in the projects, which are described below, have produced new perspectives in the geodetic monitoring of volcanic activity and new zones of interest which previously were unknown in the environment of the Canary Islands. Special care has been taken with the treatment and propagation of errors during the entire process of observing, measuring, and processing the recorded data. All of this was done in order to quantify the degree of trustworthiness of the results obtained. Also in this sense, the results obtained have been verified with others from satellite radar observation systems, incorporating as well in this study the implications that the joint use of radar technologies and GNSS will have for the future of monitoring deformations in the Earth’s crust.

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Communication between the 5′ and 3′ ends is a common feature of several aspects of eukaryotic mRNA metabolism. In the nucleus, the pre-mRNA 5′ end is bound by the nuclear cap binding complex (CBC). This RNA–protein complex plays an active role in both splicing and RNA export. We provide evidence for participation of CBC in the processing of the 3′ end of the message. Depletion of CBC from HeLa cell nuclear extract strongly reduced the endonucleolytic cleavage step of the cleavage and polyadenylation process. Cleavage was restored by addition of recombinant CBC. CBC depletion was found to reduce the stability of poly(A) site cleavage complexes formed in nuclear extract. We also provide evidence that the communication between the 5′ and 3′ ends of the pre-mRNA during processing is mediated by the physical association of the CBC/cap complex with 3′ processing factors bound at the poly(A) site. These observations, along with previous data on the function of CBC in splicing, illustrate the key role played by CBC in pre-mRNA recognition and processing. The data provides further support for the hypothesis that pre-mRNAs and mRNAs may exist and be functional in the form of “closed-loops,” due to interactions between factors bound at their 5′ and 3′ ends.

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The tsetse thrombin inhibitor, a potent and specific low molecular mass (3,530 Da) anticoagulant peptide, was purified previously from salivary gland extracts of Glossina morsitans morsitans (Diptera: Glossinidae). A 303-bp coding sequence corresponding to the inhibitor has now been isolated from a tsetse salivary gland cDNA library by using degenerate oligonucleotide probes. The full-length cDNA contains a 26-bp untranslated segment at its 5′ end, followed by a 63-bp sequence corresponding to a putative secretory signal peptide. A 96-bp segment codes for the mature tsetse thrombin inhibitor, whose predicted molecular weight matches that of the purified native protein. Based on its lack of homology to any previously described family of molecules, the tsetse thrombin inhibitor appears to represent a unique class of naturally occurring protease inhibitors. Recombinant tsetse thrombin inhibitor expressed in Escherichia coli and the chemically synthesized peptide are both substantially less active than the purified native protein, suggesting that posttranslational modification(s) may be necessary for optimal inhibitory activity. The tsetse thrombin inhibitor gene, which is present as a single copy in the tsetse genome, is expressed at high levels in salivary glands and midguts of adult tsetse flies, suggesting a possible role for the anticoagulant in both feeding and processing of the bloodmeal.

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rRNA precursors are bound throughout their length by specific proteins, as the pre-rRNAs emerge from the transcription machinery. The association of pre-rRNA with proteins as ribonucleoprotein (RNP) complexes persists during maturation of 18S, 5.8S, and 28S rRNA, and through assembly of ribosomal subunits in the nucleolus. Preribosomal RNP complexes contain, in addition to ribosomal proteins, an unknown number of nonribosomal nucleolar proteins, as well as small nucleolar RNA-ribonucleoproteins (sno-RNPs). This report describes the use of a specific, rapid, and mild immunopurification approach to isolate and analyze human RNP complexes that contain nonribosomal nucleolar proteins, as well as ribosomal proteins and rRNA. Complexes immunopurified with antibodies to nucleolin—a major nucleolar RNA-binding protein—contain several distinct specific polypeptides that include, in addition to nucleolin, the previously identified nucleolar proteins B23 and fibrillarin, proteins with electrophoretic mobilities characteristic of ribosomal proteins including ribosomal protein S6, and a number of additional unidentified proteins. The physical association of these proteins with one another is mediated largely by RNA, in that the complexes dissociate upon digestion with RNase. Complexes isolated from M-phase cells are similar in protein composition to those isolated from interphase cell nuclear extracts. Therefore, the predominant proteins that associate with nucleolin in interphase remain in RNP complexes during mitosis, despite the cessation of rRNA synthesis and processing in M-phase. In addition, precursor rRNA, as well as processed 18S and 28S rRNA and candidate rRNA processing intermediates, is found associated with the immunopurified complexes. The characteristics of the rRNP complexes described here, therefore, indicate that they represent bona fide precursors of mature cytoplasmic ribosomal subunits.

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In this study we demonstrate, at an ultrastructural level, the in situ distribution of heterogeneous nuclear RNA transcription sites after microinjection of 5-bromo-UTP (BrUTP) into the cytoplasm of living cells and subsequent postembedding immunoelectron microscopic visualization after different labeling periods. Moreover, immunocytochemical localization of several pre-mRNA transcription and processing factors has been carried out in the same cells. This high-resolution approach allowed us to reveal perichromatin regions as the most important sites of nucleoplasmic RNA transcription and the perichromatin fibrils (PFs) as in situ forms of nascent transcripts. Furthermore, we show that transcription takes place in a rather diffuse pattern, without notable local accumulation of transcription sites. RNA polymerase II, heterogeneous nuclear ribonucleoprotein (hnRNP) core proteins, general transcription factor TFIIH, poly(A) polymerase, splicing factor SC-35, and Sm complex of small nuclear ribonucleoproteins (snRNPs) are associated with PFs. This strongly supports the idea that PFs are also sites of major pre-mRNA processing events. The absence of nascent transcripts, RNA polymerase II, poly(A) polymerase, and hnRNPs within the clusters of interchromatin granules rules out the possibility that this domain plays a role in pre-mRNA transcription and polyadenylation; however, interchromatin granule-associated zones contain RNA polymerase II, TFIIH, and Sm complex of snRNPs and, after longer periods of BrUTP incubation, also Br-labeled RNA. Their role in nuclear functions still remains enigmatic. In the nucleolus, transcription sites occur in the dense fibrillar component. Our fine structural results show that PFs represent the major nucleoplasmic structural domain involved in active pre-mRNA transcriptional and processing events.

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Efficient 3′-end processing of cell cycle-regulated mammalian histone premessenger RNAs (pre-mRNAs) requires an upstream stem–loop and a histone downstream element (HDE) that base pairs with the U7 small ribonuclearprotein. Insertions between these elements have two effects: the site of cleavage moves in concert with the HDE and processing efficiency declines. We used Xenopus oocytes to ask whether compensatory length insertions in the human U7 RNA could restore the fidelity and efficiency of processing of mouse histone insertion pre-mRNAs. An insertion of 5 nt into U7 RNA that extends its complementary to the HDE compensated for both defects in processing of a 5-nt insertion substrate; a noncomplementary insertion into U7 did not. Yet, the noncomplementary insertion mutant U7 was shown to be active on insertion substrates further mutated to allow base pairing. Our results suggest that the histone pre-mRNA becomes rigidified upstream of its HDE, allowing the bound U7 small ribonucleoprotein to measure from the HDE to the cleavage site. Such a mechanism may be common to other RNA measuring systems. To our knowledge, this is the first demonstration of length suppression in an RNA processing system.

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Interleukin (IL)-18, formerly called interferon γ (IFN-γ)-inducing factor, is biologically and structurally related to IL-1β. A comparison of gene expression, synthesis, and processing of IL-18 with that of IL-1β was made in human peripheral blood mononuclear cells (PBMCs) and in human whole blood. Similar to IL-1β, the precursor for IL-18 requires processing by caspase 1. In PBMCs, mature but not precursor IL-18 induces IFN-γ; in whole human blood stimulated with endotoxin, inhibition of caspase 1 reduces IFN-γ production by an IL-1β-independent mechanism. Unlike the precursor for IL-1β, precursor for IL-18 was expressed constitutively in PBMCs and in fresh whole blood from healthy human donors. Western blotting of endotoxin-stimulated PBMCs revealed processed IL-1β in the supernatants via an caspase 1-dependent pathway. However, in the same supernatants, only unprocessed precursor IL-18 was found. Unexpectedly, precursor IL-18 was found in freshly obtained PBMCs and constitutive IL-18 gene expression was present in whole blood of healthy donors, whereas constitutive IL-1β gene expression is absent. Similar to human PBMCs, mouse spleen cells also constitutively contained the preformed precursor for IL-18 and expressed steady-state IL-18 mRNA, but there was no IL-1β protein and no spontaneous gene expression for IL-1β in these same preparations. We conclude that although IL-18 and IL-1β are likely members of the same family, constitutive gene expression, synthesis, and processing are different for the two cytokines.

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Multibeam bathymetric data collected in the Puerto Rico Trench and northeastern Caribbean region are compiled into a seamless bathymetric terrain model for broad-scale geological investigations of the trench system. These data, collected during eight separate surveys between 2002 and 2013 and covering almost 180,000 square kilometers, are published here in large-format map sheet and digital spatial data. This report describes the common multibeam data collection and processing methods used to produce the bathymetric terrain model and corresponding data-source polygon. Details documenting the complete provenance of the data are provided in the metadata in the Data Catalog section.

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O buriti (Mauritia flexuosa L.) é um fruto rico em carotenoides, ácidos graxos e compostos fenólicos com grande potencial de industrialização. Entretanto, sua vida útil reduzida dificulta a comercialização e um maior aproveitamento. Dessa forma, tecnologias de processamento podem ser empregadas para que haja maior utilização e expansão do buriti. Este trabalho teve como objetivo caracterizar polpa de buriti congelada, liofilizada e atomizada, quantificando os compostos bioativos (carotenoides e ácidos graxos), a composição centesimal e mineral, além de avaliar a estabilidade química e funcional da polpa submetida a esses tratamentos ao longo do tempo de armazenamento. Polpas de buriti oriunda da Comunidade Boa Vista, zona rural do município de Arinos, MG, foram submetidas a três processamentos: congelamento (eleito como controle), liofilização e atomização (com adição de maltodextrina como coadjuvante de tecnologia). Após o processamento, as polpas foram acondicionadas em embalagens laminadas compostas por poliéster, alumínio e polietileno (25 x 25 cm), com capacidade para 100 g cada, e armazenadas a -23 °C para o congelamento e a temperatura ambiente para as polpas desidratadas. As análises físicas, químicas, nutricionais e funcionais foram realizadas logo após o processamento, para caracterização das polpas e nos períodos: 1, 14, 28, 42 e 56 dias, para avaliação da estabilidade. O delineamento experimental empregado constituiu-se de dois fatores (processamento e período) e a interação entre eles. Os dados foram analisados estatisticamente por meio da Análise de Variância Univariada (ANOVA) com nível de significância de 5 %. Constatou-se que durante a estocagem a polpa liofilizada apresentou maior brilho, menor opacidade, valores inferiores para o pH, menor variação da atividade de água e maior acidez titulável. Esses parâmetros são importantes indicadores de qualidade da polpa durante a sua estocagem, visto que dificultam o desenvolvimento microbiano. A adição da maltodextrina no processo de atomização acarretou maiores teores de sólidos solúveis em relação aos demais tratamentos. Os resultados demonstraram que, ao longo do armazenamento, a liofilização contribuiu para a melhor preservação dos carotenoides totais. A quantificação dos carotenoides e dos ácidos graxos na polpa congelada demonstrou que houve melhor preservação de carotenoides do tipo alfa e beta caroteno, dos ácidos graxos oleico, indicando maior valor nutricional para a alimentação humana. Apesar dos resultados satisfatórios para a polpa congelada, durante o tempo analisado a polpa congelada apresentou maiores perdas em relação à polpa liofilizada. Para a classe dos compostos fenólicos, a liofilização apresentou melhores resultados ao longo da estocagem. O uso de baixas temperaturas foi mais efetivo para a preservação dos compostos bioativos analisados. Portanto, pode-se concluir que o emprego da liofilização é a alternativa mais adequada entre as avaliadas, para o aproveitamento da polpa de buriti na indústria de alimentos, uma vez que esse tratamento preservou todos os constituintes avaliados durante a estocagem.

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This study examines the workings of the Common European Asylum System (CEAS), in order to assess the need and potential for new approaches to ensure access to protection for people seeking it in the EU, including joint processing and distribution of asylum seekers. Rather than advocating the addition of further complexity and coercion to the CEAS, the study proposes a focus on front-line reception and streamlined refugee status determination, in order to mitigate the asylum challenges facing Member States, and vindicate the rights of asylum seekers and refugees according to the EU acquis and international legal standards. Joint processing could contribute to front-line reception and processing capacity, but is no substitute for proper investment in national systems. The Dublin system as currently configured leads inexorably to increasing coercion and detention, and must thus be reconfigured to remove coercion as a principle and ensure consistency with human rights and other fundamental values of the EU.

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This study examines the workings of the Common European Asylum System (CEAS), in order to assess the need and potential for new approaches to ensure access to protection for people seeking it in the EU, including joint processing and distribution of asylum seekers. Rather than advocating the addition of further complexity and coercion to the CEAS, the study proposes a focus on front-line reception and streamlined refugee status determination, in order to mitigate the asylum challenges facing Member States, and vindicate the rights of asylum seekers and refugees according to the EU acquis and international legal standards. Joint processing could contribute to front-line reception and processing capacity, but is no substitute for proper investment in national systems. The Dublin system as currently configured leads inexorably to increasing coercion and detention, and must thus be reconfigured to remove coercion as a principle and ensure consistency with human rights and other fundamental values of the EU.