Outage exponents of block-fading channels with power allocation

Power allocation is studied for fixed-rate transmission over block-fading channels with arbitrary continuous fading distributions and perfect transmitter and receiver channel state information. Both short- and long-term power constraints for arbitrary input distributions are considered. Optimal power allocation schemes are shown to be direct applications of previous results in the literature. It is shown that the short- and long-term outage exponents for arbitrary input distributions are related through a simple formula. The formula is useful to predict when the delay-limited capacity is positive. Furthermore, this characterization is useful for the design of efficient coding schemes for this relevant channel model. © 2010 IEEE.

Active-passive 44 SOA-based switch with integrated power monitoring

The first monolithically integrated 44 switch with power monitoring function using on-chip PIN photodiodes is reported. Using 10Gb/s signals, under active power control an IPDR of 12dB for a 1dB power penalty is achieved. © 2012 OSA.

Performance and power dissipation comparisons between 28 Gb/s NRZ, PAM, CAP and optical OFDM systems for data communication applications

Theoretical investigations have been carried out to analyze and compare the link power budget and power dissipation of non-return-to-zero (NRZ), pulse amplitude modulation-4 (PAM-4), carrierless amplitude and phase modulation-16 (CAP-16) and 16-quadrature amplitude modulation-orthogonal frequency division multiplexing (16-QAM-OFDM) systems for data center interconnect scenarios. It is shown that for multimode fiber (MMF) links, NRZ modulation schemes with electronic equalization offer the best link power budget margins with the least power dissipation for short transmission distances up to 200 m; while OOFDM is the only scheme which can support a distance of 300 m albeit with power dissipation as high as 4 times that of NRZ. For short single mode fiber (SMF) links, all the modulation schemes offer similar link power budget margins for fiber lengths up to 15 km, but NRZ and PAM-4 are preferable due to their system simplicity and low power consumption. For lengths of up to 30 km, CAP-16 and OOFDM are required although the schemes consume 2 and 4 times as much power respectively compared to that of NRZ. OOFDM alone allows link operation up to 35 km distances. © 1983-2012 IEEE.

溶藻细菌DC-L14的分离、鉴定与溶藻特性

从滇池蓝藻水华集聚区分离获得一株溶藻细菌DC-L14,经16SrDNA序列分析鉴定为Lysinibacillus fusiformis;小白鼠毒性试验初步显示该菌株未产生小白鼠中毒毒素;该菌能使铜锈微囊藻905聚集成团,沉于瓶底,最终黄化;该菌作用4d,使惠氏微囊藻107、绿色微囊藻102、水华束丝藻和水华鱼腥藻的叶绿素a下降率最高为70.1%,最低为65.5%,平均为67.2%;当细菌处于稳定生长期时溶藻效果最强,共培养4d能使铜锈微囊藻905的叶绿素a含量下降82.1%;离心沉降后检测,发现菌体本身无

溶藻细菌DC-L5的分离、鉴定及其溶藻特性

从滇池蓝藻水华集聚区分离获得一株溶藻细菌DC-L5,通过形态及16S rDNA测序分析鉴定为短小芽孢杆菌。用小白鼠进行生物安全实验,小白鼠无中毒症状。研究表明当细菌处于对数生长期时溶藻效果最强,共培养5d使铜锈微囊藻的叶绿素a含量下降83.33%,使惠氏微囊藻、绿色微囊藻、水华束丝藻和水华鱼腥藻4种蓝藻叶绿素a下降率最高为67.6%,最低为58.5%,平均为62.25%。离心沉降后,发现沉淀菌体和无菌上清液对铜锈微囊藻都有溶藻效果,但溶藻效果不及原菌液,推测DC-L5可能是通过直接接触使藻细胞凝聚下沉及进

Experimental and numerical study of a YBCO pancake coil with a magnetic substrate

A finite element model for a YBCO pancake coil with a magnetic substrate is developed in this paper. An axial symmetrical H formulation and the E-J power law are used to construct the model, with the magnetic substrate considered by introducing an extra time-dependent term in the formula. A pancake coil is made and tested. The measurement of critical current and transport loss is compared to the model result, showing good consistency. The influence of magnetic substrate in the condition of AC and DC current is studied. The AC loss decreases without a magnetic substrate. It is observed that when the applied DC current approaches the critical current the coil turn loss profile changes completely in the presence of magnetic substrate due to the change of magnetic field distribution. © 2012 IOP Publishing Ltd.

The experiment to evaluate the AC loss of 2G HTS windings in the application of rotating electric machines

This paper presents the design of an AC loss experiment using nitrogen boil-off method. This experiment is aimed at exploring the AC loss of HTS double race-track coils which will be installed on the rotor of a wind turbine generator. The operating environment is simulated by designing a cryostat with rotating magnetic field windings. Apart from the fact that the alternating magnetic field causes most of AC loss on the HTS coils, we also believe that the DC background field would be another important factor causing AC loss if the HTS coil is experiencing by both alternating magnetic field in the perpendicular direction and DC background field in the parallel direction. In order to perform the boil-off measurement, we present the method to estimate the heat leakage in the cryostat which might cause errors to the measurement. © 2011 IEEE.

FPGA, physics-based modeling of IGBT and pin diode for hardware co-simulation of complex power electronic converters and systems

This paper presents the steps and the challenges for implementing analytical, physics-based models for the insulated gate bipolar transistor (IGBT) and the PIN diode in hardware and more specifically in field programmable gate arrays (FPGAs). The models can be utilised in hardware co-simulation of complex power electronic converters and entire power systems in order to reduce the simulation time without compromising the accuracy of results. Such a co-simulation allows reliable prediction of the system's performance as well as accurate investigation of the power devices' behaviour during operation. Ultimately, this will allow application-specific optimisation of the devices' structure, circuit topologies as well as enhancement of the control and/or protection schemes.

Series-connected IGBTs using active voltage control technique

With series insulated-gate bipolar transistor (IGBT) operation, well-matched gate drives will not ensure balanced dynamic voltage sharing between the switching devices. Rather, it is IGBT parasitic capacitances, mainly gate-to-collector capacitance Cgc, that dominate transient voltage sharing. As Cgc is collector voltage dependant and is significantly larger during the initial turn-off transition, it dominates IGBT dynamic voltage sharing. This paper presents an active control technique for series-connected IGBTs that allows their dynamic voltage transition dV\ce/dt to adaptively vary. Both switch ON and OFF transitions are controlled to follow a predefined dVce/dt. Switching losses associated with this technique are minimized by the adaptive dv /dt control technique incorporated into the design. A detailed description of the control circuits is presented in this paper. Experimental results with up to three series devices in a single-ended dc chopper circuit, operating at various low voltage and current levels, are used to illustrate the performance of the proposed technique. © 2012 IEEE.

Dead-time minimisation using active voltage control gate drive for high-power IGBT converters

High-power converters usually need longer dead-times than their lower-power counterparts and a lower switching frequency. Also due to the complicated assembly layout and severe variations in parasitics, in practice the conventional dead-time specific adjustment or compensation for high-power converters is less effective, and usually this process is time-consuming and bespoke. For general applications, minimising or eliminating dead-time in the gate drive technology is a desirable solution. With the growing acceptance of power electronics building blocks (PEBB) and intelligent power modules (IPM), gate drives with intelligent functions are in demand. Smart functions including dead time elimination/minimisation can improve modularity, flexibility and reliability. In this paper, a dead-time minimisation using Active Voltage Control (AVC) gate drive is presented. © 2012 IEEE.

SuperJunction IGBTS: An evolutionary step of silicon power devices with high impact potential

15 years ago the vertical SuperJunction (SJ) concept conceived for SJ power MOSFETs was the last, major breakthrough in the field of silicon power devices. Today, the SuperJunction MOSFET technologies have reached a mature stage characterized by gradual performance improvements. SuperJunction Insulated Gate Bipolar Transistors (SJ IGBTs) could interrupt this stagnation holding promise to revitalize voltage classes from 600 up to 1200 V. Such SJ IGBTs surpass by a very significant margin their SJ MOSFET counterparts both in terms of power handling capability, on-state and turn-off losses, all at the same time. On the higher end of the voltage class, SJ IGBTs would top the performance of 1.2 kV IGBTs by a similar margin. © 2012 IEEE.

Power absorption invariance for brownian spring forcing

In [5] it was shown that, for a standard quarter-car vehicle model and a road disturbance whose velocity profile is white noise of intensity A, the mean power dissipated in the suspension is equal to kA/2 where k is the tyre vertical stiffness. It is remarkable that the power dissipation turns out to be independent of all masses and suspension parameters. The proof in [5] makes use of a spectral formulation of white noise and is specific to linear systems. This paper casts the result in a more general form and shows that it follows from a simple application of Ito calculus. © 2012 IEEE.

Towards a fast electro-thermo-mechanical IGBT/Diode simulation framework for design of reliable power electronic converters

This paper describes a methodology that enables fast and reasonably accurate prediction of the reliability of power electronic modules featuring IGBTs and p-i-n diodes, by taking into account thermo-mechanical failure mechanisms of the devices and their associated packaging. In brief, the proposed simulation framework performs two main tasks which are tightly linked together: (i) the generation of the power devices' transient thermal response for realistic long load cycles and (ii) the prediction of the power modules' lifetime based on the obtained temperature profiles. In doing so the first task employs compact, physics-based device models, power losses lookup tables and polynomials and combined material-failure and thermal modelling, while the second task uses advanced reliability tests for failure mode and time-to-failure estimation. The proposed technique is intended to be utilised as a design/optimisation tool for reliable power electronic converters, since it allows easy and fast investigation of the effects that changes in circuit topology or devices' characteristics and packaging have on the reliability of the employed power electronic modules. © 2012 IEEE.