Packing LUT clusters with network flow programming

This paper describes a two-step packing algorithm for LUT clusters of which the LUT input multipliers are depopulated. In the first step, a greedy algorithm is used to search for BLE locations and cluster inputs. If the greedy algorithm fails, the second step with network flow programming algorithm is employed. Numerical results illustrate that our two-step packing algorithm obtains better packing density than one-step greedy packing algorithm.

The whispering gallery mode in photonic crystal ring cavity - art. no. 698438

Whispering gallery modes (WGMs) in microcavities possess ultra-high cavity Q factor. Such microcavity are easy to be fabricated, so WGMs have attracted much attention in the area of photonics and integrated photonic circuits. It is well known that the effect of total internal reflection restricts the size of this mirocavity. Such drawback goes against the integration of photon. However, the photonic crystal microcavities (PCMC) make a breakthrough recently. The WGMs in the PCMC are possible to gain both ultra-high Q and ultra-small mode volume. In this paper, the property of the mode in photonic crystal ring cavity is analyzed by FDTD and PWE. By modifying the airholes in the corners of the ring cavity, we can obtain the WGM. Also the Q factor of WGM in photonic crystal ring cavity is calculated. This favors the design of the photonic crystal microcavity components.

High efficiency fiber to waveguide optical coupler in silicon-on-insulator-based slot waveguides - art. no. 68310R

We propose a novel optical fiber-to-waveguide coupler for integrated optical circuits. The proper materials and structural parameters of the coupler, which is based on a slot waveguide, are carefully analyzed using a full-vectorial three dimensional mode solver. Because the effective refractive index of the mode in a silicon-on-insulator-based slot waveguide can be extremely close to that of the fiber, a highly efficient fiber-to-waveguide coupling application can be realized. For a TE-like mode, the calculated minimum mismatch loss is about 1.8dB at 1550nm, and the mode conversion loss can be less than 0.5dB. The discussion of the present state-of-the-art is also involved. The proposed coupler can be used in chip-to-chip communication.

High-performance multiplexed vibration sensor system based on fiber lasers - art. no. 683019

This paper describes a high-performance multiplexed vibration sensor system using fiber lasers. A serial vibration sensor array consists of four short cavity fiber lasers. The system employs a single, polarization-insensitive, unbalanced Michelson interferometer to translate individual laser wavelength shifts induced by vibration signals into interferometer phase shifts. A dense wavelength division demultiplexor (DWDM) with high channel isolation is inserted to demultiplex each laser signal as a wavelength filter. Finally, a digital phase demodulator based on the phase generated carrier technique is used to achieve high-resolution interrogation. Experimental results show that no observable crosstalk is measured on the output channels, and the minimal detectable acceleration of this system is similar to 200ng/root Hz at 250Hz, which is fundamentally limited by the frequency noise of the lasers.

Fabrication and characterization of TO packaged high-speed laser modules - art. no. 682407

Various high-speed laser modules are fabricated by TO-Packaged processes, such as FP laser modules, DFB laser modules, and VCSEL modules. Furthermore,, the resonance among the circuit elements provides an approach to compensating the TO packaging parasitics, and improving the frequency response of the devices. The detailed equivalent circuit model is established to investigate both the laser diode and packaging comprehensively. The small-signal modulation bandwidths of the TO packaged FP laser, DFB laser and the VCSEL modules are more than 10, 9.7 and 8 GHz, respectively.

Wavelength tunable distributed Bragg reflector laser integrated with electro-absorption modulator by a combined method of selective area growth and quantum well intermixing - art. no. 68240N

Wavelength tunable electro-absorption modulated distributed Bragg reflector lasers (TEMLs) are promising light source in dense wavelength division multiplexing (DWDM) optical fiber communication system due to high modulation speed, small chirp, low drive voltage, compactness and fast wavelength tuning ability. Thus, increased the transmission capacity, the functionality and the flexibility are provided. Materials with bandgap difference as large as 250nm have been integrated on the same wafer by a combined technique of selective area growth (SAG) and quantum well intermixing (QWI), which supplies a flexible and controllable platform for the need of photonic integrated circuits (PIC). A TEML has been fabricated by this technique for the first time. The component has superior characteristics as following: threshold current of 37mA, output power of 3.5mW at 100mA injection and 0V modulator bias voltage, extinction ratio of more than 20 dB with modulator reverse voltage from 0V to 2V when coupled into a single mode fiber, and wavelength tuning range of 4.4nm covering 6 100-GHz WDM channels. A clearly open eye diagram is observed when the integrated EAM is driven with a 10-Gb/s electrical NRZ signal. A good transmission characteristic is exhibited with power penalties less than 2.2 dB at a bit error ratio (BER) of 10(-10) after 44.4 km standard fiber transmission.

A novel ultra low power temperature sensor for UHF RFID tag chip

A novel ultra low power temperature sensor for UHF RFID tag chip is presented. The sensor consists of a constant pulse generator, a temperature related oscillator, a counter and a bias. Conversion of temperature to digital output is fulfilled by counting the number of the clocks of the temperature related oscillator in a constant pulse period. The sensor uses time domain comparing, where high power consumption bandgap voltage references and traditional ADCs are not needed. The sensor is realized in a standard 0.18 mu m CMOS process, and the area is only 0.2mm(2). The accuracy of the temperature sensor is +/- 1 degrees C after calibration. The power consumption of the sensor is only 0.9 mu W.

A 10-bit 2GHz current-steering CMOS D/A converter

This paper presents a 2GS/s 10-bit CMOS digital-to-analog converter (DAC). This DAC consists of a unit current-cell matrix for 6MSBs and another unit current-cell matrix for 4LSBs, trading off between the precision and size of the chip. The Current Mode Logic (CML) is used to ensure high speed, and a double Centro-symmetric current matrix is designed by the Q(2) random walk strategy in order to ensure the linearity of the DAC. The DAC occupies 2.2 x 2.2 mm2 of die area, and consumes 790mw at a single 3.3V power supply.

A direct-conversion mixer with a DC-offset cancellation for WLAN

This paper presents a 5GHz double-balanced mixer with DC-offset cancellation circuit for direct-conversion receiver compliant with IEEE 802.11a wireless LAN standard. The analog feedback loop is used, to eliminate the DC-offset at the output of the double-balanced mixer. The test results show that the mixer with DC-offset cancellation circuit has voltage conversion gain of 9.5dB at 5.15GHz, noise figure of 13.5dB, IIP3 of 7.6 dBm, 1.73mV DC-offset voltage and 67mW power with 3.3-V power supply. The DC-offset cancellation circuit has less than 0.1mm(2) additional area and 0.3mW added power dissipation. The direct conversion WLAN receiver has been implemented in a 0.35 mu m SiGe BiCMOS technology.

Fast Locking and High Accurate Current Matching Phase-Locked Loop

In this paper, a charge-pump based phase-locked loop (CPLL) that can achieve fast locking and tiny deviation is proposed and analyzed. A lock-aid circuit is added to achieve fast locking of the CPLL. Besides, a novel differential charge pump which has good current matching characteristics and a PFD with delay cell has been used in this PLL. The proposed PILL circuit is designed based on the 0.35um 2P4M CMOS process with 3.3V/5V supply voltage. HSPICE simulation shows that the lock time of the proposed CPLL can be reduced by over 72% in comparison to the conventional PILL and its charge pump sink and source current mismatch is only 0.008%.

Fabrication of improved FD SOIMOSFETs for suppressing edge effect

FD SOI MOSFETs with MESA and Irradiated FD SOI MOSFETs with LOCOS isolation usually show the edge effect, that is, the leakage current called hump is generated in the subthreshold region. According to different reasons for generating the edge effect, rounded corner process and BTS structure are applied to improve device performance. The results indicate that the above two methods are effective to reduce the edge effect and qualified devices are fabricated successfully.

Monostable-Bistable Transition Logic Element (MOBILE) Model for Single-Electron Transistors

The traditional monostable-bistable transition logic element (MOBILE) structure is usually composed of resonant tunneling diodes (RTD). This letter describes a new type MOBILE structure consisting of single-electron transistors (i.e. SET-MOBILE). The analytical model of single-electron transistors ( SET) has been considered three states (including an excited state) of the discrete quantum energy levels. The simulation results show negative differential conductance (NDC) characteristics in I-DS-V-DS curve. The SET-MOBILE utilizing NDC characteristics can successfully realize the basic logic functions as the RTD-MOBILE.

Evolution of wetting layers in InAs/GaAs quantum-dot system studied by reflectance difference spectroscopy

The wetting layers (WL) in InAs/GaAs quantum-dot system have been studied by reflectance difference spectroscopy (RDS), in which two structures related to the heavy-hole (HH) and light-hole (LH) transitions in the WL have been observed. The evolution and segregation behaviors of WL during Stranski-Krastanow (SK) growth mode have been studied from the analysis of the WL-related optical transition energies. It has been found that the segregation coefficient of Indium atoms varies linearly with the InAs amount in WL. In addition, the effect of the growth temperature on the critical thickness for InAs island formation has also been studied. The critical thickness defined by the appearance of InAs dots, which is determined by AFM, shows a complex variation with the growth temperature. However, the critical thickness determined by RDS is almost constant in the range of 510-540 degrees C.

High epitaxial growth rate of 4H-SiC using TCS as silicon precursor

High homoepitaxial growth of 4H-SiC has been performed in a home-made horizontal hot wall CVD reactor on n-type 4H-SiC 8 degrees off-oriented substrates in the size of 10 mm x 10 mm, using trichlorosilane (TCS) as silicon precursor source together with ethylene as carbon precursor source. Cross-section Scanning Electron Microscopy (SEM), Raman scattering spectroscopy and Atomic Force Microscopy (AFM) were used to determine the growth rate, structural property and surface morphology, respectively. The growth rate reached to 23 mu m/h and the optimal epilayer was obtained at 1600 degrees C with TCS flow rate of 12 seem in C/Si of 0.42, which has a good surface morphology with a low Rms of 0.64 nm in 10 mu mx10 mu m area.

Operational Optimization of GaN Thin Film Growth Employing Numerical Simulation in a Showerhead MOCVD Reactor

A detailed reaction-tran sport model was studied in a showerhead reactor for metal organic chemical vapor deposition of GaN film by using computational fluid dynamics simulation. It was found that flat flow lines without swirl are crucial to improve the uniformity of the film growth, and thin temperature gradient above the suscptor can increase the film deposition rate. By above-mentioned research, we can employ higher h (the distance from the susceptor to the inlet), P (operational pressure) and the rate of susceptor rotation to improve the film growth.