971 resultados para Process systems engineering


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The vertical uplift resistance of long pipes buried in sands and subjected to pseudostatic seismic forces has been computed by using the lower-bound theorem of the limit analysis in conjunction with finite elements and nonlinear optimization. The soil mass is assumed to follow the Mohr-Coulomb failure criterion and an associated flow rule. The failure load is expressed in the form of a nondimensional uplift factor F-gamma. The variation of F-gamma is plotted as a function of the embedment ratio of the pipe, horizontal seismic acceleration coefficient (k(h)), and soil friction angle (phi). The magnitude of F-gamma is found to decrease continuously with an increase in the horizontal seismic acceleration coefficient. The reduction in the uplift resistance becomes quite significant, especially for greater values of embedment ratios and lower values of friction angle. The predicted uplift resistance was found to compare well with the existing results reported from the literature. (C) 2014 American Society of Civil Engineers.

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We report the effect of topological as well as lattice vacancy defects on the electro-thermal transport properties of the metallic zigzag graphene nano ribbons at their ballistic limit. We employ the density function theory-Non equilibrium green's function combination to calculate the transmission details. We then present an elaborated study considering the variation in the electrical current and the heat current transport with the change in temperature as well as the voltage gradient across the nano ribbons. The comparative analysis shows, that in the case of topological defects, such as the Stone-Wales defect, the electrical current transport is minimum. Besides, for the voltage gradient of 0.5 Volt and the temperature gradient of 300 K, the heat current transport reduces by similar to 62 % and similar to 50% for the cases of Stones-Wales defect and lattice vacancy defect respectively, compared to that of the perfect one.

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We present a closed-form continuous model for the electrical conductivity of a single layer graphene (SLG) sheet in the presence of short-range impurities, long-range screened impurities, and acoustic phonons. The validity of the model extends from very low doping levels (chemical potential close to the Dirac cone vertex) to very high doping levels. We demonstrate complete functional relations of the chemical potential, polarization function, and conductivity with respect to both doping level and temperature (T), which were otherwise developed for SLG sheet only in the very low and very high doping levels. The advantage of the continuous conductivity model reported in this paper lies in its simple form which depends only on three adjustable parameters: the short-range impurity density, the long-range screened impurity density, and temperature T. The proposed theoretical model was successfully used to correlate various experiments in the midtemperature and moderate density regimes.

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Atomically thin layered black phosphorous (BP) has recently appeared as an alternative to the transitional metal dichalcogenides for future channel material in a metal-oxide-semiconductor transistor due to its lower carrier effective mass. Investigation of the electronic property of source/drain contact involving metal and two-dimensional material is essential as it impacts the transistor performance. In this paper, we perform a systematic and rigorous study to evaluate the Ohmic nature of the side-contact formed by the monolayer BP (mBP) and metals (gold, titanium, and palladium), which are commonly used in experiments. Employing the Density Functional Theory, we analyse the potential barrier, charge transfer and atomic orbital overlap at the metal-mBP interface in an optimized structure to understand how efficiently carriers could be injected from metal contact to the mBP channel. Our analysis shows that gold forms a Schottky contact with a higher tunnel barrier at the interface in comparison to the titanium and palladium. mBP contact with palladium is found to be purely Ohmic, where as titanium contact demonstrates an intermediate behaviour. (C) 2014 AIP Publishing LLC.

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A Field Programmable Gate Array (FPGA) based hardware accelerator for multi-conductor parasitic capacitance extraction, using Method of Moments (MoM), is presented in this paper. Due to the prohibitive cost of solving a dense algebraic system formed by MoM, linear complexity fast solver algorithms have been developed in the past to expedite the matrix-vector product computation in a Krylov sub-space based iterative solver framework. However, as the number of conductors in a system increases leading to a corresponding increase in the number of right-hand-side (RHS) vectors, the computational cost for multiple matrix-vector products present a time bottleneck, especially for ill-conditioned system matrices. In this work, an FPGA based hardware implementation is proposed to parallelize the iterative matrix solution for multiple RHS vectors in a low-rank compression based fast solver scheme. The method is applied to accelerate electrostatic parasitic capacitance extraction of multiple conductors in a Ball Grid Array (BGA) package. Speed-ups up to 13x over equivalent software implementation on an Intel Core i5 processor for dense matrix-vector products and 12x for QR compressed matrix-vector products is achieved using a Virtex-6 XC6VLX240T FPGA on Xilinx's ML605 board.

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Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept.

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A new generator topology for microhydel power plants, capable of unsupervised operation, is proposed. While conventional microhydel plants operate at constant speed with switched ballast loads, the proposed generator, based on the wound rotor induction machine, operates at variable speed and does away with the need for ballast loads. This increases reliability and substantially decreases system costs and setup times. The proposed generator has a simplified decoupled control structure with stator-referenced voltage control similar to a conventional synchronous generator, and rotor-side frequency control that is facilitated by rotating electronics mounted on the rotor. While this paper describes an isolated plant, the topology can also be tailored for distributed generation enabling conversion of the available hydraulic power into useful electrical power when the grid is present, and supplying local loads in the event of grid outage.

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We present a computational study on the impact of line defects on the electronic properties of monolayer MoS2. Four different kinds of line defects with Mo and S as the bridging atoms, consistent with recent theoretical and experimental observations, are considered herein. We employ the density functional tight-binding (DFTB) method with a Slater-Koster-type DFTB-CP2K basis set for evaluating the material properties of perfect and the various defective MoS2 sheets. The transmission spectra are computed with a DFTB-non-equilibrium Green's function formalism. We also perform a detailed analysis of the carrier transmission pathways under a small bias and investigate the phase of the transmission eigenstates of the defective MoS2 sheets. Our simulations show a two to four fold decrease in carrier conductance of MoS2 sheets in the presence of line defects as compared to that for the perfect sheet.

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We investigate into the limitations of the sum-product algorithm in the probability domain over graphs with isolated short cycles. By considering the statistical dependency of messages passed in a cycle of length 4, we modify the update equations for the beliefs at the variable and check nodes. We highlight an approximate log domain algebra for the modified variable node update to ensure numerical stability. At higher signal-to-noise ratios (SNR), the performance of decoding over graphs with isolated short cycles using the modified algorithm is improved compared to the original message passing algorithm (MPA).

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Drawing inspiration from real world interacting systems, we study a system consisting of two networks that exhibit antagonistic and dependent interactions. By antagonistic and dependent interactions we mean that a proportion of functional nodes in a network cause failure of nodes in the other, while failure of nodes in the other results in failure of links in the first. In contrast to interdependent networks, which can exhibit first-order phase transitions, we find that the phase transitions in such networks are continuous. Our analysis shows that, compared to an isolated network, the system is more robust against random attacks. Surprisingly, we observe a region in the parameter space where the giant connected components of both networks start oscillating. Furthermore, we find that for Erdos-Renyi and scale-free networks the system oscillates only when the dependence and antagonism between the two networks are very high. We believe that this study can further our understanding of real world interacting systems.

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In this paper we show the effect of electron-phonon scattering on the performance of monolayer (1L) MoS2 and WSe2 channel based n-MOSFETs. Electronic properties of the channel materials are evaluated using the local density approximation (LDA) in density functional theory (DFT). For phonon dispersion we employ the small displacement / frozen phonon calculations in DFT. Thereafter using the non-equilibrium Green's function (NEGF) formalism, we study the effect of electron-phonon scattering and the contribution of various phonon modes on the performance of such devices. It is found that the performance of the WSe2 device is less impacted by phonon scattering, showing a ballisticity of 83% for 1L-WSe2 FET for channel length of 10 nm. Though 1L-MoS2 FET of similar dimension shows a lesser ballisticity of 75%. Also in the presence of scattering there exist a a 21-36% increase in the intrinsic delay time (tau) and a 10-18% reduction in peak transconductance (g(m)) for WSe2 and MoS2 devices respectively. (C) 2015 Author(s).

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QR decomposition (QRD) is a widely used Numerical Linear Algebra (NLA) kernel with applications ranging from SONAR beamforming to wireless MIMO receivers. In this paper, we propose a novel Givens Rotation (GR) based QRD (GR QRD) where we reduce the computational complexity of GR and exploit higher degree of parallelism. This low complexity Column-wise GR (CGR) can annihilate multiple elements of a column of a matrix simultaneously. The algorithm is first realized on a Two-Dimensional (2 D) systolic array and then implemented on REDEFINE which is a Coarse Grained run-time Reconfigurable Architecture (CGRA). We benchmark the proposed implementation against state-of-the-art implementations to report better throughput, convergence and scalability.

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We present a physics-based closed form small signal Nonquasi-static (NQS) model for a long channel Common Double Gate MOSFET (CDG) by taking into account the asymmetry that may prevail between the gate oxide thickness. We use the unique quasi-linear relationship between the surface potentials along the channel to solve the governing continuity equation (CE) in order to develop the analytical expressions for the Y parameters. The Bessel function based solution of the CE is simplified in form of polynomials so that it could be easily implemented in any circuit simulator. The model shows good agreement with the TCAD simulation at-least till 4 times of the cut-off frequency for different device geometries and bias conditions.

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Dynamic power dissipation due to redundant switching is an important metric in data-path design. This paper focuses on the use of ingenious operand isolation circuits for low power design. Operand isolation attempts to reduce switching by clamping or latching the output of a first level of combinational circuit. This paper presents a novel method using power supply switching wherein both PMOS and NMOS stacks of a circuit are connected to the same power supply. Thus, the output gets clamped or latched to the power supply value with minimal leakage. The proposed circuits make use of only two transistors to clamp the entire Multiple Input Multiple Output (MIMO) block. Also, the latch-based designs have higher drive strength in comparison to the existing methods. Simulation results have shown considerable area reduction in comparison to the existing techniques without increasing timing overhead.

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We describe our novel LED communication infrastructure and demonstrate its scalability across platforms. Our system achieves 50 kilo bits per second on very simple SoCs and scales to megabits bits per second rates on dual processor based mobile phone platforms.