Interference Alignment Algorithms for the K User Constant MIMO Interference Channel

This paper considers the degrees of freedom (DOF) for a K user multiple-input multiple-output (MIMO) M x N interference channel using interference alignment (IA). A new performance metric for evaluating the efficacy of IA algorithms is proposed, which measures the extent to which the desired signal dimensionality is preserved after zero-forcing the interference at the receiver. Inspired by the metric, two algorithms are proposed for designing the linear precoders and receive filters for IA in the constant MIMO interference channel with a finite number of symbol extensions. The first algorithm uses an eigenbeamforming method to align sub-streams of the interference to reduce the dimensionality of the interference at all the receivers. The second algorithm is iterative, and is based on minimizing the interference leakage power while preserving the dimensionality of the desired signal space at the intended receivers. The improved performance of the algorithms is illustrated by comparing them with existing algorithms for IA using Monte Carlo simulations.

Underlap Optimization in HFinFET in Presence of Interface Traps

In this work, using 3-D device simulation, we perform an extensive gate to source/drain underlap optimization for the recently proposed hybrid transistor, HFinFET, to show that the underlap lengths can be suitably tuned to improve the ON-OFF ratio as well as the subthreshold characteristics in an ultrashort channel n-type device without significantON performance degradation. We also show that the underlap knob can be tuned to mitigate the device quality degradation in presence of interface traps. The obtained results are shown to be promising when compared against ITRS 2009 performance projections, as well as published state of the art planar and nonplanar Silicon MOSFET data of comparable gate lengths using standard benchmarking techniques.

A low cost approach for the fabrication of microwave phase shifter on laminates

This paper presents a simple and low cost fabrication approach using extended printed circuit board processing techniques for an electrostatically actuated phase shifter on a common microwave laminate. This approach uses 15 mu m thin copper foils for realizing the bridge structures as well as for a spacer. A polymeric thin film deposited by spin coating and patterned using lithographic process is used as a dielectric layer to improve the reliability of the device. The prototype of the phase shifter for X-band operation is fabricated and tested for electrical and electromechanical performance parameters. The realized devices have a figure of merit of 70 degrees/dB for a maximum applied bias potential of 85 V. Since these phase shifters can be conveniently fabricated directly on microwave substrates used for feed distribution networks of phased arrays, the overall addition in cost, dimensions and processing for including these phase shifters in these arrays is minimal.

Collocated and Distributed STBCs with Partial Interference Cancellation Decoding, Part I: Full-Diversity Criterion

Low complexity decoders called Partial Interference Cancellation (PIC) and PIC with Successive Interference Cancellation (PIC-SIC), which include the Zero Forcing (ZF) and ZF-SIC receivers as special cases, were given by Guo and Xia along with sufficient conditions for a Space-Time Block Code (STBC) to achieve full diversity with PIC/PIC-SIC decoding for point-to-point MIMO channels. In Part-I of this two part series of papers, we give new conditions for an STBC to achieve full diversity with PIC and PIC-SIC decoders, which are equivalent to Guo and Xia's conditions, but are much easier to check. We then show that PIC and PIC-SIC decoders are capable of achieving the full cooperative diversity available in wireless relay networks and give sufficient conditions for a Distributed Space-Time Block Code (DSTBC) to achieve full diversity with PIC and PIC-SIC decoders. In Part-II, we construct new low complexity full-diversity PIC/PIC-SIC decodable STBCs and DSTBCs that achieve higher rates than the known full-diversity low complexity ML decodable STBCs and DSTBCs.

Collocated and Distributed STBCs with Partial Interference Cancellation Decoding, Part II: Code Construction

In this second part of a two part series of papers, we construct a new class of Space-Time Block Codes (STBCs) for point-to-point MIMO channel and Distributed STBCs (DSTBCs) for the amplify-and-forward relay channel that give full-diversity with Partial Interference Cancellation (PIC) and PIC with Successive Interference Cancellation (PIC-SIC) decoders. The proposed class of STBCs include most of the known full-diversity low complexity PIC/PIC-SIC decodable STBCs as special cases. We also show that a number of known full-diversity PIC/PIC-SIC decodable STBCs that were constructed for the point-topoint MIMO channel can be used as full-diversity PIC/PIC-SIC decodable DSTBCs in relay networks. For the same decoding complexity, the proposed STBCs and DSTBCs achieve higher rates than the known low decoding complexity codes. Simulation results show that the new codes have a better bit error rate performance than the low ML decoding complexity codes available in the literature.

Design of compact low pass filter with wide stop band using tri-section stepped impedance resonator

This paper reports the design of a compact low pass filter (LPF) with wide stop band region using trisection stepped impedance resonators in microstrip medium. Experimental results of a low pass filter designed at 1 GHz have been compared against the analytical and EM simulation results for the validation of the design. Results are satisfactorily matching each other. The maximum insertion of the measured filter is 0.2 dB and minimum return loss is 13.5 dB over the pass band. The stop band rejection is better than 20 dB from 1.5 GHz to 4.2 GHz and hence wide stop band performance is achieved. Overall size of the filter is 30 mm x 20 mm x 0.78 mm which is 0.1 lambda x 0.066 lambda. x 0.0026 lambda at 1 GHz. (C) 2011 Elsevier GmbH. All rights reserved.

Coding for High-Density Recording on a 1-D Granular Magnetic Medium

In terabit-density magnetic recording, several bits of data can be replaced by the values of their neighbors in the storage medium. As a result, errors in the medium are dependent on each other and also on the data written. We consider a simple 1-D combinatorial model of this medium. In our model, we assume a setting where binary data is sequentially written on the medium and a bit can erroneously change to the immediately preceding value. We derive several properties of codes that correct this type of errors, focusing on bounds on their cardinality. We also define a probabilistic finite-state channel model of the storage medium, and derive lower and upper estimates of its capacity. A lower bound is derived by evaluating the symmetric capacity of the channel, i.e., the maximum transmission rate under the assumption of the uniform input distribution of the channel. An upper bound is found by showing that the original channel is a stochastic degradation of another, related channel model whose capacity we can compute explicitly.

An Accurate Model for EESM and its Application to Analysis of CQI Feedback Schemes and Scheduling in LTE

The Effective Exponential SNR Mapping (EESM) is an indispensable tool for analyzing and simulating next generation orthogonal frequency division multiplexing (OFDM) based wireless systems. It converts the different gains of multiple subchannels, over which a codeword is transmitted, into a single effective flat-fading gain with the same codeword error rate. It facilitates link adaptation by helping each user to compute an accurate channel quality indicator (CQI), which is fed back to the base station to enable downlink rate adaptation and scheduling. However, the highly non-linear nature of EESM makes a performance analysis of adaptation and scheduling difficult; even the probability distribution of EESM is not known in closed-form. This paper shows that EESM can be accurately modeled as a lognormal random variable when the subchannel gains are Rayleigh distributed. The model is also valid when the subchannel gains are correlated in frequency or space. With some simplifying assumptions, the paper then develops a novel analysis of the performance of LTE's two CQI feedback schemes that use EESM to generate CQI. The comprehensive model and analysis quantify the joint effect of several critical components such as scheduler, multiple antenna mode, CQI feedback scheme, and EESM-based feedback averaging on the overall system throughput.

Role of the cesium antimonide layer in the Na2KSb/Cs3Sb photocathode

When radiation of sufficiently high energy is incident on the surface of a semiconductor photocathode, electrons are excited from the valence band to the conduction band and these may contribute to the photocurrent. The photocurrent in a single-layer cathode is found to be small, because of collisions within the cathode material, the electron affinity condition, etc. It is observed that when a thin layer of n-type cesium antimonide (Cs3Sb) is deposited over a p-type layer of sodium potassium antimonide (Na2KSb), there occurs a sharp rise in the photocurrent. The causes for the dramatic increase in the photocurrent obtainable from a sodium potassium antimonide cathode, by depositing a thin layer of cesium antimonide are analyzed in this article. It has been shown that the interface between sodium potassium antimonide and cesium antimonide can result in lowering of the electron affinity to a level below the bottom of the conduction band of sodium potassium antimonide. The drift field that arises at the heterointerface enables the electrons to reach the surface, leading to the emission of almost all the photogenerated electrons within the cathode. The processes involved in photoemission from such a double-layer cathode are examined from a theoretical point of view. The spectral response of the two-layer cathode is also found to be better than that of a single-layer cathode.

Fast-Group-Decodable STBCs via Codes over GF(4): Further Results

Recently in, a framework was given to construct low ML decoding complexity Space-Time Block Codes (STBCs) via codes over the finite field F4. In this paper, we construct new full-diversity STBCs with cubic shaping property and low ML decoding complexity via codes over F4 for number of transmit antennas N = 2m, m >; 1, and rates R >; 1 complex symbols per channel use. The new codes have the least ML decoding complexity among all known codes for a large set of (N, R) pairs. The new full-rate codes of this paper (R = N) are not only information-lossless and fully diverse but also have the least known ML decoding complexity in the literature. For N ≥ 4, the new full-rate codes are the first instances of full-diversity, information-lossless STBCs with low ML decoding complexity. We also give a sufficient condition for STBCs obtainable from codes over F4 to have cubic shaping property, and a sufficient condition for any design to give rise to a full-diversity STBC when the symbols are encoded using rotated square QAM constellations.

Modeling of the Effects of Process Variations on Circuit Delay at 65nm

A novel methodology for modeling the effects of process variations on circuit delay performance is proposed by relating the variations in process parameters to variations in delay metric of a complex digital circuit. The delay of a 2-input NAND gate with 65nm gate length transistors is extensively characterized by mixed-mode simulations which is then used as a library element. The variation in saturation current Ionat the device level, and the variation in rising/falling edge stage delay for the NAND gate at the circuit level, are taken as performance metrics. A 4-bit x 4-bit Wallace tree multiplier circuit is used as a representative combinational circuit to demonstrate the proposed methodology. The variation in the multiplier delay is characterized, to obtain delay distributions, by an extensive Monte Carlo analysis. An analytical model based on CV/I metric is proposed, to extend this methodology for a generic technology library with a variety of library elements.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.

Bayesian framework and message passing for joint support and signal recovery of approximately sparse signals

In this paper, we develop a low-complexity message passing algorithm for joint support and signal recovery of approximately sparse signals. The problem of recovery of strictly sparse signals from noisy measurements can be viewed as a problem of recovery of approximately sparse signals from noiseless measurements, making the approach applicable to strictly sparse signal recovery from noisy measurements. The support recovery embedded in the approach makes it suitable for recovery of signals with same sparsity profiles, as in the problem of multiple measurement vectors (MMV). Simulation results show that the proposed algorithm, termed as JSSR-MP (joint support and signal recovery via message passing) algorithm, achieves performance comparable to that of sparse Bayesian learning (M-SBL) algorithm in the literature, at one order less complexity compared to the M-SBL algorithm.

Subspace-based DOA estimation using Fractional Lower Order statistics

Direction Of Arrival (DOA) estimation, using a sensor array, in the presence of non-Gaussian noise using Fractional Lower-Order Moments (FLOM)matrices is studied. In this paper, a new FLOM based technique using the Fractional Lower Order Infinity Norm based Covariance (FLIC) Matrix is proposed. The bounded property and the low-rank subspace structure of the FLIC matrix is derived. Performance of FLIC based DOA estimation using MUSIC, ESPRIT, is shown to be better than other FLOM based methods.

Degrees of freedom of relay aided MIMO X network with orthogonal components

We consider the one-way relay aided MIMO X fading Channel where there are two transmitters and two receivers along with a relay with M antennas at every node. Every transmitter wants to transmit messages to every other receiver. The relay broadcasts to the receivers along a noisy link which is independent of the transmitters channel. In literature, this is referred to as a relay with orthogonal components. We derive an upper bound on the degrees of freedom of such a network. Next we show that the upper bound is tight by proposing an achievability scheme based on signal space alignment for the same for M = 2 antennas at every node.