185 resultados para solder


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In this paper the effects of constant and cyclic power loads on the evolution of interfacial reaction layers in lead-free solder interconnections are presented. Firstly, the differences in the growth behavior of intermetallic compound (IMC) layers at the cathode and anode sides of the interconnections are rationalized. This is done by considering the changes in the intrinsic fluxes of elements owing to electromigration as well as taking into account the fact that the growth of Cu3Sn and Cu6Sn5 are coupled via interfacial reactions. In this way, better understanding of the effect of electron flux on the growth of each individual layer in the Cu-Sn system can be achieved. Secondly, it is shown that there is a distinct difference between steady-state current stressing (constant current, constant temperature) and power cycling with alternating on- and off-cycle periods (accompanied by a change of temperature). The reasons behind the observed differences are subsequently discussed. Finally, special care is taken to ensure that the current densities are chosen in such a way that there is no risk for even partial melting of the solder interconnections.

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Metal stencils are well known in electronics printing application such as for dispensing solder paste for surface mounting, printing embedded passive elements in multilayer structures, etc. For microprinting applications using stencils, the print quality depends on the smoothness of the stencil aperture and its dimensional accuracy, which in turn are invariably related to the method used to manufacture the stencils. In this paper, fabrication of metal stencils using a photo-defined electrically assisted etching method is described. Apertures in the stencil were made in neutral electrolyte using three different types of impressed current, namely, dc, pulsed dc, and periodic pulse reverse (PPR). Dimensional accuracy and wall smoothness of the etched apertures in each of the current waveforms were compared. Finally, paste transfer efficiency of the stencil obtained using PPR was calculated and compared with those of a laser-cut electropolished stencil. It is observed that the stencil fabricated using current in PPR waveform has better dimensional accuracy and aperture wall smoothness than those obtained with dc and pulsed dc. From the paste transfer efficiency experiment, it is concluded that photo-defined electrically assisted etching method can provide an alternate route for fabrication of metal stencils for future microelectronics printing applications.

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Sn-Ag-Cu (SAC) solders are susceptible to appreciable microstructural coarsening during storage or service. This results in evolution of joint properties over time, and thereby influences the long-term reliability of microelectronic packages. Accurate prediction of this aging behavior is therefore critical for joint reliability predictions. Here, we study the precipitate coarsening behavior in two Sn-Ag-Cu (SAC) alloys, namely Sn-3.0Ag-0.5Cu and Sn-1.0Cu-0.5Cu, under different thermo-mechanical excursions, including isothermal aging at 150 degrees C for various lengths of time and thermo-mechanical cycling between -25 degrees C and 125 degrees C, with an imposed shear strain of similar to 19.6% per cycle, for different number of cycles. During isothermal aging and the thermo-mechanical cycling up to 200 cycles, Ag3Sn precipitates undergo rapid, monotonous coarsening. However, high number of thermo-mechanical cycling, usually between 200 and 600 cycles, causes dissolution and re-precipitation of precipitates, resulting in a fine and even distribution. Also, recrystallization of Sn-grains near precipitate clusters was observed during severe isothermal aging. Such responses are quite unusual for SAC solder alloys. In the regime of usual precipitate coarsening in these SAC alloys, an explicit parameter, which captures the thermo-mechanical history dependence of Ag3Sn particle size, was defined. Brief mechanistic description for the recrystallization of Sn grains during isothermal aging and reprecipitation of the Ag3Sn due to high number of thermo-mechanical cycles are also presented.

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When dropped, electronic packages often undergo failure by propagation of an interfacial crack in solder joints under a combination of tensile and shear loading. Hence, it is crucial to understand and predict the fracture behavior of solder joints under mixed-mode high-rate loading conditions. In this work, the effects of the loading conditions (strain rate and loading angle) and microstructure interfacial intermetallic compound (IMC) morphology and solder yield strength] on the mixed-mode fracture toughness of Sn-3.8 wt.%Ag-0.7 wt.%Cu solder joints sandwiched between two Cu substrates with electroless nickel immersion gold (ENIG) metallization have been studied, and compared with the fracture behavior of joints attached to bare Cu. Irrespective of the surface finish, the fracture toughness of the solder joints decreased monotonically with strain rate and mode-mixity, both resulting in increased fracture proportion through the interfacial IMC layer. Furthermore, the proportion of crack propagation through the interfacial IMC layer increased with increase in the thickness and the roughness of the interfacial IMC layer and the yield strength of the solder, resulting in a decrease in the fracture toughness of the joint. However, under most conditions, solder joints with ENIG finish showed higher resistance to fracture than joints attached directly to Cu substrates without ENIG metallization. Based on the experimental observations, a fracture mechanism map is constructed correlating the yield strength of the solder, the morphology and thickness of the interfacial IMC, and the fracture mechanisms as well as the fracture toughness values for different solder joints under mode I loading.

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During service and/or storage, Sn-Ag-Cu (SAC) solder alloys are subjected to temperatures ranging from 0.4 to 0.8 Tm (where Tm is the melting temperature of SAC alloys), making them highly prone to significant microstructural coarsening. The microstructures of these low melting point alloys continuously evolve during service. This results in evolution of creep properties of the joint over time, thereby influencing the long-term reliability of microelectronic packages. Here, we study microstructure evolution and creep behavior of two Sn-Ag-Cu (SAC) alloys, namely Sn-3.0Ag-0.5Cu and Sn-1.0Cu-0.5Cu, isothermally aged at 150 degrees C for various lengths of time. Creep behavior of the two SAC solders after different aging durations was systematically studied using impression creep technique. The key microstructural features that evolve during aging are Ag3Sn particle size and inter-particle spacing. Creep results indicate that the creep rate increases considerably with increasing inter-particle spacing although the creep stress exponent and creep activation energy are independent of the aging history.

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Thermal interface materials (TIMs) form a mechanical and thermal link between a heat source and a heat sink. Thus, they should have high thermal conductivity and high compliance to efficiently transfer heat and accommodate any differential strain between the heat source and the sink, respectively. This paper reports on the processing and the characterization of potential metallic TIM composite solders comprising of Cu, a high conductivity phase, uniformly embedded in In matrix, a highly compliant phase. We propose the fabrication of such a material by a two-step fabrication technique comprising of liquid phase sintering (LPS) followed by accumulative roll bonding (ARB). To demonstrate the efficacy of the employed two-step processing technique, an In-40 vol. % Cu composite solder was produced first using LPS with short sintering periods (30 or 60 s at 160 degrees C) followed by ARB up to five passes, each pass imposing a strain of 50%. Mechanical response and electrical and thermal conductivities of the fabricated samples were evaluated. It was observed that processing through ARB homogenizes the distribution of Cu in an In matrix, disintegrates the agglomerates of Cu powders, and also significantly increases thermal and electrical conductivities, almost attaining theoretically predicted values, without significantly increasing the flow stress. Furthermore, the processing technique also allows the insertion of desired foreign species, such as reduced graphene oxide, in In-Cu for further enhancing a target property, such as electrical conductivity.

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可控坍塌芯片互连(C4)技术可以实现高速、高密度、小外形的封装,因此日渐得到关注和发展。本文针对发展新一代c4技术所面临的不流动芯下材料的机械性能问题,采用具有不同填充颗粒含量的不流动芯下材料,通过对材料的机械性能的测试和分析以及有限元模拟,初步揭示了不流动芯下材料变形行为的特点,填充颗粒含量对芯下材料机械性能的影响,以及芯下材料机械性能和芯下材料工艺导致的颗粒沉积对封装可靠性的影响。首先在差示扫描量热仪(DSC)、热一力学分析仪(TMA)上对材料的固条件、热膨胀系数、玻璃化转变温度进行了测试,接着又在六轴微型试验机上对材料在不同温度和应变率下的应力一应变行为进行了测试。测试结果表明,所用材料的固化条件和玻璃化转变温度可以满足不流动芯下材料的性能要求,材料的热膨胀系数高于芯下材料理想的热膨胀系数值,材料中填充颗粒含量、温度、应变率等对材料的应力一应变行为有重要的影响。为了解芯下材料中填充颗粒含量对机械性能的影响,对不同颗粒含量材料在各测试温度和应变率下的杨氏模量、屈服强度和流动应力进行了对比和分析。结果表明,在各测试条件下,芯下材料的杨氏模量基本随着颗粒含量的增加而升高;温度较低时,材料的屈服强度随颗粒含量的增加而升高,但是,较高温度时,材料的屈服强度和流动应力随着颗粒含量的增加呈现先升高后降低再升高的变化趋势。为理解芯下材料的屈服强度和流动应力随着颗粒含量非单调变化的行为,采用广义Eshelby等效夹杂法对含颗粒试样在单轴拉伸时试样内的应力分布进行了分析,并用纳米硬度计对材料纳米尺度的性能进行了测量。应力分析的结果表明,不流动芯下材料的SiO2填充颗粒的加入会在基体里引起应力集中,应力集中系数随着颗粒含量的增加先升高后降低,试样内的应力集中有使材料屈服强度降低的趋势。纳米硬度计的测试结果表明,芯~卜材料内形成了性能介于颗粒Z基体之间的界面相,界面相的形成有使芯下材料屈服强度提高的趋势。芯下材料屈服强度随着填充颗粒含量的非单调的变化是应力集中和界面效应藕合作用的结果。温度和应变率是影响芯下材料机械性能的重要因素。为刻画温度和应变率的效应,采用Pe化yna模型描述材料的应力一应变行为。结果表明,Per叮na模型可以拟合材料应变率相关的应力一应变行为,描述不流动芯下材料应力一应变曲线的基本趋势,对材料在测试范围外的行为给出较合理的预测,并且Perzyna模型可以很方便地用于ABAQUS中,这将易于工业应用。最后,采用商用有限元程序AB AQus分析了芯下材料机械性能和芯下材料工艺导致的填充颗粒沉积对C4封装可靠性的影响。结果表明,在芯片/基板的缝隙中填入芯下材料可以显著延长可控坍塌倒装封装焊点的热疲劳寿命,提高封装可靠性,可控坍塌倒装封装焊点的热疲劳寿命随着芯下材料中填充颗粒含量的增加而增长;芯下材料中填充颗粒在C4封装基板侧的沉积将导致封装焊点的热疲劳寿命缩短,而颗粒在芯片侧的沉积则可使焊点的热疲劳寿命稍稍延长。

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Este trabalho avaliou o comportamento eletroquímico do metal de base (MB) de uma liga a base de níquel-cromo em relação a juntas soldadas desta liga obtidas pelos processos de brasagem (BRA) e Tungsten Inert Gas (TIG), imersos em saliva artificial com pH 2,5 e 5,5. Foram também realizados ensaios de microdureza e caracterização microestrutural, por meio de microscopia óptica e eletrônica de varredura e análise química semi-quantitativa por EDS, nos grupos MB, TIG, BRA e no cordão de solda a laser (LAS). O MB apresentou uma matriz rica em níquel e cromo, distribuída em um arranjo dendrítico típico, apresentando inclusões metálicas de silício e titânio, além de porosidades. As soldas TIG e LAS revelaram uma microestrutura mais refinada que o MB, mostrando, entretanto, uma mesma composição química e distribuição de seus elementos. A solda BRA apresentou diferenças marcantes em sua microestrutura, composição química e distribuição de seus elementos em relação ao MB. Os dados de microdureza Vickers (HV), potencial de corrosão (Ecorr) e densidade de corrente de corrosão (jcorr) foram analisados com ANOVA e teste de Tukey (p<0,05). Para determinação da influência do pH quanto a resistência à corrosão dos grupos MB, TIG e BRA, empregou-se o teste t de Student (p<0,05). O MB apresentou menor média de microdureza (256,13 9,39 HV), seguido pelos grupos TIG (271,53 8,07 HV), LAS (303,73 13,93 HV) e BRA (551,99 37,73 HV). Em pH 2,5 as médias do Ecorr (mV) para o MB, TIG e BRA foram, respectivamente, -67,9 8,43, -52,78 16,74, e -284,33 19,04; e em pH 5,5, médias de -54,03 21,15, -62,08 20,16 e -278,8 28,96. Os valores médios de jcorr (A.cm-2) para o MB, TIG e BRA em pH 2,5 foram, respectivamente, 2,49 0,95, 5,584 1,64 e 27,45 4,9; e em pH 5,5, médias de 1,929 0,83, 4,267 1,51 e 54,2 11,96. Os grupos MB e TIG apresentaram boa resistência à corrosão, com maior módulo de impedância em relação ao grupo BRA. As diferenças no pH da saliva artificial não alteraram o comportamento corrosivo dos grupos MB e TIG. Entretanto, observou-se uma redução marcante na jcorr e no módulo de impedância nas soldas obtidas pelo processo de brasagem. O grupo BRA apresentou corrosão galvânica ao ser analisado formando par com o MB, mostrando uma jcorr de 5,3 A.cm-2. Entretanto, o mesmo não foi observado quando o MB foi associado à solda TIG, onde a jcorr foi cerca de 150 vezes menor. O grupo BRA, além de apresentar um comportamento eletroquímico muito diferente do MB, revelou diferenças marcantes quanto a composição química, aspecto microestrutural e microdureza. As juntas TIG e LAS mostraram semelhanças químicas e microestruturais em relação ao MB, sendo que na solda TIG esta semelhança foi ainda mais evidente. Além disto, a solda TIG apresentou um comportamento eletroquímico muito semelhante ao MB e, portanto, parecendo ser mais recomendável para soldar ligas odontológicas de níquel-cromo em relação aos demais processos de soldagem aqui avaliados.

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In this paper, we report on the realisation of a free space deposition process (FSD). For the first time the use of a moving support structure to deposit tracks of metal starting from a substrate and extending into free space is characterised. The ability to write metal shapes in free space has wide ranging applications in additive manufacturing and rapid prototyping where the tracks can be layered to build overhanging features without the use of fixed support structures (such as is used in selective laser melting (SLM) and stereo lithography (SLA)). We demonstrate and perform a preliminary characterisation of the process in which a soldering iron was used to deposit lead free solder tracks. The factors affecting the stability of tracks and the effect of operating parameters, temperature, velocity, initial track starting diameter and starting volume were measured. A series of 10 tracks at each setting were compared with a control group of tracks; the track width, taper and variation between tracks were compared. Notable results in free space track deposition were that the initial track diameter and volume affected the repeatability and quality of tracks. The standard deviation of mean track width of tracks from the constrained initial diameter group were half that of the unconstrained group. The amount of material fed to the soldering iron before commencing deposition affected the taper of tracks. At an initial volume of 7 mm3 and an initial track diameter of 0.8 mm, none of the ten tracks deposited broke or showed taper > ∼1°. The maximum deposition velocity for free space track deposition using lead-free solder was limited to 1.5 mm s-1. © 2011 Elsevier B.V. All rights reserved.

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A novel integration method for the production of cost-effective optoelectronic printed circuit boards (OE PCBs) is presented. The proposed integration method allows fabrication of OE PCBs with manufacturing processes common to the electronics industry while enabling direct attachment of electronic components onto the board with solder reflow processes as well as board assembly with automated pick-and-place tools. The OE PCB design is based on the use of polymer multimode waveguides, end-fired optical coupling schemes, and simple electro-optic connectors, eliminating the need for additional optical components in the optical layer, such as micro-mirrors and micro-lenses. A proof-of-concept low-cost optical transceiver produced with the proposed integration method is presented. This transceiver is fabricated on a low-cost FR4 substrate, comprises a polymer Y-splitter together with the electronic circuitry of the transmitter and receiver modules and achieves error-free 10-Gb/s bidirectional data transmission. Theoretical studies on the optical coupling efficiencies and alignment tolerances achieved with the employed end-fired coupling schemes are presented while experimental results on the optical transmission characteristics, frequency response, and data transmission performance of the integrated optical links are reported. The demonstrated optoelectronic unit can be used as a front-end optical network unit in short-reach datacommunication links. © 2011-2012 IEEE.

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This paper presents a novel platform for the formation of cost-effective PCB-integrated optical waveguide sensors. The sensor design relies on the use of multimode polymer waveguides that can be formed directly on standard PCBs and commercially-available chemical dyes, enabling the integration of all essential sensor components (electronic, photonic, chemical) on low-cost substrates. Moreover, it enables the detection of multiple analytes from a single device by employing waveguide arrays functionalised with different chemical dyes. The devices can be manufactured with conventional methods of the PCB industry, such as solder-reflow processes and pick-and-place assembly techniques. As a proof of principle, a PCB-integrated ammonia gas sensor is fabricated on a FR4 substrate. The sensor operation relies on the change of the optical transmission characteristics of chemically functionalised optical waveguides in the presence of ammonia molecules. The fabrication and assembly of the sensor unit, as well as fundamental simulation and characterisation studies, are presented. The device achieves a sensitivity of approximately 30 ppm and a linear response up to 600 ppm at room temperature. Finally, the potential to detect multiple analytes from a single device is demonstrated using principal-component analysis. © 1983-2012 IEEE.

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This article describes Yasmina Khadra’s autobiographical work composed of two books: "L’écrivain" and "L’imposture des mots" and its reception in France. The main purpose of this study was to establish the literary genre of these books, which implies determining whether Khandra’s work represents an autobiography or an autofiction with reference to P. Lejeune’s and V. Colonna’s theoretical studies. The dividing line between two genres in Khandra’s works refl ects his inner split between being either a solder or a writer. The presentation will also help to understand the controversy resulting from Khandra’s participation in Algerian civil war. Moreover the analysis is related to modern Algerian history.

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The performance of an RF output matching network is dependent on integrity of the ground connection. If this connection is compromised in anyway, additional parasitic elements may occur that can degrade performance and yield unreliable results. Traditionally, designers measure Constant Wave (CW) power to determine that the RF chain is performing optimally, the device is properly matched and by implication grounded. It is shown that there are situations where modulation quality can be compromised due to poor grounding that is not apparent using CW power measurements alone. The consequence of this is reduced throughput, range and reliability. Measurements are presented on a Tyndall Mote using a CC2420 RFIC todemonstrate how poor solder contact between the ground contacts and the ground layer of the PCB can lead tothe degradation of modulated performance. Detailed evaluation that required the development of a new measurement definition for 802.15.4 and analysis is presented to show how waveform quality is affected while the modulated output power remains within acceptable limits.

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Widespread adoption of lead-free materials and processing for printed circuit board (PCB) assembly has raised reliability concerns regarding surface insulation resistance (SIR) degradation and electrochemical migration (ECM). As PCB conductor spacings decrease, electronic products become more susceptible to these failures mechanisms, especially in the presence of surface contamination and flux residues which might remain after no-clean processing. Moreover, the probability of failure due to SIR degradation and ECM is affected by the interaction between physical factors (such as temperature, relative humidity, electric field) and chemical factors (such as solder alloy, substrate material, no-clean processing). Current industry standards for assessing SIR reliability are designed to serve as short-term qualification tests, typically lasting 72 to 168 hours, and do not provide a prediction of reliability in long-term applications. The risk of electrochemical migration with lead-free assemblies has not been adequately investigated. Furthermore, the mechanism of electrochemical migration is not completely understood. For example, the role of path formation has not been discussed in previous studies. Another issue is that there are very few studies on development of rapid assessment methodologies for characterizing materials such as solder flux with respect to their potential for promoting ECM. In this dissertation, the following research accomplishments are described: 1). Long-term temp-humidity-bias (THB) testing over 8,000 hours assessing the reliability of printed circuit boards processed with a variety of lead-free solder pastes, solder pad finishes, and substrates. 2). Identification of silver migration from Sn3.5Ag and Sn3.0Ag0.5Cu lead-free solder, which is a completely new finding compared with previous research. 3). Established the role of path formation as a step in the ECM process, and provided clarification of the sequence of individual steps in the mechanism of ECM: path formation, electrodeposition, ion transport, electrodeposition, and filament formation. 4). Developed appropriate accelerated testing conditions for assessing the no-clean processed PCBs' susceptibility to ECM: a). Conductor spacings in test structures should be reduced in order to reflect the trend of higher density electronics and the effect of path formation, independent of electric field, on the time-to-failure. b). THB testing temperatures should be modified according to the material present on the PCB, since testing at 85oC can cause the evaporation of weak organic acids (WOAs) in the flux residues, leading one to underestimate the risk of ECM. 5). Correlated temp-humidity-bias testing with ion chromatography analysis and potentiostat measurement to develop an efficient and effective assessment methodology to characterize the effect of no-clean processing on ECM.

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This paper describes how modeling technology has been used in providing fatigue life time data of two flip-chip models. Full-scale three-dimensional modeling of flip-chips under cyclic thermal loading has been combined with solder joint stand-off height prediction to analyze the stress and strain conditions in the two models. The Coffin-Manson empirical relationship is employed to predict the fatigue life times of the solder interconnects. In order to help designers in selecting the underfill material and the printed circuit board, the Young's modulus and the coefficient of thermal expansion of the underfill, as well as the thickness of the printed circuit boards are treated as variable parameters. Fatigue life times are therefore calculated over a range of these material and geometry parameters. In this paper we will also describe how the use of micro-via technology may affect fatigue life