Oxide electronics for imaging and displays

Despite material weaknesses, considerable progress has been made in designing large area systems such as displays and imaging arrays. This talk will address the various large area technologies, and in particular, review amorphous oxide semiconductors and associated design approaches, along with driving schemes for displays, imaging and other applications. © 2013 IEEE.

Graphene nanoribbon blends with P3HT for organic electronics.

In organic field-effect transistors (OFETs) the electrical characteristics of polymeric semiconducting materials suffer from the presence of structural/morphological defects and grain boundaries as well as amorphous domains within the film, hindering an efficient transport of charges. To improve the percolation of charges we blend a regioregular poly(3-hexylthiophene) (P3HT) with newly designed N = 18 armchair graphene nanoribbons (GNRs). The latter, prepared by a bottom-up solution synthesis, are expected to form solid aggregates which cannot be easily interfaced with metallic electrodes, limiting charge injection at metal-semiconductor interfaces, and are characterized by a finite size, thus by grain boundaries, which negatively affect the charge transport within the film. Both P3HT and GNRs are soluble/dispersible in organic solvents, enabling the use of a single step co-deposition process. The resulting OFETs show a three-fold increase in the charge carrier mobilities in blend films, when compared to pure P3HT devices. This behavior can be ascribed to GNRs, and aggregates thereof, facilitating the transport of the charges within the conduction channel by connecting the domains of the semiconductor film. The electronic characteristics of the devices such as the Ion/Ioff ratio are not affected by the addition of GNRs at different loads. Studies of the electrical characteristics under illumination for potential use of our blend films as organic phototransistors (OPTs) reveal a tunable photoresponse. Therefore, our strategy offers a new method towards the enhancement of the performance of OFETs, and holds potential for technological applications in (opto)electronics.

Top down scale-up of semiconducting nanostructures for large area electronics

In this paper, we present a study on electrical and optical characteristics of n-type tin-oxide nanowires integrated based on top-down scale-up strategy. Through a combination of contact printing and plasma based back-channel passivation, we have achieved stable electrical characteristics with standard deviation in mobility and threshold voltage of 9.1% and 25%, respectively, for a large area of 1× 1 cm2 area. Through use of contact printing, high alignment of nanowires was achieved thus minimizing the number of nanowire-nanowire junctions, which serve to limit carrier transport in the channel. In addition, persistent photoconductivity has been observed, which we attribute to oxygen vacancy ionization and subsequent elimination using a gate pulse driving scheme. © 2014 IEEE.

Multiphysics modelling for electronics design

The future of many companies will depend to a large extent on their ability to initiate techniques that bring schedules, performance, tests, support, production, life-cycle-costs, reliability prediction and quality control into the earliest stages of the product creation process. Important questions for an engineer who is responsible for the quality of electronic parts such as printed circuit boards (PCBs) during design, production, assembly and after-sales support are: What is the impact of temperature? What is the impact of this temperature on the stress produced in the components? What is the electromagnetic compatibility (EMC) associated with such a design? At present, thermal, stress and EMC calculations are undertaken using different software tools that each require model build and meshing. This leads to a large investment in time, and hence cost, to undertake each of these simulations. This paper discusses the progression towards a fully integrated software environment, based on a common data model and user interface, having the capability to predict temperature, stress and EMC fields in a coupled manner. Such a modelling environment used early within the design stage of an electronic product will provide engineers with fast solutions to questions regarding thermal, stress and EMC issues. The paper concentrates on recent developments in creating such an integrated modeling environment with preliminary results from the analyses conducted. Further research into the thermal and stress related aspects of the paper is being conducted under a nationally funded project, while their application in reliability prediction will be addressed in a new European project called PROFIT.

An integrated approach to flow, thermal and mechanical modeling of electronics devices

The future success of many electronics companies will depend to a large extent on their ability to initiate techniques that bring schedules, performance, tests, support, production, life-cycle-costs, reliability prediction and quality control into the earliest stages of the product creation process. Earlier papers have discussed the benefits of an integrated analysis environment for system-level thermal, stress and EMC prediction. This paper focuses on developments made to the stress analysis module and presents results obtained for an SMT resistor. Lifetime predictions are made using the Coffin-Manson equation. Comparison with the creep strain energy based models of Darveaux (1997) shows the shear strain based method to underestimate the solder joint life. Conclusions are also made about the capabilities of both approaches to predict the qualitative and quantitative impact of design changes.

Thermo-mechanical modelling of power electronics module structures

Power electronic modules distinguish themselves from other modules by their high power operation. These modules are used extensively in high power application markets such as aerospace, automotive, industrial and traction and drives. This paper discusses typical packaging technologies for power electronics modules. It also discusses the latest results from a UK research project investigating the physics-of-failure approach to reliability analysis and predictions for power modules. An integrated design enviroment for incorporating of affects of uncertainty into the design environment was outlined.

Reliability analysis for power electronics modules

This paper discusses the reliability of power electronics modules. The approach taken combines numerical modeling techniques with experimentation and accelerated testing to identify failure modes and mechanisms for the power module structure and most importantly the root cause of a potential failure. The paper details results for two types of failure (i) wire bond fatigue and (ii) substrate delamination. Finite element method modeling techniques have been used to predict the stress distribution within the module structures. A response surface optimisation approach has been employed to enable the optimal design and parameter sensitivity to be determined. The response surface is used by a Monte Carlo method to determine the effects of uncertainty in the design.

Lifetime prediction for power electronics module substrate mount-down solder interconnect

A numerical modeling method for the prediction of the lifetime of solder joints of relatively large solder area under cyclic thermal-mechanical loading conditions has been developed. The method is based on the Miner's linear damage accumulation rule and the properties of the accumulated plastic strain in front of the crack in large area solder joint. The nonlinear distribution of the damage indicator in the solder joints have been taken into account. The method has been used to calculate the lifetime of the solder interconnect in a power module under mixed cyclic loading conditions found in railway traction control applications. The results show that the solder thickness is a parameter that has a strong influence on the damage and therefore the lifetime of the solder joint while the substrate width and the thickness of the baseplate are much less important for the lifetime

Multiphysics simulation of microwave curing in micro-electronics packaging applications

Purpose – This paper aims to present an open-ended microwave curing system for microelectronics components and a numerical analysis framework for virtual testing and prototyping of the system, enabling design of physical prototypes to be optimized, expediting the development process. Design/methodology/approach – An open-ended microwave oven system able to enhance the cure process for thermosetting polymer materials utilised in microelectronics applications is presented. The system is designed to be mounted on a precision placement machine enabling curing of individual components on a circuit board. The design of the system allows the heating pattern and heating rate to be carefully controlled optimising cure rate and cure quality. A multi-physics analysis approach has been adopted to form a numerical model capable of capturing the complex coupling that exists between physical processes. Electromagnetic analysis has been performed using a Yee finite-difference time-domain scheme, while an unstructured finite volume method has been utilized to perform thermophysical analysis. The two solvers are coupled using a sampling-based cross-mapping algorithm. Findings – The numerical results obtained demonstrate that the numerical model is able to obtain solutions for distribution of temperature, rate of cure, degree of cure and thermally induced stresses within an idealised polymer load heated by the proposed microwave system. Research limitations/implications – The work is limited by the absence of experimentally derived material property data and comparative experimental results. However, the model demonstrates that the proposed microwave system would seem to be a feasible method of expediting the cure rate of polymer materials. Originality/value – The findings of this paper will help to provide an understanding of the behaviour of thermosetting polymer materials during microwave cure processing.

Optimizing the reliability of power electronics module isolation substrates

Optimal design of a power electronics module isolation substrate is assessed using a combination of finite element structural mechanics analysis and response surface optimisation technique. Primary failure modes in power electronics modules include the loss of structural integrity in the ceramic substrate materials due to stresses induced through thermal cycling. Analysis of the influence of ceramic substrate design parameters is undertaken using a design of experiments approach. Finite element analysis is used to determine the stress distribution for each design, and the results are used to construct a quadratic response surface function. A particle swarm optimisation algorithm is then used to determine the optimal substrate design. Analysis of response surface function gradients is used to perform sensitivity analysis and develop isolation substrate design rules. The influence of design uncertainties introduced through manufacturing tolerances is assessed using a Monte-Carlo algorithm, resulting in a stress distribution histogram. The probability of failure caused by the violation of design constraints has been analyzed. Six geometric design parameters are considered in this work and the most important design parameters have been identified. Overall analysis results can be used to enhance the design and reliability of the component.

A prognostic assessment method for power electronics modules

This paper describes a prognostic method which combines the physics of failure models with probability reasoning algorithm. The measured real time data (temperature vs. time) was used as the loading profile for the PoF simulations. The response surface equation of the accumulated plastic strain in the solder interconnect in terms of two variables (average temperature, and temperature amplitude) was constructed. This response surface equation was incorporated into the lifetime model of solder interconnect, and therefore the remaining life time of the solder component under current loading condition was predicted. The predictions from PoF models were also used to calculate the conditional probability table for a Bayesian Network, which was used to take into account of the impacts of the health observations of each product in lifetime prediction. The prognostic prediction in the end was expressed as the probability for the product to survive the expected future usage. As a demonstration, this method was applied to an IGBT power module used for aircraft applications.

Uncertainty analysis to minimise risk in designing micro-electronics manufacturing processes

A design methodology based on numerical modelling, integrated with optimisation techniques and statistical methods, to aid the process control of micro and nano-electronics based manufacturing processes is presented in this paper. The design methodology is demonstrated for a micro-machining process called Focused Ion Beam (FIB). This process has been modelled to help understand how a pre-defined geometry of micro- and nano- structures can be achieved using this technology. The process performance is characterised on the basis of developed Reduced Order Models (ROM) and are generated using results from a mathematical model of the Focused Ion Beam and Design of Experiment (DoE) methods. Two ion beam sources, Argon and Gallium ions, have been used to compare and quantify the process variable uncertainties that can be observed during the milling process. The evaluations of the process performance takes into account the uncertainties and variations of the process variables and are used to identify their impact on the reliability and quality of the fabricated structure. An optimisation based design task is to identify the optimal process conditions, by varying the process variables, so that certain quality objectives and requirements are achieved and imposed constraints are satisfied. The software tools used and developed to demonstrate the design methodology are also presented.