Technology and characterization of GaN-HEMTs devices: high temperature and trapping effects

Los transistores de alta movilidad electrónica basados en GaN han sido objeto de una extensa investigación ya que tanto el GaN como sus aleaciones presentan unas excelentes propiedades eléctricas (alta movilidad, elevada concentración de portadores y campo eléctrico crítico alto). Aunque recientemente se han incluido en algunas aplicaciones comerciales, su expansión en el mercado está condicionada a la mejora de varios asuntos relacionados con su rendimiento y habilidad. Durante esta tesis se han abordado algunos de estos aspectos relevantes; por ejemplo, la fabricación de enhancement mode HEMTs, su funcionamiento a alta temperatura, el auto calentamiento y el atrapamiento de carga. Los HEMTs normalmente apagado o enhancement mode han atraído la atención de la comunidad científica dedicada al desarrollo de circuitos amplificadores y conmutadores de potencia, ya que su utilización disminuiría significativamente el consumo de potencia; además de requerir solamente una tensión de alimentación negativa, y reducir la complejidad del circuito y su coste. Durante esta tesis se han evaluado varias técnicas utilizadas para la fabricación de estos dispositivos: el ataque húmedo para conseguir el gate-recess en heterostructuras de InAl(Ga)N/GaN; y tratamientos basados en flúor (plasma CF4 e implantación de F) de la zona debajo de la puerta. Se han llevado a cabo ataques húmedos en heteroestructuras de InAl(Ga)N crecidas sobre sustratos de Si, SiC y zafiro. El ataque completo de la barrera se consiguió únicamente en las muestras con sustrato de Si. Por lo tanto, se puede deducir que la velocidad de ataque depende de la densidad de dislocaciones presentes en la estructura, ya que el Si presenta un peor ajuste del parámetro de red con el GaN. En relación a los tratamientos basados en flúor, se ha comprobado que es necesario realizar un recocido térmico después de la fabricación de la puerta para recuperar la heteroestructura de los daños causados durante dichos tratamientos. Además, el estudio de la evolución de la tensión umbral con el tiempo de recocido ha demostrado que en los HEMTs tratados con plasma ésta tiende a valores más negativos al aumentar el tiempo de recocido. Por el contrario, la tensión umbral de los HEMTs implantados se desplaza hacia valores más positivos, lo cual se atribuye a la introducción de iones de flúor a niveles más profundos de la heterostructura. Los transistores fabricados con plasma presentaron mejor funcionamiento en DC a temperatura ambiente que los implantados. Su estudio a alta temperatura ha revelado una reducción del funcionamiento de todos los dispositivos con la temperatura. Los valores iniciales de corriente de drenador y de transconductancia medidos a temperatura ambiente se recuperaron después del ciclo térmico, por lo que se deduce que dichos efectos térmicos son reversibles. Se han estudiado varios aspectos relacionados con el funcionamiento de los HEMTs a diferentes temperaturas. En primer lugar, se han evaluado las prestaciones de dispositivos de AlGaN/GaN sobre sustrato de Si con diferentes caps: GaN, in situ SiN e in situ SiN/GaN, desde 25 K hasta 550 K. Los transistores con in situ SiN presentaron los valores más altos de corriente drenador, transconductancia, y los valores más bajos de resistencia-ON, así como las mejores características en corte. Además, se ha confirmado que dichos dispositivos presentan gran robustez frente al estrés térmico. En segundo lugar, se ha estudiado el funcionamiento de transistores de InAlN/GaN con diferentes diseños y geometrías. Dichos dispositivos presentaron una reducción casi lineal de los parámetros en DC en el rango de temperaturas de 25°C hasta 225°C. Esto se debe principalmente a la dependencia térmica de la movilidad electrónica, y también a la reducción de la drift velocity con la temperatura. Además, los transistores con mayores longitudes de puerta mostraron una mayor reducción de su funcionamiento, lo cual se atribuye a que la drift velocity disminuye más considerablemente con la temperatura cuando el campo eléctrico es pequeño. De manera similar, al aumentar la distancia entre la puerta y el drenador, el funcionamiento del HEMT presentó una mayor reducción con la temperatura. Por lo tanto, se puede deducir que la degradación del funcionamiento de los HEMTs causada por el aumento de la temperatura depende tanto de la longitud de la puerta como de la distancia entre la puerta y el drenador. Por otra parte, la alta densidad de potencia generada en la región activa de estos transistores conlleva el auto calentamiento de los mismos por efecto Joule, lo cual puede degradar su funcionamiento y Habilidad. Durante esta tesis se ha desarrollado un simple método para la determinación de la temperatura del canal basado en medidas eléctricas. La aplicación de dicha técnica junto con la realización de simulaciones electrotérmicas han posibilitado el estudio de varios aspectos relacionados con el autocalentamiento. Por ejemplo, se han evaluado sus efectos en dispositivos sobre Si, SiC, y zafiro. Los transistores sobre SiC han mostrado menores efectos gracias a la mayor conductividad térmica del SiC, lo cual confirma el papel clave que desempeña el sustrato en el autocalentamiento. Se ha observado que la geometría del dispositivo tiene cierta influencia en dichos efectos, destacando que la distribución del calor generado en la zona del canal depende de la distancia entre la puerta y el drenador. Además, se ha demostrado que la temperatura ambiente tiene un considerable impacto en el autocalentamiento, lo que se atribuye principalmente a la dependencia térmica de la conductividad térmica de las capas y sustrato que forman la heterostructura. Por último, se han realizado numerosas medidas en pulsado para estudiar el atrapamiento de carga en HEMTs sobre sustratos de SiC con barreras de AlGaN y de InAlN. Los resultados obtenidos en los transistores con barrera de AlGaN han presentado una disminución de la corriente de drenador y de la transconductancia sin mostrar un cambio en la tensión umbral. Por lo tanto, se puede deducir que la posible localización de las trampas es la región de acceso entre la puerta y el drenador. Por el contrario, la reducción de la corriente de drenador observada en los dispositivos con barrera de InAlN llevaba asociado un cambio significativo en la tensión umbral, lo que implica la existencia de trampas situadas en la zona debajo de la puerta. Además, el significativo aumento del valor de la resistencia-ON y la degradación de la transconductancia revelan la presencia de trampas en la zona de acceso entre la puerta y el drenador. La evaluación de los efectos del atrapamiento de carga en dispositivos con diferentes geometrías ha demostrado que dichos efectos son menos notables en aquellos transistores con mayor longitud de puerta o mayor distancia entre puerta y drenador. Esta dependencia con la geometría se puede explicar considerando que la longitud y densidad de trampas de la puerta virtual son independientes de las dimensiones del dispositivo. Finalmente se puede deducir que para conseguir el diseño óptimo durante la fase de diseño no sólo hay que tener en cuenta la aplicación final sino también la influencia que tiene la geometría en los diferentes aspectos estudiados (funcionamiento a alta temperatura, autocalentamiento, y atrapamiento de carga). ABSTRACT GaN-based high electron mobility transistors have been under extensive research due to the excellent electrical properties of GaN and its related alloys (high carrier concentration, high mobility, and high critical electric field). Although these devices have been recently included in commercial applications, some performance and reliability issues need to be addressed for their expansion in the market. Some of these relevant aspects have been studied during this thesis; for instance, the fabrication of enhancement mode HEMTs, the device performance at high temperature, the self-heating and the charge trapping. Enhancement mode HEMTs have become more attractive mainly because their use leads to a significant reduction of the power consumption during the stand-by state. Moreover, they enable the fabrication of simpler power amplifier circuits and high-power switches because they allow the elimination of negativepolarity voltage supply, reducing significantly the circuit complexity and system cost. In this thesis, different techniques for the fabrication of these devices have been assessed: wet-etching for achieving the gate-recess in InAl(Ga)N/GaN devices and two different fluorine-based treatments (CF4 plasma and F implantation). Regarding the wet-etching, experiments have been carried out in InAl(Ga)N/GaN grown on different substrates: Si, sapphire, and SiC. The total recess of the barrier was achieved after 3 min of etching in devices grown on Si substrate. This suggests that the etch rate can critically depend on the dislocations present in the structure, since the Si exhibits the highest mismatch to GaN. Concerning the fluorine-based treatments, a post-gate thermal annealing was required to recover the damages caused to the structure during the fluorine-treatments. The study of the threshold voltage as a function of this annealing time has revealed that in the case of the plasma-treated devices it become more negative with the time increase. On the contrary, the threshold voltage of implanted HEMTs showed a positive shift when the annealing time was increased, which is attributed to the deep F implantation profile. Plasma-treated HEMTs have exhibited better DC performance at room temperature than the implanted devices. Their study at high temperature has revealed that their performance decreases with temperature. The initial performance measured at room temperature was recovered after the thermal cycle regardless of the fluorine treatment; therefore, the thermal effects were reversible. Thermal issues related to the device performance at different temperature have been addressed. Firstly, AlGaN/GaN HEMTs grown on Si substrate with different cap layers: GaN, in situ SiN, or in situ SiN/GaN, have been assessed from 25 K to 550 K. In situ SiN cap layer has been demonstrated to improve the device performance since HEMTs with this cap layer have exhibited the highest drain current and transconductance values, the lowest on-resistance, as well as the best off-state characteristics. Moreover, the evaluation of thermal stress impact on the device performance has confirmed the robustness of devices with in situ cap. Secondly, the high temperature performance of InAlN/GaN HEMTs with different layouts and geometries have been assessed. The devices under study have exhibited an almost linear reduction of the main DC parameters operating in a temperature range from room temperature to 225°C. This was mainly due to the thermal dependence of the electron mobility, and secondly to the drift velocity decrease with temperature. Moreover, HEMTs with large gate length values have exhibited a great reduction of the device performance. This was attributed to the greater decrease of the drift velocity for low electric fields. Similarly, the increase of the gate-to-drain distance led to a greater reduction of drain current and transconductance values. Therefore, this thermal performance degradation has been found to be dependent on both the gate length and the gate-to-drain distance. It was observed that the very high power density in the active region of these transistors leads to Joule self-heating, resulting in an increase of the device temperature, which can degrade the device performance and reliability. A simple electrical method have been developed during this work to determine the channel temperature. Furthermore, the application of this technique together with the performance of electro-thermal simulations have enabled the evaluation of different aspects related to the self-heating. For instance, the influence of the substrate have been confirmed by the study of devices grown on Si, SiC, and Sapphire. HEMTs grown on SiC substrate have been confirmed to exhibit the lowest self-heating effects thanks to its highest thermal conductivity. In addition to this, the distribution of the generated heat in the channel has been demonstrated to be dependent on the gate-to-drain distance. Besides the substrate and the geometry of the device, the ambient temperature has also been found to be relevant for the self-heating effects, mainly due to the temperature-dependent thermal conductivity of the layers and the substrate. Trapping effects have been evaluated by means of pulsed measurements in AlGaN and InAIN barrier devices. AlGaN barrier HEMTs have exhibited a de crease in drain current and transconductance without measurable threshold voltage change, suggesting the location of the traps in the gate-to-drain access region. On the contrary, InAIN barrier devices have showed a drain current associated with a positive shift of threshold voltage, which indicated that the traps were possibly located under the gate region. Moreover, a significant increase of the ON-resistance as well as a transconductance reduction were observed, revealing the presence of traps on the gate-drain access region. On the other hand, the assessment of devices with different geometries have demonstrated that the trapping effects are more noticeable in devices with either short gate length or the gate-to-drain distance. This can be attributed to the fact that the length and the trap density of the virtual gate are independent on the device geometry. Finally, it can be deduced that besides the final application requirements, the influence of the device geometry on the performance at high temperature, on the self-heating, as well as on the trapping effects need to be taken into account during the device design stage to achieve the optimal layout.

Influence of fabrication steps on optical and electrical properties of InN thin films

This paper reports on a case study of the impact of fabrication steps on InN material properties. We discuss the influence of annealing time and sequence of device processing steps. Photoluminescence (PL), surface morphology and electrical transport (electrical resistivity and low frequency noise) properties have been studied as responses to the adopted fabrication steps. Surface morphology has a strong correlation with annealing times, while sequences of fabrication steps do not appear to be influential. In contrast, the optical and electrical properties demonstrate correlation with both etching and thermal annealing. For all the studied samples PL peaks were in the vicinity of 0.7 eV, but the intensity and full width at half maximum (FWHM) demonstrate a dependence on the technological steps followed. Sheet resistance and electrical resistivity seem to be lower in the case of high defect introduction due to both etching and thermal treatments. The same effect is revealed through 1/f noise level measurements. A reduction of electrical resistivity is connected to an increase in 1/f noise level.

Component integration strategies in metamorphic 4-junction III-V concentrator solar cells

Progressing beyond 3-junction inverted-metamorphic multijunction solar cells grown on GaAs substrates, to 4-junction devices, requires the development of high quality metamorphic 0.7 eV GaInAs solar cells. Once accomplished, the integration of this subcell into a full, Monolithic, series connected, 4J-IMM structure demands the development of a metamorphic tunnel junction lattice matched to the 1eV GaInAs subcell. Moreover, the 0.7 eV junction adds about 2 hours of growth time to the structure, implying a heavier annealing of the subcells and tunnel junctions grown first. The final 4J structure is above 20 Pm thick, with about half of this thickness used by the metamorphic buffers required to change the lattice constant throughout the structure. Thinning of these buffers would help reduce the total thickness of the 4J structure to decrease its growth cost and the annealing time. These three topics: development of a metamorphic tunnel junction for the 4th junction, analysis of the annealing, and thinning of the structure, are tackled in this work. The results presented show the successful implementation of an antimonide-based tunnel junction for the 4th junction and of pathways to mitigate the impact of annealing and reduce the thickness of the metamorphic buffers.

Molecular alignment relaxation in polymer optical fibers for sensing applications

A systematic study of annealing behavior of drawn PMMA fibers was performed. Annealing dynamics were investigated under different environmental conditions by fiber longitudinal shrinkage monitoring. The shrinkage process was found to follow a stretched exponential decay function revealing the heterogeneous nature of the underlying molecular dynamics. The complex dependence of the fiber shrinkage on initial degree of molecular alignment in the fiber, annealing time and temperature was investigated and interpreted. Moreover, humidity was shown to have a profound effect on the annealing process, which was not recognized previously. Annealing was also shown to have considerable effect on the fiber mechanical properties associated with the relaxation of molecular alignment in the fiber. The consequences of fiber annealing for the climatic stability of certain polymer optical fiber-based sensors are discussed, emphasizing the importance of fiber controlled pre-annealing with respect to the foreseeable operating conditions.

Coupling of magnetic, strain and electric polarization fields in the structure of multiferroic material

The comprehensive study on the coupling of magnetism, electrical polarization and the crystalline lattice with the off-stoichiometric effects in self-doped multiferroic hexagonal h-LuMnxO3±δ (0.92≤x≤1.12) ceramic oxides was carried out for the PhD work. There is a complex coupling of the three ferroic degrees. The cancelation of the magnetic moments of ions in the antiferromagnetic order, electric polarization with specific vortex/antivortex topology and lattice properties have pushed researchers to find out ways to disclose the underlying physics and chemistry of magneto-electric and magneto-elastic couplings of h-RMnO3 multiferroic materials. In this research work, self-doping of Lu-sites or Mn-sites of h-LuMnxO3±δ ceramics prepared via solid state route was done to pave a way for deeper understanding of the antiferromagnetic transition, the weak ferromagnetism often reported in the same crystalline lattices and the ferroelectric properties coupled to the imposed lattice changes. Accordingly to the aim of the PhD thesis, the objectives set for the sintering study in the first chapter on experimental results were two. First, study of sintering off-stoichiometric samples within conditions reported in the bibliography and also extracted from the phase diagrams of the LuMnxO3±δ, with a multiple firings ending with a last high temperature step at 1300ºC for 24 hours. Second, explore longer annealing times of up to 240 hours at the fixed temperature of 1300 ºC in a search for improving the properties of the solid solution under study. All series of LuMnxO3±δ ceramics for each annealing time were characterized to tentatively build a framework enabling comparison of measured properties with results of others available in literature. XRD and Rietveld refinement of data give the evolution the lattice parameters as a function to x. Shrinkage of the lattice parameters with increasing x values was observed, the stability limit of the solid solution being determined by analysis of lattice parameters. The evolution of grain size and presence of secondary phases have been investigated by means of TEM, SEM, EDS and EBSD techniques. The dependencies of grain growth and regression of secondary phases on composition x and time were further characterized. Magnetic susceptibility of samples and magnetic irreversibility were extensively examined in the present work. The dependency of magnetic susceptibility, Neel ordering transition and important magnetic parameters are determined and compared to observation in other multiferroics in the following chapter of the thesis. As a tool of high sensitivity to detect minor traces of the secondary phase hausmannite, magnetic measurements are suggested for cross-checking of phase diagrams. Difficulty of previous studies on interpreting the magnetic anomaly below 43 K in h-RMnO3 oxides was discussed and assigned to the Mn3O4 phase, with supported of the electron microscopy. Magneto-electric coupling where AFM ordering is coupled to dielectric polarization is investigated as a function of x and of sintering condition via frequency and temperature dependent complex dielectric constant measurements in the final chapter of the thesis. Within the limits of solid solubility, the crystalline lattice of off-stoichiometric ceramics was shown to preserve the magneto-electric coupling at TN. It represents the first research work on magneto-electric coupling modified by vacancy doping to author’s knowledge. Studied lattices would reveal distortions at the atomic scale imposed by local changes of x dependent on sintering conditions which were widely inspected by using TEM/STEM methods, complemented with EDS and EELS spectroscopy all together to provide comprehensive information on cross coupling of distortions, inhomogeneity and electronic structure assembled and discussed in a specific chapter. Internal interfaces inside crystalline grains were examined. Qualitative explanations of the measured magnetic and ferroelectric properties were established in relation to observed nanoscale features of h-LuMnxO3±δ ceramics. Ferroelectric domains and topological defects are displayed both in TEM and AFM/PFM images, the later technique being used to look at size, distribution and switching of ferroelectric domains influenced by vacancy doping at the micron scale bridging to complementary TEM studies on the atomic structure of ferroelectric domains. In support to experimental study, DFT simulations using Wien2K code have been carried out in order to interpret the results of EELS spectra of O K-edge and to obtain information on the cation hybridization to oxygen ions. The L3,2 edges of Mn is used to access the oxidation state of the Mn ions inside crystalline grains. In addition, rehybridization driven ferroelectricity is also evaluated by comparing the partial density of states of the orbitals of all ions of the samples, also the polarization was calculated and correlated to the off-stoichiometric effect.

Rigorous finite-time guarantees for optimization on continuous domains by simulated annealing

Simulated annealing is a popular method for approaching the solution of a global optimization problem. Existing results on its performance apply to discrete combinatorial optimization where the optimization variables can assume only a finite set of possible values. We introduce a new general formulation of simulated annealing which allows one to guarantee finite-time performance in the optimization of functions of continuous variables. The results hold universally for any optimization problem on a bounded domain and establish a connection between simulated annealing and up-to-date theory of convergence of Markov chain Monte Carlo methods on continuous domains. This work is inspired by the concept of finite-time learning with known accuracy and confidence developed in statistical learning theory.

TIME RESOLVED REFLECTIVITY MEASUREMENTS APPLIED TO RAPID ISOTHERMAL ANNEALING OF ION IMPLANTED SILICON.

The annealing of ion implantation damage in silicon by rapid isothermal heating has been monitored by the time resolved reflectivity (TRR) method. This technique was applied simultaneously at a wavelength of 632. 8nm and also at 1152nm, where the optical absorption coefficient of silicon is less. The two wavelength method simplifies the interpretation of TRR results, extends the measurement depth and allows good resolution of the position of the interface between amorphous and crystalline silicon. The regrowth of amorphous layers in silicon, created by self implantation and implanted with electrically active impurities, was observed. Regrowth in rapid isothermal annealing occurs during the heating up stage of typical thermal cycles. Impurities such as B, P, and As increase the regrowth rate in a manner consistent with a vacancy model for regrowth. The maximum regrowth rate in boron implanted silicon is limited by the solid solubility.

Simulated Annealing: Rigorous finite-time guarantees for optimization on continuous domains

Simulated annealing is a popular method for approaching the solution of a global optimization problem. Existing results on its performance apply to discrete combinatorial optimization where the optimization variables can assume only a finite set of possible values. We introduce a new general formulation of simulated annealing which allows one to guarantee finite-time performance in the optimization of functions of continuous variables. The results hold universally for any optimization problem on a bounded domain and establish a connection between simulated annealing and up-to-date theory of convergence of Markov chain Monte Carlo methods on continuous domains. This work is inspired by the concept of finite-time learning with known accuracy and confidence developed in statistical learning theory.

Robot path planning in dynamic environments using a simulated annealing based approach

Mobile robots are widely used in many industrial fields. Research on path planning for mobile robots is one of the most important aspects in mobile robots research. Path planning for a mobile robot is to find a collision-free route, through the robot’s environment with obstacles, from a specified start location to a desired goal destination while satisfying certain optimization criteria. Most of the existing path planning methods, such as the visibility graph, the cell decomposition, and the potential field are designed with the focus on static environments, in which there are only stationary obstacles. However, in practical systems such as Marine Science Research, Robots in Mining Industry, and RoboCup games, robots usually face dynamic environments, in which both moving and stationary obstacles exist. Because of the complexity of the dynamic environments, research on path planning in the environments with dynamic obstacles is limited. Limited numbers of papers have been published in this area in comparison with hundreds of reports on path planning in stationary environments in the open literature. Recently, a genetic algorithm based approach has been introduced to plan the optimal path for a mobile robot in a dynamic environment with moving obstacles. However, with the increase of the number of the obstacles in the environment, and the changes of the moving speed and direction of the robot and obstacles, the size of the problem to be solved increases sharply. Consequently, the performance of the genetic algorithm based approach deteriorates significantly. This motivates the research of this work. This research develops and implements a simulated annealing algorithm based approach to find the optimal path for a mobile robot in a dynamic environment with moving obstacles. The simulated annealing algorithm is an optimization algorithm similar to the genetic algorithm in principle. However, our investigation and simulations have indicated that the simulated annealing algorithm based approach is simpler and easier to implement. Its performance is also shown to be superior to that of the genetic algorithm based approach in both online and offline processing times as well as in obtaining the optimal solution for path planning of the robot in the dynamic environment. The first step of many path planning methods is to search an initial feasible path for the robot. A commonly used method for searching the initial path is to randomly pick up some vertices of the obstacles in the search space. This is time consuming in both static and dynamic path planning, and has an important impact on the efficiency of the dynamic path planning. This research proposes a heuristic method to search the feasible initial path efficiently. Then, the heuristic method is incorporated into the proposed simulated annealing algorithm based approach for dynamic robot path planning. Simulation experiments have shown that with the incorporation of the heuristic method, the developed simulated annealing algorithm based approach requires much shorter processing time to get the optimal solutions in the dynamic path planning problem. Furthermore, the quality of the solution, as characterized by the length of the planned path, is also improved with the incorporated heuristic method in the simulated annealing based approach for both online and offline path planning.

A simulated annealing algorithm for energy efficient virtual machine placement

Improving energy efficiency has become increasingly important in data centers in recent years to reduce the rapidly growing tremendous amounts of electricity consumption. The power dissipation of the physical servers is the root cause of power usage of other systems, such as cooling systems. Many efforts have been made to make data centers more energy efficient. One of them is to minimize the total power consumption of these servers in a data center through virtual machine consolidation, which is implemented by virtual machine placement. The placement problem is often modeled as a bin packing problem. Due to the NP-hard nature of the problem, heuristic solutions such as First Fit and Best Fit algorithms have been often used and have generally good results. However, their performance leaves room for further improvement. In this paper we propose a Simulated Annealing based algorithm, which aims at further improvement from any feasible placement. This is the first published attempt of using SA to solve the VM placement problem to optimize the power consumption. Experimental results show that this SA algorithm can generate better results, saving up to 25 percentage more energy than First Fit Decreasing in an acceptable time frame.

The effect of hydroxyl groups and surface area of hematite derived from annealing goethite for phosphate removal

Synthetic goethite and thermally treated goethite at different temperatures were used to remove phosphate from sewage. The effect of annealing temperature on phosphate removal over time was investigated. X-ray diffraction(XRD), transmission electron microscopy (TEM), N2 adsorption and desorption (BET), and infrared emission spectrum (FT-IES) were utilized to characterize the phase, morphology, specific surface area, pore distribution, and the surface groups of samples. The results show that annealed products of goethite at temperatures over 250 °C are hematite with the similar morphology as the original goethite with different hydroxyl groups and surface area. Increasing temperature causes the decrease in hydroxyl groups, consequential increase in surface area at first and then experiences a decrease (14.8–110.4–12.6 m2/g) and the subsequent formation of nanoscale pores. The variation rate of hydroxyl groups and surface area based on FT-IES and BET, respectively, are used to evaluate the effect of annealing temperature on phosphate removal. By using all of the characterization techniques, it is concluded that the changes of phosphate removal basically result from the total variation rate between hydroxyl groups and surface area.

Dynamic robot path planning using an enhanced simulated annealing approach

Evolutionary computation is an effective tool for solving optimization problems. However, its significant computational demand has limited its real-time and on-line applications, especially in embedded systems with limited computing resources, e.g., mobile robots. Heuristic methods such as the genetic algorithm (GA) based approaches have been investigated for robot path planning in dynamic environments. However, research on the simulated annealing (SA) algorithm, another popular evolutionary computation algorithm, for dynamic path planning is still limited mainly due to its high computational demand. An enhanced SA approach, which integrates two additional mathematical operators and initial path selection heuristics into the standard SA, is developed in this work for robot path planning in dynamic environments with both static and dynamic obstacles. It improves the computing performance of the standard SA significantly while giving an optimal or near-optimal robot path solution, making its real-time and on-line applications possible. Using the classic and deterministic Dijkstra algorithm as a benchmark, comprehensive case studies are carried out to demonstrate the performance of the enhanced SA and other SA algorithms in various dynamic path planning scenarios.

A hybrid constructive heuristic and simulated annealing for railway crew scheduling

Railway crew scheduling problem is the process of allocating train services to the crew duties based on the published train timetable while satisfying operational and contractual requirements. The problem is restricted by many constraints and it belongs to the class of NP-hard. In this paper, we develop a mathematical model for railway crew scheduling with the aim of minimising the number of crew duties by reducing idle transition times. Duties are generated by arranging scheduled trips over a set of duties and sequentially ordering the set of trips within each of duties. The optimisation model includes the time period of relief opportunities within which a train crew can be relieved at any relief point. Existing models and algorithms usually only consider relieving a crew at the beginning of the interval of relief opportunities which may be impractical. This model involves a large number of decision variables and constraints, and therefore a hybrid constructive heuristic with the simulated annealing search algorithm is applied to yield an optimal or near-optimal schedule. The performance of the proposed algorithms is evaluated by applying computational experiments on randomly generated test instances. The results show that the proposed approaches obtain near-optimal solutions in a reasonable computational time for large-sized problems.

TlBr raw material purification, crystal growth, annealing, detector fabrication and characterisation for gamma-ray detector applications

The research reported in this thesis dealt with single crystals of thallium bromide grown for gamma-ray detector applications. The crystals were used to fabricate room temperature gamma-ray detectors. Routinely produced TlBr detectors often are poor quality. Therefore, this study concentrated on developing the manufacturing processes for TlBr detectors and methods of characterisation that can be used for optimisation of TlBr purity and crystal quality. The processes under concern were TlBr raw material purification, crystal growth, annealing and detector fabrication. The study focused on single crystals of TlBr grown from material purified by a hydrothermal recrystallisation method. In addition, hydrothermal conditions for synthesis, recrystallisation, crystal growth and annealing of TlBr crystals were examined. The final manufacturing process presented in this thesis deals with TlBr material purified by the Bridgman method. Then, material is hydrothermally recrystallised in pure water. A travelling molten zone (TMZ) method is used for additional purification of the recrystallised product and then for the final crystal growth. Subsequent processing is similar to that described in the literature. In this thesis, literature on improving quality of TlBr material/crystal and detector performance is reviewed. Aging aspects as well as the influence of different factors (temperature, time, electrode material and so on) on detector stability are considered and examined. The results of the process development are summarised and discussed. This thesis shows the considerable improvement in the charge carrier properties of a detector due to additional purification by hydrothermal recrystallisation. As an example, a thick (4 mm) TlBr detector produced by the process was fabricated and found to operate successfully in gamma-ray detection, confirming the validity of the proposed purification and technological steps. However, for the complete improvement of detector performance, further developments in crystal growth are required. The detector manufacturing process was optimized by characterisation of material and crystals using methods such as X-ray diffraction (XRD), polarisation microscopy, high-resolution inductively coupled plasma mass (HR-ICPM), Fourier transform infrared (FTIR), ultraviolet and visual (UV-Vis) spectroscopy, field emission scanning electron microscope (FESEM) and energy-dispersive X-ray spectroscopy (EDS), current-voltage (I-V) and capacity voltage (CV) characterisation, and photoconductivity, as well direct detector examination.

Time Evolution of the Microstructure of VO2(B) Films Deposited on Glass by MOCVD

Thin films of VO2(B), a metastable polymorph of vanadium dioxide, have been grown on glass by low-pressure metalorganic chemical vapor deposition (MOCVD). The films grown for 90 minutes have atypical microstructure, comprising micrometer-sized, island-like entities made up of numerous small, single-crystalline platelets (≅1 μm) emerging orthogonally from larger ones at the center. Microstructure evolution as a function of deposition time has been examined by X-ray diffraction, scanning electron microscopy, and transmission electron microscopy. The metastable VO2(B) transforms to the stable rutile (R) phase at 550°C in inert ambient, which on cooling convert reversibly to M phase. Electron microscopy shows that annealing leads to the disintegration of the VO2(B) platelets into small crystallites of the rutile phase VO2(R), although the platelet morphology is retained. The magnitude of the jump in resistance at the semiconductor-to-metal, VO2(M)→VO2(R) phase transition depends on the arrangement of polycrystalline platelets in the films.