956 resultados para Unbalanced circuit


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The optimisation is reported on the design of unbalanced magnetron (UBM) sputtering cathodes. For the study, a planar circular cathode backed by a double-coil electromagnet (compatible for a 100 mm diameter target) was developed. The variation of the structure and strength of the magnetic field in front of the target was investigated for different current combinations in the electromagnetic coils, and its effect on the sputtering process was analysed. The observations on the magnetic field geometry revealed some interesting features, such as the balancing point of the fields along the axis (null-point), and the zero axial region over the target surface (B-z = 0 ring). The positions of both could be controlled by adjusting the ratio of the electric current in the coils. The magnetic field null-point could be used as a reference for the region of homogeneous film growth. The B-z = 0 ring was the location where the glow discharge concentrated (or where the maximum target erosion occurred). The diameter of the ring determined the area covered by the discharge and thus the sputtering efficiency. The optimum substrate position can be fixed according to the position of the null-point and optimisation of sputtering can be achieved by adjusting the diameter of the B-z = 0 ring. The results of this study should be helpful in the designing of an ideal UBM using permanent magnets as well as electromagnets. (C) 1999 Elsevier Science Ltd. All rights reserved.

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Load commutated inverter (LCI)-fed wound field synchronous motor drives are used for medium-voltage high-power drive applications. This drive suffers from drawbacks such as complex starting procedure, sixth harmonic torque pulsations, quasi square wave motor current, notches in the terminal voltages, etc. In this paper, a hybrid converter circuit, consisting of an LCI and a voltage source inverter (VSI), is proposed, which can be a universal high-power converter solution for wound field synchronous motor drives. The proposed circuit, with the addition of a current-controlled VSI, overcomes nearly all of the shortcomings present in the conventional LCI-based system besides providing many additional advantages. In the proposed drive, the motor voltage and current are always sinusoidal even with the LCI switching at the fundamental frequency. The performance of the drive is demonstrated with detailed experimental waveforms from a 15.8-hp salient pole wound field synchronous machine. Finally, a brief description of the control scheme used for the proposed circuit is given.

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The vacuum interrupter is extensively employed in the medium voltage switchgear for the interruption of the short-circuit current. The voltage across the arc during current interruption is termed as the arc voltage. The nature and magnitude of this arc voltage is indicative of the performance of the contacts and the vacuum interrupter as a whole. Also, the arc voltage depends on the parameters like the magnitude of short-circuit current, the arcing time, the point of opening of the contacts, the geometry and area of the contacts and the type of magnetic field. This paper investigates the dependency of the arc voltage on some of these parameters. The paper also discusses the usefulness of the arc voltage in diagnosing the performance of the contacts.

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Transfer function coefficients (TFC) are widely used to test linear analog circuits for parametric and catastrophic faults. This paper presents closed form expressions for an upper bound on the defect level (DL) and a lower bound on fault coverage (FC) achievable in TFC based test method. The computed bounds have been tested and validated on several benchmark circuits. Further, application of these bounds to scalable RC ladder networks reveal a number of interesting characteristics. The approach adopted here is general and can be extended to find bounds of DL and FC of other parametric test methods for linear and non-linear circuits.

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A novel methodology for modeling the effects of process variations on circuit delay performance is proposed by relating the variations in process parameters to variations in delay metric of a complex digital circuit. The delay of a 2-input NAND gate with 65nm gate length transistors is extensively characterized by mixed-mode simulations which is then used as a library element. The variation in saturation current Ionat the device level, and the variation in rising/falling edge stage delay for the NAND gate at the circuit level, are taken as performance metrics. A 4-bit x 4-bit Wallace tree multiplier circuit is used as a representative combinational circuit to demonstrate the proposed methodology. The variation in the multiplier delay is characterized, to obtain delay distributions, by an extensive Monte Carlo analysis. An analytical model based on CV/I metric is proposed, to extend this methodology for a generic technology library with a variety of library elements.

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An extension to a formal verification approach of hybrid systems is proposed to verify analog and mixed signal (AMS) designs. AMS designs can be formally modeled as hybrid systems and therefore lend themselves to the formal analysis and verification techniques applied to hybrid systems. The proposed approach employs simulation traces obtained from an actual design implementation of AMS circuit blocks (for example, in the form of SPICE netlists) to carry out formal analysis and verification. This enables the same platform used for formally validating an abstract model of an AMS design, to be also used for validating its different refinements and design implementation; thereby, providing a simple route to formal verification at different levels of implementation. The feasibility of the proposed approach is demonstrated with a case study based on a tunnel diode oscillator. Since the device characteristic of a tunnel diode is highly non-linear with a negative resistance region, dynamic behavior of circuits in which it is employed as an element is difficult to model, analyze and verify within a general hybrid system formal verification tool. In the case study presented the formal model and the proposed computational techniques have been incorporated into CheckMate, a formal verification tool based on MATLAB and Simulink-Stateflow Framework from MathWorks.

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A set of formulas is derived from general circuit constants which facilitates formation of the impedance matrix of a power system by the bus-impedance method. The errors associated with the lumpedparameter representation of a transmission line are thereby eliminated. The formulas are valid for short lines also, if the relevant general circuit constants are employed. The mutual impedance between the added line and the existing system is not considered, but the approach suggested can well be extended to it.

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Abstract | Non-crystalline or glassy semiconductors are of great research interest for the fabrication of large area electronic systems such as displays and image sensors. Good uniformity over large areas, low temperature fabrication and the promise of low cost electronics on large area mechanically flexible and rigid substrates are some attractive features of these technologies. The article focusses on amorphous hydrogenated silicon thin film transistors, and reviews the problems, solutions and applications of these devices.

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This paper reports the results of employing an artificial bee colony search algorithm for synthesizing a mutually coupled lumped-parameter ladder-network representation of a transformer winding, starting from its measured magnitude frequency response. The existing bee colony algorithm is suitably adopted by appropriately defining constraints, inequalities, and bounds to restrict the search space and thereby ensure synthesis of a nearly unique ladder network corresponding to each frequency response. Ensuring near-uniqueness while constructing the reference circuit (i.e., representation of healthy winding) is the objective. Furthermore, the synthesized circuits must exhibit physical realizability. The proposed method is easy to implement, time efficient, and problems associated with the supply of initial guess in existing methods are circumvented. Experimental results are reported on two types of actual, single, and isolated transformer windings (continuous disc and interleaved disc).

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Analytical solution is presented to convert a given driving-point impedance function (in s-domain) into a physically realisable ladder network with inductive coupling between any two sections and losses considered. The number of sections in the ladder network can vary, but its topology is assumed fixed. A study of the coefficients of the numerator and denominator polynomials of the driving-point impedance function of the ladder network, for increasing number of sections, led to the identification of certain coefficients, which exhibit very special properties. Generalised expressions for these specific coefficients have also been derived. Exploiting their properties, it is demonstrated that the synthesis method essentially turns out to be an exercise of solving a set of linear, simultaneous, algebraic equations, whose solution directly yields the ladder network elements. The proposed solution is novel, simple and guarantees a unique network. Presently, the formulation can synthesise a unique ladder network up to six sections.