960 resultados para THIN-FILM TRANSISTORS
Resumo:
PDMS based imprinting is firstly developed for patterning of rGO on a large area. High quality stripe and square shaped rGO patterns are obtained and the electrical properties of the rGO film can be adjusted by the concentration of GO suspension. The arrays of rGO electronics are fabricated from the patterned film by a simple shadow mask method. Gas sensors, which are based on these rGO electronics, show high sensitivity and recyclable usage in sensing NH 3. © 2012 The Royal Society of Chemistry.
Resumo:
A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.
Resumo:
Stress/recovery measurements demonstrate that even high-performance passivated In-Zn-O/ Ga-In-Zn-O thin film transistors with excellent in-dark stability suffer from light-bias induced threshold voltage shift (ΔV T) and defect density changes. Visible light stress leads to ionisation of oxygen vacancy sites, causing persistent photoconductivity. This makes the material act as though it was n-doped, always causing a negative threshold voltage shift under strong illumination, regardless of the magnitude and polarity of the gate bias.
Resumo:
A temperature-dependent mobility model in amorphous oxide semiconductor (AOS) thin film transistors (TFTs) extracted from measurements of source-drain terminal currents at different gate voltages and temperatures is presented. At low gate voltages, trap-limited conduction prevails for a broad range of temperatures, whereas variable range hopping becomes dominant at lower temperatures. At high gate voltages and for all temperatures, percolation conduction comes into the picture. In all cases, the temperature-dependent mobility model obeys a universal power law as a function of gate voltage. © 2011 IEEE.
Resumo:
Stress/recovery measurements demonstrate that even highperformance passivated In-Zn-O/ Ga-In-Zn-O thin film transistors with excellent in-dark stability suffer from light-bias induced threshold voltage shift (ΔV T) and defect density changes. Visible light stress leads to ionisation of oxygen vacancy sites, causing persistent photoconductivity. This makes the material act as though it was n-doped, always causing a negative threshold voltage shift under strong illumination, regardless of the magnitude and polarity of the gate bias. © 2011 SID.
Resumo:
Organic thin-film transistors based on polycrystalline copper phthalocyanine (CuPc) were fabricated by using poly(vinyl alcohol) as gate dielectric. After treatment of the gate dielectric using an octadecyltrichlorosilane self-assembled monolayer, a mobility of up to 0.11 cm2/V∈s was achieved, which is comparable to that of single-crystal CuPc devices (0.1-1 cm2/V∈s). The surface morphology was analyzed and the possible reasons for the enhanced mobility are discussed. © 2009 Springer-Verlag.
Resumo:
Contact resistance has a significant impact on the electrical characteristics of thin film transistors. It limits their maximum on-current and affects their subsequent behavior with bias. This distorts the extracted device parameters, in particular, the field-effect mobility. This letter presents a method capable of accounting for both the non-ohmic (nonlinear) and ohmic (linear) contact resistance effects solely based upon terminal I-V measurements. Applying our analysis to a nanocrystalline silicon thin film transistor, we demonstrate that contact resistance effects can lead to a twofold underestimation of the field-effect mobility. © 2008 American Institute of Physics.
Resumo:
We present an analytical field-effect method to extract the density of subgap states (subgap DOS) in amorphous semiconductor thin-film transistors (TFTs), using a closed-form relationship between surface potential and gate voltage. By accounting the interface states in the subthreshold characteristics, the subgap DOS is retrieved, leading to a reasonably accurate description of field-effect mobility and its gate voltage dependence. The method proposed here is very useful not only in extracting device performance but also in physically based compact TFT modeling for circuit simulation. © 2012 IEEE.
Resumo:
We demonstrate a stretched contact-printing technique to assemble one-dimensional nanostructures with controlled density and orientation. Over 90% nanowires are highly aligned along the primary stretching direction. Specifically, The hybrid inorganic-organic TFTs based on a parallel-aligned nanowire network and a semiconducting polymer reveal a significant positive enhancement in transistor performance and air-stability.
Resumo:
In this paper, we present a physically-based compact model for the sub-threshold behavior in a TFT with an amorphous semiconductor channel. Both drift and diffusion current components are considered and combined using an harmonic average. Here, the diffusion component describes the exponential current behavior due to interfacial deep states, while the drift component is associated with presence of localized deep states formed by dangling bonds broken from weak bonds in the bulk and follows a power law. The proposed model yields good agreement with measured results. © 2013 IEEE.
Power Law Dependence of Field-Effect Mobility in Amorphous Oxide Semiconductor Thin Film Transistors