Cellular settings mediating Src Substrate switching between Focal Adhesion Kinase Tyrosine 861 and CUB-domain-containing protein 1 (CDCP1) Tyrosine 734

Reciprocal interactions between Src family kinases (SFKs) and focal adhesion kinase (FAK) are critical during changes in cell attachment. Recently it has been recognized that another SFK substrate, CUB-domain-containing protein 1 (CDCP1), is differentially phosphorylated during these events. However, the molecular processes underlying SFK-mediated phosphorylation of CDCP1 are poorly understood. Here we identify a novel mechanism in which FAK tyrosine 861 and CDCP1-Tyr-734 compete as SFK substrates and demonstrate cellular settings in which SFKs switch between these sites. Our results show that stable CDCP1 expression induces robust SFK-mediated phosphorylation of CDCP1-Tyr-734 with concomitant loss of p-FAK-Tyr-861 in adherent HeLa cells. SFK substrate switching in these cells is dependent on the level of expression of CDCP1 and is also dependent on CDCP1-Tyr-734 but is independent of CDCP1-Tyr-743 and -Tyr-762. In HeLa CDCP1 cells, engagement of SFKs with CDCP1 is accompanied by an increase in phosphorylation of Src-Tyr-416 and a change in cell morphology to a fibroblastic appearance dependent on CDCP1-Tyr-734. SFK switching between FAK-Tyr-861 and CDCP1-Tyr-734 also occurs during changes in adhesion of colorectal cancer cell lines endogenously expressing these two proteins. Consistently, increased p-FAK-Tyr-861 levels and a more epithelial morphology are seen in colon cancer SW480 cells silenced for CDCP1. Unlike protein kinase Cδ, FAK does not appear to form a trimeric complex with Src and CDCP1. These data demonstrate novel aspects of the dynamics of SFK-mediated cell signaling that may be relevant during cancer progression.

Interactions and consequences of inertia and switching costs

Purpose: Service research typically relates switching costs to customer loyalty, and portrays them as effective switching deterrents that engender harmful word-of-mouth (WOM). Rather than to customer loyalty, this paper aims to relate switching costs to consumer inertia, and show that while switching costs may result in customer retention, they can engender positive and negative WOM. This depends on whether the inertia stems from satisfaction or indifference. Design/methodology/approach: A mall-intercept survey investigated 518 customers' perceptions of their mobile phone service providers. Structural equation modelling fitted the data to the conceptual model. Findings: Switching costs deterred switching and engendered negative WOM, but only with low-inertia customers. With high-inertia customers, retention and WOM behaviours depended on whether the inertia stemmed from satisfaction or indifference. Satisfied customers with high switching costs tended to stay, gave more positive and less negative WOM. With indifferent customers, switching costs were unrelated to retention or WOM behaviours. Research limitations/implications: While they may be perceived negatively, switching costs can engender PWOM. Hence, research should not consider switching costs alone without considering the context that produces them. Practical implications: Service providers should segment their customers into low-inertia, high-inertia/satisfied and high-inertia/indifferent, and target each segment differently. By converting customers into the high-inertia/satisfied segment, service providers can make the best use of switching costs – not only in the traditional sense as a barrier to defection, but also as a way of generating positive WOM. Originality/value: This study is the first to consider the role of inertia with switching costs, positive WOM, and negative WOM. The findings suggest that past studies portraying switching costs as negative impediments that evoke only negative WOM might be misleading.

Control of dc capacitor voltages in diode-clamped multilevel inverter using bidirectional buck-boost choppers

The dc capacitors voltage unbalancing is the main technical drawback of a diode-clamped multilevel inverter (DCMLI), with more than three levels. A voltage-balancing circuit based on buck–boost chopper connected to the dc link of DCMLI is a reliable and robust solution to this problem. This study presents four different schemes for controlling the chopper circuit to achieve the capacitor voltages equalisation. These can be broadly categorised as single-pulse, multi-pulse and hysteresis band current control schemes. The single-pulse scheme does not involve faster switching actions but need the chopper devices to be rated for higher current. The chopper devices current rating can be kept limited by using the multi-pulse scheme but it involves faster switching actions and slower response. The hysteresis band current control scheme offers faster dynamics, lower current rating of the chopper devices and can nullify the initial voltage imbalance as well. However, it involves much faster switching actions which may not be feasible for some of its applications. Therefore depending on the system requirements and ratings, one of these schemes may be used. The performance and validity of the proposed schemes are confirmed through both simulation and experimental investigations on a prototype five-level diode-clamped inverter.

A method of extracting switching loss from a high efficiency MOSFET based half bridge converter

The measurement of losses in high efficiency / high power converters is difficult. Measuring the losses directly from the difference between the input and output power results in large errors. Calorimetric methods are usually used to bypass this issue but introduce different problems, such as, long measurement times, limited power loss measurement range and/or large set up cost. In this paper the total losses of a converter are measured directly and switching losses are exacted. The measurements can be taken with only three multimeters and a current probe and a standard bench power supply. After acquiring two or three power loss versus output current sweeps, a series of curve fitting processes are applied and the switching losses extracted.

Pavlovian fear memory circuits and phenotype models of PTSD

Pavlovian fear conditioning, also known as classical fear conditioning is an important model in the study of the neurobiology of normal and pathological fear. Progress in the neurobiology of Pavlovian fear also enhances our understanding of disorders such as posttraumatic stress disorder (PTSD) and with developing effective treatment strategies. Here we describe how Pavlovian fear conditioning is a key tool for understanding both the neurobiology of fear and the mechanisms underlying variations in fear memory strength observed across different phenotypes. First we discuss how Pavlovian fear models aspects of PTSD. Second, we describe the neural circuits of Pavlovian fear and the molecular mechanisms within these circuits that regulate fear memory. Finally, we show how fear memory strength is heritable; and describe genes which are specifically linked to both changes in Pavlovian fear behavior and to its underlying neural circuitry. These emerging data begin to define the essential genes, cells and circuits that contribute to normal and pathological fear.

Engineering electrodeposited ZnO films and their memristive switching performance

We report the influence of zinc oxide (ZnO) seed layers on the performance of ZnO-based memristive devices fabricated using an electrodeposition approach. The memristive element is based on a sandwich structure using Ag and Pt electrodes. The ZnO seed layer is employed to tune the morphology of the electrodeposited ZnO films in order to increase the grain boundary density as well as construct highly ordered arrangements of grain boundaries. Additionally, the seed layer also assists in optimizing the concentration of oxygen vacancies in the films. The fabricated devices exhibit memristive switching behaviour with symmetrical and asymmetrical hysteresis loops in the absence and presence of ZnO seed layers, respectively. A modest concentration of oxygen vacancy in electrodeposited ZnO films as well as an increase in the ordered arrangement of grain boundaries leads to higher switching ratios in Ag/ZnO/Pt devices.

Hebbian reverberations in emotional memory micro circuits

The study of memory in most behavioral paradigms, including emotional memory paradigms, has focused on the feed forward components that underlie Hebb’s first postulate, associative synaptic plasticity. Hebb’s second postulate argues that activated ensembles of neurons reverberate in order to provide temporal coordination of different neural signals, and thereby facilitate coincidence detection. Recent evidence from our groups has suggested that the lateral amygdala (LA) contains recurrent microcircuits and that these may reverberate. Additionally this reverberant activity is precisely timed with latencies that would facilitate coincidence detection between cortical and sub cortical afferents to the LA.Thus, recent data at the microcircuit level in the amygdala provide some physiological evidence in support of the second Hebbian postulate.

Voltage unbalance reduction in low voltage feeders by dynamic switching of residential customers among three phases

Low voltage distribution feeders with large numbers of single phase residential loads experience severe current unbalance that often causes voltage unbalance problems. The addition of intermittent generation and new loads in the form of roof top photovoltaic generation and electric vehicles makes these problems even more acute. In this paper, an intelligent dynamic residential load transfer scheme is proposed. Residential loads can be transferred from one phase to another phase to minimize the voltage unbalance along the feeder. Each house is supplied through a static transfer switch with three-phase input and single-phase output connection. The main controller, installed at the transformer will observe the power consumption in each load and determine which house(s) should be transferred from one phase to another in order to keep the voltage unbalance in the feeder at a minimum. The efficacy of the proposed load transfer scheme is verified through MATLAB and PSCAD/EMTDC simulations.

Smart Inter-Phase Switching of Residential Loads in Low Voltage Distribution Feeders

In order to dynamically reduce voltage unbalance along a low voltage distribution feeder, a smart residential load transfer system is discussed. In this scheme, residential loads can be transferred from one phase to another to minimize the voltage unbalance along the feeder. Each house is supplied through a static transfer switch and a controller. The master controller, installed at the transformer, observes the power consumption in each house and will determine which house(s) should be transferred from an initially connected phase to another in order to keep the voltage unbalance minimum. The performance of the smart load transfer scheme is demonstrated by simulations.

Switching radical stability by pH-induced orbital conversion

In most radicals the singly occupied molecular orbital (SOMO) is the highest-energy occupied molecular orbital (HOMO); however, in a small number of reported compounds this is not the case. In the present work we expand significantly the scope of this phenomenon, known as SOMO-HOMO energy-level conversion, by showing that it occurs in virtually any distonic radical anion that contains a sufficiently stabilized radical (aminoxyl, peroxyl, aminyl) non-pi-conjugated with a negative charge (carboxylate, phosphate, sulfate). Moreover, regular orbital order is restored on protonation of the anionic fragment, and hence the orbital configuration can be switched by pH. Most importantly, our theoretical and experimental results reveal a dramatically higher radical stability and proton acidity of such distonic radical anions. Changing radical stability by 3-4 orders of magnitude using pH-induced orbital conversion opens a variety of attractive industrial applications, including pH-switchable nitroxide-mediated polymerization, and it might be exploited in nature.

Universal codes from switching strategies

We discuss algorithms for combining sequential prediction strategies, a task which can be viewed as a natural generalisation of the concept of universal coding. We describe a graphical language based on Hidden Markov Models for defining prediction strategies, and we provide both existing and new models as examples. The models include efficient, parameterless models for switching between the input strategies over time, including a model for the case where switches tend to occur in clusters, and finally a new model for the scenario where the prediction strategies have a known relationship, and where jumps are typically between strongly related ones. This last model is relevant for coding time series data where parameter drift is expected. As theoretical contributions we introduce an interpolation construction that is useful in the development and analysis of new algorithms, and we establish a new sophisticated lemma for analysing the individual sequence regret of parameterised models.

Topological design and modulation strategy for buck-boost three-level inverters

To date, designed topologies for DC-AC inversion with both voltage-buck and boost capabilities are mainly focused on two-level circuitries with extensions to three-level possibilities left nearly unexplored. Contributing to this area of research, this paper presents the design of a number of viable buck-boost three-level inverters that can also support bidirectional power conversion. The proposed front-end circuitry is developed from the Cuk-derived buck-boost two-level inverter, and by using the "alternative phase opposition disposition" (APOD) modulation scheme, the buck-boost three-level inverters can perform distinct five-level line voltage and three-level phase voltage switching by simply controlling the active switches located in the designed voltage boost section of the circuits. As a cost saving option, one active switch can further be removed from the voltage-boost section of the circuits by simply re-routing the gating commands of the remaining switches without influencing the ac output voltage amplitude. To verify the validity of the proposed inverters, Matlab/PLECS simulations were performed before a laboratory prototype was implemented for experimental testing.

Topological design and modulation strategy for buck-boost three-level inverters

To date, designed topologies for DC-AC inversion with both voltage buck and boost capabilities are mainly focused on two-level circuitries with extensions to three-level possibilities left nearly unexplored. Contributing to this area of research, this paper presents the design of a number of viable buck-boost three-level inverters that can also support bidirectional power conversion. The proposed front-end circuitry is developed from the Cuk-derived buck-boost two-level inverter, and by using the ldquoalternative phase opposition dispositionrdquo modulation scheme, the buck-boost three-level inverters can perform distinct five-level line voltage and three-level phase voltage switching by simply controlling the active switches located in the designed voltage boost section of the circuits. As a cost saving option, one active switch can further be removed from the voltage boost section of the circuits by simply rerouting the gating commands of the remaining switches without influencing the AC output voltage amplitude. To verify the validity of the proposed inverters, MATLAB/PLECS simulations were performed before a laboratory prototype was implemented for experimental testing.

Dual Z-source inverter with three-level reduced common mode switching

This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye- or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulation-wise, the dual inverter can be controlled using a carefully designed carrier-based pulse-width modulation (PWM) scheme that always will ensure balanced voltage boosting of the Z-source network, while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings together with the inverter practicality have been confirmed both in simulations using PSIM with Matlab/Simulink coupler and experimentally using a laboratory implemented inverter prototype.