977 resultados para Scalable Nanofabrication


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Polyaniline (PANI) nanobrushes were synthesized by template-free electrochemical galvanostatic methods. When the same method was applied to the carbon nanohorn (CNH) solution containing aniline monomers, a hybrid nanostructure containing PANI and CNHs was enabled after electropolymerization. This is the first report on the template-free method to make PANI nanobrushes and homogeneous hybrid soft matter (PANI) with carbon nanoparticles. Raman spectroscopy was used to analyze the interaction between CNH and PANI. Electrochemical nanofabrication offers simplicity and good control when used to make electronic devices. Both of these materials were applied in supercapacitors and an improvement capacitive current by using the hybrid material was observed.

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Singular Value Decomposition (SVD) is a key linear algebraic operation in many scientific and engineering applications. In particular, many computational intelligence systems rely on machine learning methods involving high dimensionality datasets that have to be fast processed for real-time adaptability. In this paper we describe a practical FPGA (Field Programmable Gate Array) implementation of a SVD processor for accelerating the solution of large LSE problems. The design approach has been comprehensive, from the algorithmic refinement to the numerical analysis to the customization for an efficient hardware realization. The processing scheme rests on an adaptive vector rotation evaluator for error regularization that enhances convergence speed with no penalty on the solution accuracy. The proposed architecture, which follows a data transfer scheme, is scalable and based on the interconnection of simple rotations units, which allows for a trade-off between occupied area and processing acceleration in the final implementation. This permits the SVD processor to be implemented both on low-cost and highend FPGAs, according to the final application requirements.

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We investigated four unique methods for achieving scalable, deterministic integration of quantum emitters into ultra-high Q{V photonic crystal cavities, including selective area heteroepitaxy, engineered photoemission from silicon nanostructures, wafer bonding and dimensional reduction of III-V quantum wells, and cavity-enhanced optical trapping. In these areas, we were able to demonstrate site-selective heteroepitaxy, size-tunable photoluminescence from silicon nanostructures, Purcell modification of QW emission spectra, and limits of cavity-enhanced optical trapping designs which exceed any reports in the literature and suggest the feasibility of capturing- and detecting nanostructures with dimensions below 10 nm. In addition to process scalability and the requirement for achieving accurate spectral- and spatial overlap between the emitter and cavity, these techniques paid specific attention to the ability to separate the cavity and emitter material systems in order to allow optimal selection of these independently, and eventually enable monolithic integration with other photonic and electronic circuitry.

We also developed an analytic photonic crystal design process yielding optimized cavity tapers with minimal computational effort, and reported on a general cavity modification which exhibits improved fabrication tolerance by relying exclusively on positional- rather than dimensional tapering. We compared several experimental coupling techniques for device characterization. Significant efforts were devoted to optimizing cavity fabrication, including the use of atomic layer deposition to improve surface quality, exploration into factors affecting the design fracturing, and automated analysis of SEM images. Using optimized fabrication procedures, we experimentally demonstrated 1D photonic crystal nanobeam cavities exhibiting the highest Q/V reported on substrate. Finally, we analyzed the bistable behavior of the devices to quantify the nonlinear optical response of our cavities.

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