Shortening of primary dentin etching time and its implication on bond strength

Objective. The aim of this study was to investigate the influence of shortening the etching time on the bond strength of a conventional and a self-etching primer adhesive system used in primary tooth dentin.Methods. Flat dentin surfaces were obtained from 24 primary molars, randomly assigned to 4 experimental groups. The adhesive systems Single Bond and Clearfil SE Bond were applied in two groups according to the manufacturers' recommendations. In the other two groups, the adhesives were applied after half-time of acid etching, 7 s for Single Bond and 10 s for Clearfil SE Primer. Resin crowns were built up and after 24 h storage in water at 37 ° C, the teeth were sectioned to produce beams with cross-sectional area of approximately 0.49 mm(2). Specimens were tested in tension at 0.5 mm/min until failure. Fractured specimens were analyzed to determine the failure mode.Results. Tensile bond strengths for Single Bond in primary dentin were higher than for Clearfil SE Bond. Shortening of acid etching time improved bond strength only for Single Bond, while no statistically significant difference was observed for Clearfil SE Bond when both etching times were compared.Significance. No detrimental effect on bond strength was observed when the time of acid etching was shortened in 50%. Shortening the time for a procedure in a small child without compromising the quality of the work is a very important finding for the practicing pediatric dentist. © 2004 Elsevier Ltd. All rights reserved.

Current status of pulp capping with dentin adhesive systems: a review

Several studies have assessed the morphology and thickness of hybrid layer, the dentin bend strengths as well as sealing ability of dentin adhesive systems. However, few in vivo studies have evaluated the biocompatibility of the adhesive systems following application to deep dentin or directly to the pulp of human teeth. Many studies performed in non-human primate teeth or teeth of rats have reported pulp healing and dentin bridging following pulp capping with bonding agents. In addition, a few clinical and radiographical reports of the success of resin pulp capping have been described in the dental literature.Objectives: the aim of this review was to evaluate the literature on pulp responses following total acid etching and application of adhesive resins on deep cavities or pulp exposures. In addition, the clinical/radiographical evidence for the apparent success of vital pulp therapy and results obtained from animal and human studies were compared and discussed.Significance and conclusions: the self-etching adhesive systems may be useful and safe when applied on dentin, In contrast, persistent inflammatory reactions as well as delay in pulpal healing and failure of dentin bridging were seen in human pulps capped with bonding agents. The results observed in animal teeth cannot be directly extrapolated to human clinical conditions. Consequently, vital pulp therapy using acidic agents and adhesive resins seems to be contraindicated. (C) 2000 Academy of Dental Materials. Published by Elsevier B.V. Ltd. All rights reserved.

Response of human pulps capped with different self-etch adhesive systems

The aim of this study was to evaluate the response of human pulps capped with a calcium hydroxide hard-setting cement or with two-step self-etch adhesive systems. Pulp exposures were performed on the occlusal floor, and the bleeding control was performed with saline solution. The exposed pulp tissue was capped with Clearfil LB 2V (2V) or Clearfil SE Bond (SE) and restored with a composite resin. In control group, the pulpal wound was capped with Ca(OH)(2) cement and restored with Clearfil LB 2V or Clearfil SE Bond + composite resin. After 30 and 90 days, the teeth were extracted, processed for hematoxylin and eosin, and categorized in a histological score system. The pulpal response was worse for groups capped with the self-etch adhesive systems (2V and SE) in both periods of evaluation, when compared to their respective control groups at 90 days (p < 0.05). For both self-etch systems evaluated, the pulp tissue exhibited moderate to severe inflammatory cell infiltrate involving the coronal pulp with chronic abscesses. Dentin bridging was observed in a few specimens. For the calcium hydroxide groups, almost all specimens showed dentin bridge formation, with few scattered inflammatory cells and normal tissue below the pulp exposure site. Calcium hydroxide should be used as the material of choice for pulp capping, and the use of two-step self-etch adhesives for human pulp capping is contraindicated.

Microtensile bond strength of different adhesive systems in dentin irradiated with Er : YAG laser

The objective this study was to evaluate in vitro the bond strength of two etch-and-rise and one self-etching adhesive system after dentin irradiation with Er:YAG (erbium: yttrium aluminum garnet) laser using microtensile test. The results revealed that the groups treated with laser Er:YAG presented less tensile bond strength, independently to the adhesive system used. The prompt L-pop adhesive presented less microtensile bond strength compared to the other adhesives evaluated. There was no difference between single bond and excite groups. The adhesive failures were predominant in all the experimental groups. The Er:YAG laser influenced negatively bond strength values of adhesive systems tested in dental substrate.

INFLUENCE of DIFFERENT SURFACE CONDITIONING PROTOCOLS on MICROTENSILE BOND STRENGTH of SELF-ADHESIVE RESIN CEMENTS TO DENTIN

Statement of problem. According to manufacturers, bonding with self-adhesive resin cements can be achieved without any pretreatment steps such as etching, priming, or bonding. However, the benefit of saving time with these simplified luting systems may be realized at the expense of compromising the bonding capacity.Purpose. The purpose of this study was to assess whether different dentin conditioning protocols influence the bond performance of self-adhesive resin cements to dentin.Material and methods. Flat dentin surfaces from 48 human molars were divided into 4 groups (n=12): 1) control, no conditioning; 2) H(3)PO(4), etching with 37% H(3)PO(4) for 15 seconds; 3) SEBond, bonding with self-etching primer adhesive (Clearfil SE Bond); and 4) EDTA, etching with 0.1M EDTA for 60 seconds. The specimens from each dentin pre-treatment were bonded using the self-adhesive cements RelyX Unicem, Maxcem or Multilink Sprint (n=4). The resin-cement-dentin specimens were stored in water at 37 degrees C for 7 days, and serially sectioned to produce beam specimens of 1.0 mm(2) cross-sectional area. Microtensile bond strength (mu TBS) testing was performed at 1.0 mm/min. Data (MPa) were analyzed by 2-way ANOVA and Tukey multiple comparisons test (alpha=.05). Fractured specimens were examined with a stereomicroscope (x40) and classified as adhesive, mixed, or cohesive. Additional bonded interfaces were evaluated under a scanning electron microscope (SEM).Results. Cement-dentin mu TBS was affected by the dentin conditioning approach (P <.001). RelyX Unicem attained statistically similar bond strengths to all pre-treated dentin surfaces. H(3)PO(4)-etching prior to the application of Maxcem resulted in bond strength values that were significantly higher than the other groups. The lowest mu TBS were attained when luting Multilink Sprint per manufacturers' recommendations, while H(3)PO(4)-etching produced the highest values followed by Clearfil SE bonding and EDTA. SEM observations disclosed an enhanced potential of the self-adhesive cements to form a hybrid layer when applied following manufacturer's instructions.Conclusions. When evaluated self-adhesive resin cements are used, selectively etching dentin with H(3)PO(4) prior to luting results in the most effective bonding. (J Prosthet Dent 2011;105:227-235)

Microleakage of hydrophilic adhesive systems in Class V composite restorations

Purpose: To investigate the microleakage of four hydrophilic adhesive systems: one multiple-bottles (Scotchbond Multi-Purpose Plus); two one-bottle (Single Bond, Stae); and one self-etching (Etch & Prime 3.0). Materials and Methods: 120 bovine incisor teeth were divided into four groups (n = 30) and Class V cavities were prepared at the cemento-enamel junction. The cavities were restored with the adhesive systems and with Z100 composite. The teeth were thermocycled 1,000 times between 5 +/- 2 degreesC and 55 +/- 2 degreesC with a dwell time of 1 min, and then placed in a 2% methylene blue dye (pH 7.0) for 4 hrs, washed and sectioned vertically through the center of the restorations. The qualitative evaluation was made by three examiners who distributed pre-established scores (0-4) for each tooth using a stereomicroscope at x30 magnification. Results: In enamel margins little microleakage was observed and the Kruskal-Wallis analysis did not show differences. In dentin margins the KruskaI-Wallis and multiple comparison analyses were applied: microleakage was significantly greater with Stae (median 3) and Scotchbond MP Plus (median 4). Single Bond (median 1) and Etch & Prime 3.0 (median 2) showed the best results in dentin margins, and the statistical analysis did not demonstrate differences in microleakage among these groups.

The effect of adhesive systems on the pullout strength of a fiberglass-reinforced composite post system in bovine teeth

Purpose: To evaluate the pullout strength of a glass fiber-reinforced composite post (glass FRC) cemented with three different adhesive systems and one resin cement. The null hypothesis was that pullout strengths yielded by the adhesive systems are similar. Materials and Methods: Thirty bovine teeth were selected. The size of the specimens was standardized at 16 mm by sectioning off the coronal portion and part of the root. The specimens were divided into three groups, according to the adhesive system, which were applied following the manufacturers' instructions: G1, ScotchBond Multi-Purpose Plus; G2, Single Bond; G3, Tyrian SPE/One-Step Plus. The glass FRCs (Reforpost) were etched with 37% H3PO4 for 1 min and silanized (Porcelain Primer). Thereafter, they were cemented with the dual resin cement En-Force. The specimens were stored for 24 h, attached to an adapted device, and submitted to the pullout test in a universal testing machine (1 mm/min). The data were submitted to the one-way ANOVA and Tukey's test (α = 0.05). Results: G1 (30.2 ± 5.8 Kgf) displayed the highest pullout strength (p < 0.001) when compared to G2 (18.6 ± 5.8 Kgf) and G3 (14.3 ± 5.8 Kgf), which were statistically similar. Analysis of the specimens revealed that all failures occurred between the adhesive system and the root dentin (pullout of the post cement), regardless of group. Conclusion: The multiple-bottle, total-etch adhesive system provided higher pullout strength of the glass FRC when compared to the single-bottle, total-etch, and single-step self-etching adhesive systems. The null hypothesis was rejected (p < 0.001).

Tensile bond strength: Evaluation of four current adhesive systems in abraded enamel and deep dentin

This study aimed to evaluate the tensile bond strength of adhesive systems in abraded enamel and deep dentin of the occlusal surface of forty human molar teeth. Enamel surfaces as well as the rest of the teeth were coated with epoxy resin and regularized and polished with silicon carbide sandpapers. The 40 teeth were randomized into eight groups of five teeth per group. Four groups were assigned to have deep dentin as the dental substrate and the other four had abraded enamel as the substrate for the adhesives to be tested. The adhesives being tested were the total etching Single Bond: SB, the self-etching Clearfil SE bond: CSEB, self-etching One Up Bond F: OUBF and the self-etching Self-Etch Bond: SEB adhesives. The samples (teeth) were restored with composite resin and subjected to a traction assay. The results were statistically analyzed using the ANOVA and TUKEY tests. The total etching SB adhesive system had the greatest bonding strength of all the adhesives tested, on both dental substrates (20.1 MegaPascals (MPa) on abraded enamel and 19.4 MPa on deep dentin). Of the self-etching dental adhesives tested, CSEB had the greatest bonding strength on both substrates (14.6 MPa on abraded enamel and 15.4 MPa on deep dentin). Both OUBF (11.0 MPa for enamel, 13.1 MPa for dentin) and SEB (10.2 MPa for enamel, 12.6 MPa for dentin) showed comparable bonding strengths without any significant differences for either substrate Thus, the total etching SB adhesive system had better bonding strength than the other self-etching adhesives used, regardless of the dental substrate to which the adhesives had been bonded.

Influence of cutting instruments and adhesive systems on hybrid layer formation.

Influence of cutting instruments and The aim of this study was to analyze the hybrid layer in noncarious dentin prepared by different cutting instruments and restored with composite resin. The cavities were randomly prepared in 40 specimens using a high-speed diamond bur (KG Sorensen 1013) and an ultrasonic tip (CVDentus C22). The cavities were restored with composite resin by varying the adhesive system between the Adper™ Single Bond (2 x 1 system, primer+adhesive) and the Prompt L-Pop™ (3 x 1 system, self-etching). The restorations were hemisected longitudinally and analyzed in the SEM (Scanning electron microscopy) in order to evaluate the hybrid layer and resinous tags characteristics, using scores ranging from 1 to 6. The Pearson test revealed a high correlation coefficient and good significance levels for both intra- and inter-raters values (r=0.90). The data were statistically analyzed using the Mann-Whitney test (P≤0.05). A larger proportion of regular hybrid layers with numerous tags were observed in the dentin prepared using the high-speed diamond burs and restored with a 2 × 1 adhesive system. Alternatively, the 3 × 1 adhesive system promoted the generation of a thin hybrid layer with few tags. After preparation using an ultrasonic tip revealed few or no tags after the preparation and 2 × 1 or 3 × 1 adhesive system application. The high-speed diamond burs produced a dentin surface that was more favorable to restorative material adhesion than the ultrasonic tips, regardless of the adhesive system used.

Transdentinal cytotoxicity of experimental adhesive systems of different hydrophilicity applied to ethanol-saturated dentin

The aim of this study was to evaluate the transdentinal cytotoxicity of experimental adhesive systems (EASs) with different hydrophilicity and dentin saturation solutions on odontoblast-like cells. One hundred 0.4-mm-thick dentin discs were mounted in in vitro pulp chambers and assigned to 10 groups. MDPC-23 cells were seeded onto the pulpal side of the discs, incubated for 48 h. The EASs with increasing hydrophilicity (R1, R2, R3 and R4) were applied to the occlusal side after etching and saturation of etched dentin with water or ethanol. R0 (no adhesive) served as controls. R1 is a non-solvated hydrophobic blend, R2 is similar to a simplified etch-and-rinse adhesive system and R3 and R4 are similar to self-etching adhesives. After 24 h, cell metabolism was evaluated by MTT assay (n = 8 discs) and cell morphology was examined by SEM (n = 2 discs). Type of cell death was identified by flow cytometry and the degree of monomer conversion (%DC) was determined by infrared spectroscopy (FTIR) after 10 s or 20 s of photoactivation. Data were analyzed by the Kruskal-Wallis and Mann-Whitney tests (α = 0.05). Dentin saturation with ethanol resulted in higher necrotic cell death ratios for R2, R3 and R4 compared with water saturation, although R2 and R3 induced higher SDH production. Photoactivation for 20 s significantly improved the %DC of all EASs compared with 10 s. A significant positive correlation was observed between the degree of hydrophilicity and %DC. In conclusion, except for R1, dentin saturation with ethanol increased the cytotoxicity of EASs, as expressed by the induction of necrotic cell death. © 2013 Academy of Dental Materials. Published by Elsevier Ltd. All rights reserved.

Bond strength of composite to dentin: effect of acid etching and laser irradiation through an uncured self-etch adhesive system

This study evaluated the effect on micro-tensile bond strength (mu-TBS) of laser irradiation of etched/unetched dentin through an uncured self-etching adhesive. Dentinal surfaces were treated with Clearfil SE Bond Adhesive (CSE) either according to the manufacturer's instructions (CSE) or without applying the primer (CSE/NP). The dentin was irradiated through the uncured adhesive, using an Nd: YAG laser at 0.75 or 1 W power settings. The adhesive was cured, composite crowns were built up, and the teeth were sectioned into beams (0.49 mm(2)) to be stressed under tension. Data were analyzed using one-way ANOVA and Tukey statistics (alpha = 5%). Dentin of the fractured specimens and the interfaces of untested beams were observed under scanning electron microscopy (SEM). The results showed that non-etched irradiated surfaces presented higher mu-TBS than etched and irradiated surfaces (p < 0.05). Laser irradiation alone did not lead to differences in mu-TBS (p > 0.05). SEM showed solidification globules on the surfaces of the specimens. The interfaces were similar on irradiated and non-irradiated surfaces. Laser irradiation of dentin through the uncured adhesive did not lead to higher mu-TBS when compared to the suggested manufacturer's technique. However, this treatment brought benefits when performed on unetched dentin, since bond strengths were higher when compared to etched dentin.

Bonding of simplified adhesive systems to caries-affected dentin of primary teeth.

PURPOSE To evaluate the bonding of simplified adhesive systems to sound and caries-affected dentin of primary teeth with microtensile (µTBS) and nanoleakage (NL) tests. MATERIALS AND METHODS Occlusal cavities were prepared in 36 sound second primary molars. Half of the specimens were submitted to pH cycling to simulate caries-affected dentin. Teeth were randomly restored with one of three materials: the etch-and-rinse adhesive system Adper Single Bond 2 (SB), the two-step self-etching adhesive system Adper SE Plus (SE), and the one-step self-etching adhesive system Adper Easy One (EASY). After storage for 24 h, specimens with cross-sectional areas of 0.8 mm2 were prepared for microtensile testing (1 mm/min). One stick from each tooth was immersed in silver nitrate solution (24 h) and allowed to develop for 8 h in order to score the nano leakage with SEM. The fracture pattern was evaluated using a stereomicroscope (400X). The µTBS means were analyzed by two-way ANOVA and Tukey's post-hoc test. For NL, the Kruskal- Wallis and Mann-Whitney tests were used (α < 0.05). RESULTS SB (35.5 ± 3.5) showed the highest µTBS value to sound dentin, followed by EASY (26.3 ± 1.9) and SE (18.2 ± 6.5) (p < 0.05). No difference among materials was observed for caries-affected dentin (SB: 17.8 ± 4.2; SE: 13.9 ± 3.2; EASY: 14.4 ± 4.2, p > 0.05). For all groups, adhesive/mixed fracture prevailed. Caries affected dentin promoted silver nitrate uptake into the adhesive interface; however, with SE, the nano leakage was more pronounced than in the other adhesive systems, even in sound dentin. CONCLUSION Caries-affected dentin negatively influences the bond strength and nano leakage of the two-step etch-and-rinse and one-step self-etching adhesive systems tested in primary teeth.

Parametric and structural self-adaptation of embedded systems using evolvable hardware

Los sistemas empotrados han sido concebidos tradicionalmente como sistemas de procesamiento específicos que realizan una tarea fija durante toda su vida útil. Para cumplir con requisitos estrictos de coste, tamaño y peso, el equipo de diseño debe optimizar su funcionamiento para condiciones muy específicas. Sin embargo, la demanda de mayor versatilidad, un funcionamiento más inteligente y, en definitiva, una mayor capacidad de procesamiento comenzaron a chocar con estas limitaciones, agravado por la incertidumbre asociada a entornos de operación cada vez más dinámicos donde comenzaban a ser desplegados progresivamente. Esto trajo como resultado una necesidad creciente de que los sistemas pudieran responder por si solos a eventos inesperados en tiempo diseño tales como: cambios en las características de los datos de entrada y el entorno del sistema en general; cambios en la propia plataforma de cómputo, por ejemplo debido a fallos o defectos de fabricación; y cambios en las propias especificaciones funcionales causados por unos objetivos del sistema dinámicos y cambiantes. Como consecuencia, la complejidad del sistema aumenta, pero a cambio se habilita progresivamente una capacidad de adaptación autónoma sin intervención humana a lo largo de la vida útil, permitiendo que tomen sus propias decisiones en tiempo de ejecución. Éstos sistemas se conocen, en general, como sistemas auto-adaptativos y tienen, entre otras características, las de auto-configuración, auto-optimización y auto-reparación. Típicamente, la parte soft de un sistema es mayoritariamente la única utilizada para proporcionar algunas capacidades de adaptación a un sistema. Sin embargo, la proporción rendimiento/potencia en dispositivos software como microprocesadores en muchas ocasiones no es adecuada para sistemas empotrados. En este escenario, el aumento resultante en la complejidad de las aplicaciones está siendo abordado parcialmente mediante un aumento en la complejidad de los dispositivos en forma de multi/many-cores; pero desafortunadamente, esto hace que el consumo de potencia también aumente. Además, la mejora en metodologías de diseño no ha sido acorde como para poder utilizar toda la capacidad de cómputo disponible proporcionada por los núcleos. Por todo ello, no se están satisfaciendo adecuadamente las demandas de cómputo que imponen las nuevas aplicaciones. La solución tradicional para mejorar la proporción rendimiento/potencia ha sido el cambio a unas especificaciones hardware, principalmente usando ASICs. Sin embargo, los costes de un ASIC son altamente prohibitivos excepto en algunos casos de producción en masa y además la naturaleza estática de su estructura complica la solución a las necesidades de adaptación. Los avances en tecnologías de fabricación han hecho que la FPGA, una vez lenta y pequeña, usada como glue logic en sistemas mayores, haya crecido hasta convertirse en un dispositivo de cómputo reconfigurable de gran potencia, con una cantidad enorme de recursos lógicos computacionales y cores hardware empotrados de procesamiento de señal y de propósito general. Sus capacidades de reconfiguración han permitido combinar la flexibilidad propia del software con el rendimiento del procesamiento en hardware, lo que tiene la potencialidad de provocar un cambio de paradigma en arquitectura de computadores, pues el hardware no puede ya ser considerado más como estático. El motivo es que como en el caso de las FPGAs basadas en tecnología SRAM, la reconfiguración parcial dinámica (DPR, Dynamic Partial Reconfiguration) es posible. Esto significa que se puede modificar (reconfigurar) un subconjunto de los recursos computacionales en tiempo de ejecución mientras el resto permanecen activos. Además, este proceso de reconfiguración puede ser ejecutado internamente por el propio dispositivo. El avance tecnológico en dispositivos hardware reconfigurables se encuentra recogido bajo el campo conocido como Computación Reconfigurable (RC, Reconfigurable Computing). Uno de los campos de aplicación más exóticos y menos convencionales que ha posibilitado la computación reconfigurable es el conocido como Hardware Evolutivo (EHW, Evolvable Hardware), en el cual se encuentra enmarcada esta tesis. La idea principal del concepto consiste en convertir hardware que es adaptable a través de reconfiguración en una entidad evolutiva sujeta a las fuerzas de un proceso evolutivo inspirado en el de las especies biológicas naturales, que guía la dirección del cambio. Es una aplicación más del campo de la Computación Evolutiva (EC, Evolutionary Computation), que comprende una serie de algoritmos de optimización global conocidos como Algoritmos Evolutivos (EA, Evolutionary Algorithms), y que son considerados como algoritmos universales de resolución de problemas. En analogía al proceso biológico de la evolución, en el hardware evolutivo el sujeto de la evolución es una población de circuitos que intenta adaptarse a su entorno mediante una adecuación progresiva generación tras generación. Los individuos pasan a ser configuraciones de circuitos en forma de bitstreams caracterizados por descripciones de circuitos reconfigurables. Seleccionando aquellos que se comportan mejor, es decir, que tienen una mejor adecuación (o fitness) después de ser evaluados, y usándolos como padres de la siguiente generación, el algoritmo evolutivo crea una nueva población hija usando operadores genéticos como la mutación y la recombinación. Según se van sucediendo generaciones, se espera que la población en conjunto se aproxime a la solución óptima al problema de encontrar una configuración del circuito adecuada que satisfaga las especificaciones. El estado de la tecnología de reconfiguración después de que la familia de FPGAs XC6200 de Xilinx fuera retirada y reemplazada por las familias Virtex a finales de los 90, supuso un gran obstáculo para el avance en hardware evolutivo; formatos de bitstream cerrados (no conocidos públicamente); dependencia de herramientas del fabricante con soporte limitado de DPR; una velocidad de reconfiguración lenta; y el hecho de que modificaciones aleatorias del bitstream pudieran resultar peligrosas para la integridad del dispositivo, son algunas de estas razones. Sin embargo, una propuesta a principios de los años 2000 permitió mantener la investigación en el campo mientras la tecnología de DPR continuaba madurando, el Circuito Virtual Reconfigurable (VRC, Virtual Reconfigurable Circuit). En esencia, un VRC en una FPGA es una capa virtual que actúa como un circuito reconfigurable de aplicación específica sobre la estructura nativa de la FPGA que reduce la complejidad del proceso reconfiguración y aumenta su velocidad (comparada con la reconfiguración nativa). Es un array de nodos computacionales especificados usando descripciones HDL estándar que define recursos reconfigurables ad-hoc: multiplexores de rutado y un conjunto de elementos de procesamiento configurables, cada uno de los cuales tiene implementadas todas las funciones requeridas, que pueden seleccionarse a través de multiplexores tal y como ocurre en una ALU de un microprocesador. Un registro grande actúa como memoria de configuración, por lo que la reconfiguración del VRC es muy rápida ya que tan sólo implica la escritura de este registro, el cual controla las señales de selección del conjunto de multiplexores. Sin embargo, esta capa virtual provoca: un incremento de área debido a la implementación simultánea de cada función en cada nodo del array más los multiplexores y un aumento del retardo debido a los multiplexores, reduciendo la frecuencia de funcionamiento máxima. La naturaleza del hardware evolutivo, capaz de optimizar su propio comportamiento computacional, le convierten en un buen candidato para avanzar en la investigación sobre sistemas auto-adaptativos. Combinar un sustrato de cómputo auto-reconfigurable capaz de ser modificado dinámicamente en tiempo de ejecución con un algoritmo empotrado que proporcione una dirección de cambio, puede ayudar a satisfacer los requisitos de adaptación autónoma de sistemas empotrados basados en FPGA. La propuesta principal de esta tesis está por tanto dirigida a contribuir a la auto-adaptación del hardware de procesamiento de sistemas empotrados basados en FPGA mediante hardware evolutivo. Esto se ha abordado considerando que el comportamiento computacional de un sistema puede ser modificado cambiando cualquiera de sus dos partes constitutivas: una estructura hard subyacente y un conjunto de parámetros soft. De esta distinción, se derivan dos lineas de trabajo. Por un lado, auto-adaptación paramétrica, y por otro auto-adaptación estructural. El objetivo perseguido en el caso de la auto-adaptación paramétrica es la implementación de técnicas de optimización evolutiva complejas en sistemas empotrados con recursos limitados para la adaptación paramétrica online de circuitos de procesamiento de señal. La aplicación seleccionada como prueba de concepto es la optimización para tipos muy específicos de imágenes de los coeficientes de los filtros de transformadas wavelet discretas (DWT, DiscreteWavelet Transform), orientada a la compresión de imágenes. Por tanto, el objetivo requerido de la evolución es una compresión adaptativa y más eficiente comparada con los procedimientos estándar. El principal reto radica en reducir la necesidad de recursos de supercomputación para el proceso de optimización propuesto en trabajos previos, de modo que se adecúe para la ejecución en sistemas empotrados. En cuanto a la auto-adaptación estructural, el objetivo de la tesis es la implementación de circuitos auto-adaptativos en sistemas evolutivos basados en FPGA mediante un uso eficiente de sus capacidades de reconfiguración nativas. En este caso, la prueba de concepto es la evolución de tareas de procesamiento de imagen tales como el filtrado de tipos desconocidos y cambiantes de ruido y la detección de bordes en la imagen. En general, el objetivo es la evolución en tiempo de ejecución de tareas de procesamiento de imagen desconocidas en tiempo de diseño (dentro de un cierto grado de complejidad). En este caso, el objetivo de la propuesta es la incorporación de DPR en EHW para evolucionar la arquitectura de un array sistólico adaptable mediante reconfiguración cuya capacidad de evolución no había sido estudiada previamente. Para conseguir los dos objetivos mencionados, esta tesis propone originalmente una plataforma evolutiva que integra un motor de adaptación (AE, Adaptation Engine), un motor de reconfiguración (RE, Reconfiguration Engine) y un motor computacional (CE, Computing Engine) adaptable. El el caso de adaptación paramétrica, la plataforma propuesta está caracterizada por: • un CE caracterizado por un núcleo de procesamiento hardware de DWT adaptable mediante registros reconfigurables que contienen los coeficientes de los filtros wavelet • un algoritmo evolutivo como AE que busca filtros wavelet candidatos a través de un proceso de optimización paramétrica desarrollado específicamente para sistemas caracterizados por recursos de procesamiento limitados • un nuevo operador de mutación simplificado para el algoritmo evolutivo utilizado, que junto con un mecanismo de evaluación rápida de filtros wavelet candidatos derivado de la literatura actual, asegura la viabilidad de la búsqueda evolutiva asociada a la adaptación de wavelets. En el caso de adaptación estructural, la plataforma propuesta toma la forma de: • un CE basado en una plantilla de array sistólico reconfigurable de 2 dimensiones compuesto de nodos de procesamiento reconfigurables • un algoritmo evolutivo como AE que busca configuraciones candidatas del array usando un conjunto de funcionalidades de procesamiento para los nodos disponible en una biblioteca accesible en tiempo de ejecución • un RE hardware que explota la capacidad de reconfiguración nativa de las FPGAs haciendo un uso eficiente de los recursos reconfigurables del dispositivo para cambiar el comportamiento del CE en tiempo de ejecución • una biblioteca de elementos de procesamiento reconfigurables caracterizada por bitstreams parciales independientes de la posición, usados como el conjunto de configuraciones disponibles para los nodos de procesamiento del array Las contribuciones principales de esta tesis se pueden resumir en la siguiente lista: • Una plataforma evolutiva basada en FPGA para la auto-adaptación paramétrica y estructural de sistemas empotrados compuesta por un motor computacional (CE), un motor de adaptación (AE) evolutivo y un motor de reconfiguración (RE). Esta plataforma se ha desarrollado y particularizado para los casos de auto-adaptación paramétrica y estructural. • En cuanto a la auto-adaptación paramétrica, las contribuciones principales son: – Un motor computacional adaptable mediante registros que permite la adaptación paramétrica de los coeficientes de una implementación hardware adaptativa de un núcleo de DWT. – Un motor de adaptación basado en un algoritmo evolutivo desarrollado específicamente para optimización numérica, aplicada a los coeficientes de filtros wavelet en sistemas empotrados con recursos limitados. – Un núcleo IP de DWT auto-adaptativo en tiempo de ejecución para sistemas empotrados que permite la optimización online del rendimiento de la transformada para compresión de imágenes en entornos específicos de despliegue, caracterizados por tipos diferentes de señal de entrada. – Un modelo software y una implementación hardware de una herramienta para la construcción evolutiva automática de transformadas wavelet específicas. • Por último, en cuanto a la auto-adaptación estructural, las contribuciones principales son: – Un motor computacional adaptable mediante reconfiguración nativa de FPGAs caracterizado por una plantilla de array sistólico en dos dimensiones de nodos de procesamiento reconfigurables. Es posible mapear diferentes tareas de cómputo en el array usando una biblioteca de elementos sencillos de procesamiento reconfigurables. – Definición de una biblioteca de elementos de procesamiento apropiada para la síntesis autónoma en tiempo de ejecución de diferentes tareas de procesamiento de imagen. – Incorporación eficiente de la reconfiguración parcial dinámica (DPR) en sistemas de hardware evolutivo, superando los principales inconvenientes de propuestas previas como los circuitos reconfigurables virtuales (VRCs). En este trabajo también se comparan originalmente los detalles de implementación de ambas propuestas. – Una plataforma tolerante a fallos, auto-curativa, que permite la recuperación funcional online en entornos peligrosos. La plataforma ha sido caracterizada desde una perspectiva de tolerancia a fallos: se proponen modelos de fallo a nivel de CLB y de elemento de procesamiento, y usando el motor de reconfiguración, se hace un análisis sistemático de fallos para un fallo en cada elemento de procesamiento y para dos fallos acumulados. – Una plataforma con calidad de filtrado dinámica que permite la adaptación online a tipos de ruido diferentes y diferentes comportamientos computacionales teniendo en cuenta los recursos de procesamiento disponibles. Por un lado, se evolucionan filtros con comportamientos no destructivos, que permiten esquemas de filtrado en cascada escalables; y por otro, también se evolucionan filtros escalables teniendo en cuenta requisitos computacionales de filtrado cambiantes dinámicamente. Este documento está organizado en cuatro partes y nueve capítulos. La primera parte contiene el capítulo 1, una introducción y motivación sobre este trabajo de tesis. A continuación, el marco de referencia en el que se enmarca esta tesis se analiza en la segunda parte: el capítulo 2 contiene una introducción a los conceptos de auto-adaptación y computación autonómica (autonomic computing) como un campo de investigación más general que el muy específico de este trabajo; el capítulo 3 introduce la computación evolutiva como la técnica para dirigir la adaptación; el capítulo 4 analiza las plataformas de computación reconfigurables como la tecnología para albergar hardware auto-adaptativo; y finalmente, el capítulo 5 define, clasifica y hace un sondeo del campo del hardware evolutivo. Seguidamente, la tercera parte de este trabajo contiene la propuesta, desarrollo y resultados obtenidos: mientras que el capítulo 6 contiene una declaración de los objetivos de la tesis y la descripción de la propuesta en su conjunto, los capítulos 7 y 8 abordan la auto-adaptación paramétrica y estructural, respectivamente. Finalmente, el capítulo 9 de la parte 4 concluye el trabajo y describe caminos de investigación futuros. ABSTRACT Embedded systems have traditionally been conceived to be specific-purpose computers with one, fixed computational task for their whole lifetime. Stringent requirements in terms of cost, size and weight forced designers to highly optimise their operation for very specific conditions. However, demands for versatility, more intelligent behaviour and, in summary, an increased computing capability began to clash with these limitations, intensified by the uncertainty associated to the more dynamic operating environments where they were progressively being deployed. This brought as a result an increasing need for systems to respond by themselves to unexpected events at design time, such as: changes in input data characteristics and system environment in general; changes in the computing platform itself, e.g., due to faults and fabrication defects; and changes in functional specifications caused by dynamically changing system objectives. As a consequence, systems complexity is increasing, but in turn, autonomous lifetime adaptation without human intervention is being progressively enabled, allowing them to take their own decisions at run-time. This type of systems is known, in general, as selfadaptive, and are able, among others, of self-configuration, self-optimisation and self-repair. Traditionally, the soft part of a system has mostly been so far the only place to provide systems with some degree of adaptation capabilities. However, the performance to power ratios of software driven devices like microprocessors are not adequate for embedded systems in many situations. In this scenario, the resulting rise in applications complexity is being partly addressed by rising devices complexity in the form of multi and many core devices; but sadly, this keeps on increasing power consumption. Besides, design methodologies have not been improved accordingly to completely leverage the available computational power from all these cores. Altogether, these factors make that the computing demands new applications pose are not being wholly satisfied. The traditional solution to improve performance to power ratios has been the switch to hardware driven specifications, mainly using ASICs. However, their costs are highly prohibitive except for some mass production cases and besidesthe static nature of its structure complicates the solution to the adaptation needs. The advancements in fabrication technologies have made that the once slow, small FPGA used as glue logic in bigger systems, had grown to be a very powerful, reconfigurable computing device with a vast amount of computational logic resources and embedded, hardened signal and general purpose processing cores. Its reconfiguration capabilities have enabled software-like flexibility to be combined with hardware-like computing performance, which has the potential to cause a paradigm shift in computer architecture since hardware cannot be considered as static anymore. This is so, since, as is the case with SRAMbased FPGAs, Dynamic Partial Reconfiguration (DPR) is possible. This means that subsets of the FPGA computational resources can now be changed (reconfigured) at run-time while the rest remains active. Besides, this reconfiguration process can be triggered internally by the device itself. This technological boost in reconfigurable hardware devices is actually covered under the field known as Reconfigurable Computing. One of the most exotic fields of application that Reconfigurable Computing has enabled is the known as Evolvable Hardware (EHW), in which this dissertation is framed. The main idea behind the concept is turning hardware that is adaptable through reconfiguration into an evolvable entity subject to the forces of an evolutionary process, inspired by that of natural, biological species, that guides the direction of change. It is yet another application of the field of Evolutionary Computation (EC), which comprises a set of global optimisation algorithms known as Evolutionary Algorithms (EAs), considered as universal problem solvers. In analogy to the biological process of evolution, in EHW the subject of evolution is a population of circuits that tries to get adapted to its surrounding environment by progressively getting better fitted to it generation after generation. Individuals become circuit configurations representing bitstreams that feature reconfigurable circuit descriptions. By selecting those that behave better, i.e., with a higher fitness value after being evaluated, and using them as parents of the following generation, the EA creates a new offspring population by using so called genetic operators like mutation and recombination. As generations succeed one another, the whole population is expected to approach to the optimum solution to the problem of finding an adequate circuit configuration that fulfils system objectives. The state of reconfiguration technology after Xilinx XC6200 FPGA family was discontinued and replaced by Virtex families in the late 90s, was a major obstacle for advancements in EHW; closed (non publicly known) bitstream formats; dependence on manufacturer tools with highly limiting support of DPR; slow speed of reconfiguration; and random bitstream modifications being potentially hazardous for device integrity, are some of these reasons. However, a proposal in the first 2000s allowed to keep investigating in this field while DPR technology kept maturing, the Virtual Reconfigurable Circuit (VRC). In essence, a VRC in an FPGA is a virtual layer acting as an application specific reconfigurable circuit on top of an FPGA fabric that reduces the complexity of the reconfiguration process and increases its speed (compared to native reconfiguration). It is an array of computational nodes specified using standard HDL descriptions that define ad-hoc reconfigurable resources; routing multiplexers and a set of configurable processing elements, each one containing all the required functions, which are selectable through functionality multiplexers as in microprocessor ALUs. A large register acts as configuration memory, so VRC reconfiguration is very fast given it only involves writing this register, which drives the selection signals of the set of multiplexers. However, large overheads are introduced by this virtual layer; an area overhead due to the simultaneous implementation of every function in every node of the array plus the multiplexers, and a delay overhead due to the multiplexers, which also reduces maximum frequency of operation. The very nature of Evolvable Hardware, able to optimise its own computational behaviour, makes it a good candidate to advance research in self-adaptive systems. Combining a selfreconfigurable computing substrate able to be dynamically changed at run-time with an embedded algorithm that provides a direction for change, can help fulfilling requirements for autonomous lifetime adaptation of FPGA-based embedded systems. The main proposal of this thesis is hence directed to contribute to autonomous self-adaptation of the underlying computational hardware of FPGA-based embedded systems by means of Evolvable Hardware. This is tackled by considering that the computational behaviour of a system can be modified by changing any of its two constituent parts: an underlying hard structure and a set of soft parameters. Two main lines of work derive from this distinction. On one side, parametric self-adaptation and, on the other side, structural self-adaptation. The goal pursued in the case of parametric self-adaptation is the implementation of complex evolutionary optimisation techniques in resource constrained embedded systems for online parameter adaptation of signal processing circuits. The application selected as proof of concept is the optimisation of Discrete Wavelet Transforms (DWT) filters coefficients for very specific types of images, oriented to image compression. Hence, adaptive and improved compression efficiency, as compared to standard techniques, is the required goal of evolution. The main quest lies in reducing the supercomputing resources reported in previous works for the optimisation process in order to make it suitable for embedded systems. Regarding structural self-adaptation, the thesis goal is the implementation of self-adaptive circuits in FPGA-based evolvable systems through an efficient use of native reconfiguration capabilities. In this case, evolution of image processing tasks such as filtering of unknown and changing types of noise and edge detection are the selected proofs of concept. In general, evolving unknown image processing behaviours (within a certain complexity range) at design time is the required goal. In this case, the mission of the proposal is the incorporation of DPR in EHW to evolve a systolic array architecture adaptable through reconfiguration whose evolvability had not been previously checked. In order to achieve the two stated goals, this thesis originally proposes an evolvable platform that integrates an Adaptation Engine (AE), a Reconfiguration Engine (RE) and an adaptable Computing Engine (CE). In the case of parametric adaptation, the proposed platform is characterised by: • a CE featuring a DWT hardware processing core adaptable through reconfigurable registers that holds wavelet filters coefficients • an evolutionary algorithm as AE that searches for candidate wavelet filters through a parametric optimisation process specifically developed for systems featured by scarce computing resources • a new, simplified mutation operator for the selected EA, that together with a fast evaluation mechanism of candidate wavelet filters derived from existing literature, assures the feasibility of the evolutionary search involved in wavelets adaptation In the case of structural adaptation, the platform proposal takes the form of: • a CE based on a reconfigurable 2D systolic array template composed of reconfigurable processing nodes • an evolutionary algorithm as AE that searches for candidate configurations of the array using a set of computational functionalities for the nodes available in a run time accessible library • a hardware RE that exploits native DPR capabilities of FPGAs and makes an efficient use of the available reconfigurable resources of the device to change the behaviour of the CE at run time • a library of reconfigurable processing elements featured by position-independent partial bitstreams used as the set of available configurations for the processing nodes of the array Main contributions of this thesis can be summarised in the following list. • An FPGA-based evolvable platform for parametric and structural self-adaptation of embedded systems composed of a Computing Engine, an evolutionary Adaptation Engine and a Reconfiguration Engine. This platform is further developed and tailored for both parametric and structural self-adaptation. • Regarding parametric self-adaptation, main contributions are: – A CE adaptable through reconfigurable registers that enables parametric adaptation of the coefficients of an adaptive hardware implementation of a DWT core. – An AE based on an Evolutionary Algorithm specifically developed for numerical optimisation applied to wavelet filter coefficients in resource constrained embedded systems. – A run-time self-adaptive DWT IP core for embedded systems that allows for online optimisation of transform performance for image compression for specific deployment environments characterised by different types of input signals. – A software model and hardware implementation of a tool for the automatic, evolutionary construction of custom wavelet transforms. • Lastly, regarding structural self-adaptation, main contributions are: – A CE adaptable through native FPGA fabric reconfiguration featured by a two dimensional systolic array template of reconfigurable processing nodes. Different processing behaviours can be automatically mapped in the array by using a library of simple reconfigurable processing elements. – Definition of a library of such processing elements suited for autonomous runtime synthesis of different image processing tasks. – Efficient incorporation of DPR in EHW systems, overcoming main drawbacks from the previous approach of virtual reconfigurable circuits. Implementation details for both approaches are also originally compared in this work. – A fault tolerant, self-healing platform that enables online functional recovery in hazardous environments. The platform has been characterised from a fault tolerance perspective: fault models at FPGA CLB level and processing elements level are proposed, and using the RE, a systematic fault analysis for one fault in every processing element and for two accumulated faults is done. – A dynamic filtering quality platform that permits on-line adaptation to different types of noise and different computing behaviours considering the available computing resources. On one side, non-destructive filters are evolved, enabling scalable cascaded filtering schemes; and on the other, size-scalable filters are also evolved considering dynamically changing computational filtering requirements. This dissertation is organized in four parts and nine chapters. First part contains chapter 1, the introduction to and motivation of this PhD work. Following, the reference framework in which this dissertation is framed is analysed in the second part: chapter 2 features an introduction to the notions of self-adaptation and autonomic computing as a more general research field to the very specific one of this work; chapter 3 introduces evolutionary computation as the technique to drive adaptation; chapter 4 analyses platforms for reconfigurable computing as the technology to hold self-adaptive hardware; and finally chapter 5 defines, classifies and surveys the field of Evolvable Hardware. Third part of the work follows, which contains the proposal, development and results obtained: while chapter 6 contains an statement of the thesis goals and the description of the proposal as a whole, chapters 7 and 8 address parametric and structural self-adaptation, respectively. Finally, chapter 9 in part 4 concludes the work and describes future research paths.

Self-explanation in adaptive systems

The behaviour of self adaptive systems can be emergent. The difficulty in predicting the system's behaviour means that there is scope for the system to surprise its customers and its developers. Because its behaviour is emergent, a self-adaptive system needs to garner confidence in its customers and it needs to resolve any surprise on the part of the developer during testing and mainteinance. We believe that these two functions can only be achieved if a self-adaptive system is also capable of self-explanation. We argue a self-adaptive system's behaviour needs to be explained in terms of satisfaction of its requirements. Since self-adaptive system requirements may themselves be emergent, a means needs to be found to explain the current behaviour of the system and the reasons that brought that behaviour about. We propose the use of goal-based models during runtime to offer self-explanation of how a system is meeting its requirements, and why the means of meeting these were chosen. We discuss the results of early experiments in self-explanation, and set out future work. © 2012 C.E.S.A.M.E.S.

Architecting self-aware software systems

Contemporary software systems are becoming increasingly large, heterogeneous, and decentralised. They operate in dynamic environments and their architectures exhibit complex trade-offs across dimensions of goals, time, and interaction, which emerges internally from the systems and externally from their environment. This gives rise to the vision of self-aware architecture, where design decisions and execution strategies for these concerns are dynamically analysed and seamlessly managed at run-time. Drawing on the concept of self-awareness from psychology, this paper extends the foundation of software architecture styles for self-adaptive systems to arrive at a new principled approach for architecting self-aware systems. We demonstrate the added value and applicability of the approach in the context of service provisioning to cloud-reliant service-based applications.