Methods of Design and Testing of Real Time Systems

Teollusuussovelluksissa vaaditaan nykyisin yhä useammin reaaliaikaista tiedon käsittelyä. Luotettavuus on yksi tärkeimmistä reaaliaikaiseen tiedonkäsittelyyn kykenevän järjestelmän ominaisuuksista. Sen saavuttamiseksi on sekä laitteisto, että ohjelmisto testattava. Tämän työn päätavoitteena on laitteiston testaaminen ja laitteiston testattavuus, koska luotettava laitteistoalusta on perusta tulevaisuuden reaaliaikajärjestelmille. Diplomityössä esitetään digitaaliseen signaalinkäsittelyyn soveltuvan prosessorikortin suunnittelu. Prosessorikortti on tarkoitettu sähkökoneiden ennakoivaa kunnonvalvontaa varten. Uusimmat DFT (Desing for Testability) menetelmät esitellään ja niitä sovelletaan prosessorikortin sunnittelussa yhdessä vanhempien menetelmien kanssa. Kokemukset ja huomiot menetelmien soveltuvuudesta raportoidaan työn lopussa. Työn tavoitteena on kehittää osakomponentti web -pohjaiseen valvontajärjestelmään, jota on kehitetty Sähkötekniikan osastolla Lappeenrannan teknillisellä korkeakoululla.

Data Security in Fault Tolerant Hard Real Time Systems- Use of Time Dependant Multiple Random Cipher Code

The present research problem is to study the existing encryption methods and to develop a new technique which is performance wise superior to other existing techniques and at the same time can be very well incorporated in the communication channels of Fault Tolerant Hard Real time systems along with existing Error Checking / Error Correcting codes, so that the intention of eaves dropping can be defeated. There are many encryption methods available now. Each method has got it's own merits and demerits. Similarly, many crypt analysis techniques which adversaries use are also available.

Incremental Verification of Timing Constraints for Real-Time Systems

Testing constraints for real-time systems are usually verified through the satisfiability of propositional formulae. In this paper, we propose an alternative where the verification of timing constraints can be done by counting the number of truth assignments instead of boolean satisfiability. This number can also tell us how “far away” is a given specification from satisfying its safety assertion. Furthermore, specifications and safety assertions are often modified in an incremental fashion, where problematic bugs are fixed one at a time. To support this development, we propose an incremental algorithm for counting satisfiability. Our proposed incremental algorithm is optimal as no unnecessary nodes are created during each counting. This works for the class of path RTL. To illustrate this application, we show how incremental satisfiability counting can be applied to a well-known rail-road crossing example, particularly when its specification is still being refined.

Modeling of hybrid systems by piecewise decomposition

Piecewise linear models systems arise as mathematical models of systems in many practical applications, often from linearization for nonlinear systems. There are two main approaches of dealing with these systems according to their continuous or discrete-time aspects. We propose an approach which is based on the state transformation, more particularly the partition of the phase portrait in different regions where each subregion is modeled as a two-dimensional linear time invariant system. Then the Takagi-Sugeno model, which is a combination of local model is calculated. The simulation results show that the Alpha partition is well-suited for dealing with such a system

Discrete Dynamical Systems

Exercises and solutions for a third or fourth year maths course. Diagrams for the questions are all together in the support.zip file, as .eps files

Relationship between deadbeat and pole-placement discrete-time PID controllers

This paper considers PID control in terms of its implementation by means of an ARMA plant model. Two controller actions are considered, namely pole placement and deadbeat, both being applied via a PID structure for the adaptive real-time control of an industrial level system. As well as looking at two controller types separately, a comparison is made between the forms and it is shown how, under certain circumstances, the two forms can be seen to be identical. It is shown how the pole-placement PID form does not in fact realise an action which is equivalent to the deadbeat controller, when all closed-loop poles are chosen to be at the origin of the z-plane.

A critique of neural networks for discrete-time linear control

This paper discusses the use of multi-layer perceptron networks for linear or linearizable, adaptive feedback.control schemes in a discrete-time environment. A close look is taken at the model structure selected and the extent of the resulting parametrization. A comparison is made with standard, non-perceptron algorithms, e.g. self-tuning control, and it is shown how gross over-parametrization can occur in the neural network case. Because of the resultant heavy computational burden and poor controller convergence, a strong case is made against the use of neural networks for discrete-time linear control.

Mismatch effects on discrete-time poles

The presence of mismatch between controller and system is considered. A novel discrete-time approach is used to investigate the migration of closed-loop poles when this mismatch occurs. Two forms of state estimator are employed giving rise to several interesting features regarding stability and performance.

Continuous-time and discrete-time sliding mode control accomplished using a computer

A computer-based sliding mode control (SMC) is analysed. The control law is accomplished using a computer and A/D and D/A converters. Two SMC designs are presented. The first one is a continuous-time conventional SMC design, with a variable structure law, which does not take into consideration the sampling period. The second one is a discrete-time SMC design, with a smooth sliding law, which does not have a structure variable and takes into consideration the sampling period. Both techniques are applied to control an inverted pendulum system. The performance of both the continuous-time and discrete-time controllers are compared. Simulations and experimental results are shown and the effectiveness of the proposed techniques is analysed.

Delay time detection and accommodation for a networked DC motor control

This paper presents a control method that is effective to reduce the degenerative effects of delay time caused by a treacherous network. In present application a controlled DC motor is part of an inverted pendulum and provides the equilibrium of this system. The control of DC motor is accomplished at the distance through a treacherous network, which causes delay time in the control signal. A predictive technique is used so that it turns the system free of delay. A robust digital sliding mode controller is proposed to control the free-delay system. Due to the random conditions of the network operation, a delay time detection and accommodation strategy is also proposed. A computer simulation is shown to illustrate the design procedures and the effectiveness of the proposed method. © 2011 IEEE.

Characterization of the nonlinear behavior of a F-16 aircraft using discrete-time Volterra series

The linearity assumption in the structural dynamics analysis is a severe practical limitation. Further, in the investigation of mechanisms presented in fighter aircrafts, as for instance aeroelastic nonlinearity, friction or gaps in wing-load-payload mounting interfaces, is mandatory to use a nonlinear analysis technique. Among different approaches that can be used to this matter, the Volterra theory is an interesting strategy, since it is a generalization of the linear convolution. It represents the response of a nonlinear system as a sum of linear and nonlinear components. Thus, this paper aims to use the discrete-time version of Volterra series expanded with Kautz filters to characterize the nonlinear dynamics of a F-16 aircraft. To illustrate the approach, it is identified and characterized a non-parametric model using the data obtained during a ground vibration test performed in a F-16 wing-to-payload mounting interfaces. Several amplitude inputs applied in two shakers are used to show softening nonlinearities presented in the acceleration data. The results obtained in the analysis have shown the capability of the Volterra series to give some insight about the nonlinear dynamics of the F-16 mounting interfaces. The biggest advantage of this approach is to separate the linear and nonlinear contributions through the multiple convolutions through the Volterra kernels.

Neural coding tools, based on Information Theory, applied to discrete time series: from electrophysiology to neuroethology

This work is supported by Brazilian agencies Fapesp, CAPES and CNPq

Motion control and real-time systems: an approach to trajectory rebuilding in non-deterministic networks

Motion control is a sub-field of automation, in which the position and/or velocity of machines are controlled using some type of device. In motion control the position, velocity, force, pressure, etc., profiles are designed in such a way that the different mechanical parts work as an harmonious whole in which a perfect synchronization must be achieved. The real-time exchange of information in the distributed system that is nowadays an industrial plant plays an important role in order to achieve always better performance, better effectiveness and better safety. The network for connecting field devices such as sensors, actuators, field controllers such as PLCs, regulators, drive controller etc., and man-machine interfaces is commonly called fieldbus. Since the motion transmission is now task of the communication system, and not more of kinematic chains as in the past, the communication protocol must assure that the desired profiles, and their properties, are correctly transmitted to the axes then reproduced or else the synchronization among the different parts is lost with all the resulting consequences. In this thesis, the problem of trajectory reconstruction in the case of an event-triggered communication system is faced. The most important feature that a real-time communication system must have is the preservation of the following temporal and spatial properties: absolute temporal consistency, relative temporal consistency, spatial consistency. Starting from the basic system composed by one master and one slave and passing through systems made up by many slaves and one master or many masters and one slave, the problems in the profile reconstruction and temporal properties preservation, and subsequently the synchronization of different profiles in network adopting an event-triggered communication system, have been shown. These networks are characterized by the fact that a common knowledge of the global time is not available. Therefore they are non-deterministic networks. Each topology is analyzed and the proposed solution based on phase-locked loops adopted for the basic master-slave case has been improved to face with the other configurations.

Cache-aware development of high integrity real-time systems

Cost, performance and availability considerations are forcing even the most conservative high-integrity embedded real-time systems industry to migrate from simple hardware processors to ones equipped with caches and other acceleration features. This migration disrupts the practices and solutions that industry had developed and consolidated over the years to perform timing analysis. Industry that are confident with the efficiency/effectiveness of their verification and validation processes for old-generation processors, do not have sufficient insight on the effects of the migration to cache-equipped processors. Caches are perceived as an additional source of complexity, which has potential for shattering the guarantees of cost- and schedule-constrained qualification of their systems. The current industrial approach to timing analysis is ill-equipped to cope with the variability incurred by caches. Conversely, the application of advanced WCET analysis techniques on real-world industrial software, developed without analysability in mind, is hardly feasible. We propose a development approach aimed at minimising the cache jitters, as well as at enabling the application of advanced WCET analysis techniques to industrial systems. Our approach builds on:(i) identification of those software constructs that may impede or complicate timing analysis in industrial-scale systems; (ii) elaboration of practical means, under the model-driven engineering (MDE) paradigm, to enforce the automated generation of software that is analyzable by construction; (iii) implementation of a layout optimisation method to remove cache jitters stemming from the software layout in memory, with the intent of facilitating incremental software development, which is of high strategic interest to industry. The integration of those constituents in a structured approach to timing analysis achieves two interesting properties: the resulting software is analysable from the earliest releases onwards - as opposed to becoming so only when the system is final - and more easily amenable to advanced timing analysis by construction, regardless of the system scale and complexity.