Reality bites: Documentary photography and architectural realism = Fragmentos de realidad: Fotografía documental y realismo en arquitectura

En el día de hoy nos enfrentamos a una serie de desafíos económicos, geopolíticos y ambientales que apuntan hacia una transformación profunda del mundo tal y como lo conocemos. La arquitectura esta – siempre lo ha estado – imbricada en todos estos problemas. En nuestra actual condición de recursos limitados e injusticia global surge la necesidad de superar la dicotomía entre progreso y tradición, entre innovación y preservación – la urgencia de redefinir incluso cada uno de estos términos. Los tipos de crisis que encaramos ahora no se resolverán con mas tecnología y más crecimiento – se necesita también una profunda reevaluación de nuestros sistemas de valores e incluso de nuestra sensibilidad. En este contexto, la humilde contribución de esta tesis consiste en proponer la idea de un realismo en arquitectura, entendido como una actitud progresista y atenta a lo que ya existe, dispuesta a abrir los ojos al presente, a las condiciones y los problemas reales que nos rodean. Pensando en esta idea, resulta evidente que si bien el realismo carece de una definición clara en el campo de la arquitectura hoy, cuenta sin embargo con numerosos precedentes parciales, entre ellos algunos de los más notorios episodios de la historia de la arquitectura reciente. Al intentar confeccionar una lista provisional de arquitectos realistas en el último siglo, otro hecho se nos presenta: muchos, por no decir todos estos arquitectos, comparten una fijación por la fotografía, bien apropiándose del trabajo de fotógrafos contemporáneos, bien tomando sus propias imágenes como una forma de mirar fuera de sus estudios e incorporar la realidad del medio construido a sus proyectos. Parece entonces lógico pensar que la arquitectura, como disciplina visual, ha acudido a otra disciplina visual en búsqueda de su propia respuesta al problema del realismo – dentro de este campo la fotografía reverbera con la arquitectura especialmente, ya que ambas son consideradas simultáneamente como practicas utilitarias y como parte de las bellas artes. Parece entonces lógico el organizar la investigación como una serie de casos, con la esperanza de que la acumulación de diversas instancias en las que la arquitectura ha acudido a la fotografía en su búsqueda de un realismo arrojara luz sobre las ideas más generales a debate. Por tanto, cada uno de los episodios en este texto se examina en sus propios términos, si bien una serie de interconexiones emergen a medida que el estudio procede con un suave orden cronológico. Hacia el final del texto cuestiones más grandes recobran protagonismo, a medida que las repercusiones políticas de nuestro estudio se hacen más patentes y comenzamos a interrogar las implicaciones contemporáneas y el potencial futuro de nuestra discusión sobre el realismo. ABSTRACT Today we are faced with a series of economic, geopolitical and environmental challenges that outline a deep transformation of the world as we know it. Architecture is – it has always been – ingrained in all of these problems. In our current condition of limited resources and global inequalities there is a necessity to overcome the dichotomy between progress and tradition, between innovation and preservation – an urgency to even redefine these terms altogether. The types of crises that we are facing will not be solved with more technology and more growth – a deep reevaluation of our systems of values and our sensibilities are also needed. In this context, the humble contribution of this text is to put forward the idea of an architectural realism, understood as an attitude that is both progressive and attentive to what is already in place, willing to open its eyes to the present and accept the real conditions and problems around us. In thinking about this prospect, it immediately becomes apparent that even if realism lacks a clear definition in the field of architecture today, there are numerous partial precedents for it, among them some of the most notorious episodes in the recent history of architecture. In crafting a tentative list of realist architects in the last century, another realization takes place: many, not to say all of these architects, have had a fixation with photography, either appropriating the work of contemporary photographers or taking photographs themselves as a way to look out their windows and bring the reality of the built environment into their practices. It seems then logical to think that architecture, as a visual discipline, has looked to other visual disciplines in search for its own take on the problem of realism – within this field, photography specially resonates with architecture, since both are regarded simultaneously as utilitarian practices and belonging to the fine arts. The idea then becomes to organize the research as a series of cases, with the hope that the accumulation of diverse instances in which architecture has approached photography in its realist drive will shed some light on the larger ideas at stake. Therefore, each of the episodes in this text is examined on its own terms, with a series of interconnections slowly emerging as our survey proceeds with a soft chronologic order. Towards the end of the study, larger issues regain relevance as the political repercussions of our inquiry become more pressing and we start to question the contemporary implications and future potentials of our discussion on realism.

Heavyweight extensions to the UML metamodel to describe the C3 architectural style

UML is widely accepted as the standard for representing the various software artifacts generated by a development process. For this reason, there have been attempts to use this language to represent the software architecture of systems as well. Unfortunately, these attempts have ended in the same representations (boxes and lines) already criticized by the software architecture community.In this work we propose an extension to the UML metamodel that is able to represent the syntactics and semantics of the C3 architectural style. This style is derived from C2. The modifications to define C3 are described in section 4. This proposal is innovative regarding UML extensions for software architectures, since previous proposals where based on light extensions to the UML meta-model, while we propose a heavyweight extension of the metamodel. On the other hand, this proposal is less ambitious than previous proposals, since we do not want to represent in UML any architectural style, but only one: C3.

High-speed rail systems and tourists´ destination choice: the case studies of Paris and Madrid

The analysis of how tourists select their holiday destinations along with the factors determining their choices is very important for promoting tourism. In particular, transportation is supposed to have a great influence on the tourists’ decisions. The aim of this paper is to investigate the role of High Speed Rail (HSR) systems with respect to a destination choice. Two key tourist destinations in Europe namely Paris, and Madrid, have been chosen to identify the factors influencing this choice. On the basis of two surveys to obtain information from tourists, it has been found that the presence of architectural sites, the promotion quality of the destination itself, and the cultural and social events have an impact when making a destination choice. However the availability of the HSR systems affects the choice of Paris and Madrid as tourist destinations in a different way. For Paris, TGV is considered a real transport mode alternative among tourists. On the other hand, Madrid is chosen by tourists irrespective of the presence of an efficient HSR network. Data collected from the two surveys have been used for a further quantitative analysis. Regression models have been specified and parameters have been calibrated to identify the factors influencing holidaymakers to revisit Paris and Madrid and visit other tourist places accessible by HSR from these capitals

Fault management techniques for systems with SRAM-based FPGAs

Las Field-Programmable Gate Arrays (FPGAs) SRAM se construyen sobre una memoria de configuración de tecnología RAM Estática (SRAM). Presentan múltiples características que las hacen muy interesantes para diseñar sistemas empotrados complejos. En primer lugar presentan un coste no-recurrente de ingeniería (NRE) bajo, ya que los elementos lógicos y de enrutado están pre-implementados (el diseño de usuario define su conexionado). También, a diferencia de otras tecnologías de FPGA, pueden ser reconfiguradas (incluso en campo) un número ilimitado de veces. Es más, las FPGAs SRAM de Xilinx soportan Reconfiguración Parcial Dinámica (DPR), la cual permite reconfigurar la FPGA sin interrumpir la aplicación. Finalmente, presentan una alta densidad de lógica, una alta capacidad de procesamiento y un rico juego de macro-bloques. Sin embargo, un inconveniente de esta tecnología es su susceptibilidad a la radiación ionizante, la cual aumenta con el grado de integración (geometrías más pequeñas, menores tensiones y mayores frecuencias). Esta es una precupación de primer nivel para aplicaciones en entornos altamente radiativos y con requisitos de alta confiabilidad. Este fenómeno conlleva una degradación a largo plazo y también puede inducir fallos instantáneos, los cuales pueden ser reversibles o producir daños irreversibles. En las FPGAs SRAM, los fallos inducidos por radiación pueden aparecer en en dos capas de arquitectura diferentes, que están físicamente superpuestas en el dado de silicio. La Capa de Aplicación (o A-Layer) contiene el hardware definido por el usuario, y la Capa de Configuración contiene la memoria de configuración y la circuitería de soporte. Los fallos en cualquiera de estas capas pueden hacer fracasar el sistema, lo cual puede ser ás o menos tolerable dependiendo de los requisitos de confiabilidad del sistema. En el caso general, estos fallos deben gestionados de alguna manera. Esta tesis trata sobre la gestión de fallos en FPGAs SRAM a nivel de sistema, en el contexto de sistemas empotrados autónomos y confiables operando en un entorno radiativo. La tesis se centra principalmente en aplicaciones espaciales, pero los mismos principios pueden aplicarse a aplicaciones terrenas. Las principales diferencias entre ambas son el nivel de radiación y la posibilidad de mantenimiento. Las diferentes técnicas para la gestión de fallos en A-Layer y C-Layer son clasificados, y sus implicaciones en la confiabilidad del sistema son analizados. Se proponen varias arquitecturas tanto para Gestores de Fallos de una capa como de doble-capa. Para estos últimos se propone una arquitectura novedosa, flexible y versátil. Gestiona las dos capas concurrentemente de manera coordinada, y permite equilibrar el nivel de redundancia y la confiabilidad. Con el objeto de validar técnicas de gestión de fallos dinámicas, se desarrollan dos diferentes soluciones. La primera es un entorno de simulación para Gestores de Fallos de C-Layer, basado en SystemC como lenguaje de modelado y como simulador basado en eventos. Este entorno y su metodología asociada permite explorar el espacio de diseño del Gestor de Fallos, desacoplando su diseño del desarrollo de la FPGA objetivo. El entorno incluye modelos tanto para la C-Layer de la FPGA como para el Gestor de Fallos, los cuales pueden interactuar a diferentes niveles de abstracción (a nivel de configuration frames y a nivel físico JTAG o SelectMAP). El entorno es configurable, escalable y versátil, e incluye capacidades de inyección de fallos. Los resultados de simulación para algunos escenarios son presentados y comentados. La segunda es una plataforma de validación para Gestores de Fallos de FPGAs Xilinx Virtex. La plataforma hardware aloja tres Módulos de FPGA Xilinx Virtex-4 FX12 y dos Módulos de Unidad de Microcontrolador (MCUs) de 32-bits de propósito general. Los Módulos MCU permiten prototipar Gestores de Fallos de C-Layer y A-Layer basados en software. Cada Módulo FPGA implementa un enlace de A-Layer Ethernet (a través de un switch Ethernet) con uno de los Módulos MCU, y un enlace de C-Layer JTAG con el otro. Además, ambos Módulos MCU intercambian comandos y datos a través de un enlace interno tipo UART. Al igual que para el entorno de simulación, se incluyen capacidades de inyección de fallos. Los resultados de pruebas para algunos escenarios son también presentados y comentados. En resumen, esta tesis cubre el proceso completo desde la descripción de los fallos FPGAs SRAM inducidos por radiación, pasando por la identificación y clasificación de técnicas de gestión de fallos, y por la propuesta de arquitecturas de Gestores de Fallos, para finalmente validarlas por simulación y pruebas. El trabajo futuro está relacionado sobre todo con la implementación de Gestores de Fallos de Sistema endurecidos para radiación. ABSTRACT SRAM-based Field-Programmable Gate Arrays (FPGAs) are built on Static RAM (SRAM) technology configuration memory. They present a number of features that make them very convenient for building complex embedded systems. First of all, they benefit from low Non-Recurrent Engineering (NRE) costs, as the logic and routing elements are pre-implemented (user design defines their connection). Also, as opposed to other FPGA technologies, they can be reconfigured (even in the field) an unlimited number of times. Moreover, Xilinx SRAM-based FPGAs feature Dynamic Partial Reconfiguration (DPR), which allows to partially reconfigure the FPGA without disrupting de application. Finally, they feature a high logic density, high processing capability and a rich set of hard macros. However, one limitation of this technology is its susceptibility to ionizing radiation, which increases with technology scaling (smaller geometries, lower voltages and higher frequencies). This is a first order concern for applications in harsh radiation environments and requiring high dependability. Ionizing radiation leads to long term degradation as well as instantaneous faults, which can in turn be reversible or produce irreversible damage. In SRAM-based FPGAs, radiation-induced faults can appear at two architectural layers, which are physically overlaid on the silicon die. The Application Layer (or A-Layer) contains the user-defined hardware, and the Configuration Layer (or C-Layer) contains the (volatile) configuration memory and its support circuitry. Faults at either layers can imply a system failure, which may be more ore less tolerated depending on the dependability requirements. In the general case, such faults must be managed in some way. This thesis is about managing SRAM-based FPGA faults at system level, in the context of autonomous and dependable embedded systems operating in a radiative environment. The focus is mainly on space applications, but the same principles can be applied to ground applications. The main differences between them are the radiation level and the possibility for maintenance. The different techniques for A-Layer and C-Layer fault management are classified and their implications in system dependability are assessed. Several architectures are proposed, both for single-layer and dual-layer Fault Managers. For the latter, a novel, flexible and versatile architecture is proposed. It manages both layers concurrently in a coordinated way, and allows balancing redundancy level and dependability. For the purpose of validating dynamic fault management techniques, two different solutions are developed. The first one is a simulation framework for C-Layer Fault Managers, based on SystemC as modeling language and event-driven simulator. This framework and its associated methodology allows exploring the Fault Manager design space, decoupling its design from the target FPGA development. The framework includes models for both the FPGA C-Layer and for the Fault Manager, which can interact at different abstraction levels (at configuration frame level and at JTAG or SelectMAP physical level). The framework is configurable, scalable and versatile, and includes fault injection capabilities. Simulation results for some scenarios are presented and discussed. The second one is a validation platform for Xilinx Virtex FPGA Fault Managers. The platform hosts three Xilinx Virtex-4 FX12 FPGA Modules and two general-purpose 32-bit Microcontroller Unit (MCU) Modules. The MCU Modules allow prototyping software-based CLayer and A-Layer Fault Managers. Each FPGA Module implements one A-Layer Ethernet link (through an Ethernet switch) with one of the MCU Modules, and one C-Layer JTAG link with the other. In addition, both MCU Modules exchange commands and data over an internal UART link. Similarly to the simulation framework, fault injection capabilities are implemented. Test results for some scenarios are also presented and discussed. In summary, this thesis covers the whole process from describing the problem of radiationinduced faults in SRAM-based FPGAs, then identifying and classifying fault management techniques, then proposing Fault Manager architectures and finally validating them by simulation and test. The proposed future work is mainly related to the implementation of radiation-hardened System Fault Managers.

A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing

The current trend in the evolution of sensor systems seeks ways to provide more accuracy and resolution, while at the same time decreasing the size and power consumption. The use of Field Programmable Gate Arrays (FPGAs) provides specific reprogrammable hardware technology that can be properly exploited to obtain a reconfigurable sensor system. This adaptation capability enables the implementation of complex applications using the partial reconfigurability at a very low-power consumption. For highly demanding tasks FPGAs have been favored due to the high efficiency provided by their architectural flexibility (parallelism, on-chip memory, etc.), reconfigurability and superb performance in the development of algorithms. FPGAs have improved the performance of sensor systems and have triggered a clear increase in their use in new fields of application. A new generation of smarter, reconfigurable and lower power consumption sensors is being developed in Spain based on FPGAs. In this paper, a review of these developments is presented, describing as well the FPGA technologies employed by the different research groups and providing an overview of future research within this field.

A formal framework for modelling complex network management systems

Society today is completely dependent on computer networks, the Internet and distributed systems, which place at our disposal the necessary services to perform our daily tasks. Subconsciously, we rely increasingly on network management systems. These systems allow us to, in general, maintain, manage, configure, scale, adapt, modify, edit, protect, and enhance the main distributed systems. Their role is secondary and is unknown and transparent to the users. They provide the necessary support to maintain the distributed systems whose services we use every day. If we do not consider network management systems during the development stage of distributed systems, then there could be serious consequences or even total failures in the development of the distributed system. It is necessary, therefore, to consider the management of the systems within the design of the distributed systems and to systematise their design to minimise the impact of network management in distributed systems projects. In this paper, we present a framework that allows the design of network management systems systematically. To accomplish this goal, formal modelling tools are used for modelling different views sequentially proposed of the same problem. These views cover all the aspects that are involved in the system; based on process definitions for identifying responsible and defining the involved agents to propose the deployment in a distributed architecture that is both feasible and appropriate.

A Unified Approach to Automatic Testing of Architectural Constraints

Architectural decisions are often encoded in the form of constraints and guidelines. Non-functional requirements can be ensured by checking the conformance of the implementation against this kind of invariant. Conformance checking is often a costly and error-prone process that involves the use of multiple tools, differing in effectiveness, complexity and scope of applicability. To reduce the overall effort entailed by this activity, we propose a novel approach that supports verification of human- readable declarative rules through the use of adapted off-the-shelf tools. Our approach consists of a rule specification DSL, called Dicto, and a tool coordination framework, called Probo. The approach has been implemented in a soon to be evaluated prototype.

On the Evaluation of a DSL for Architectural Consistency Checking

Software architecture erodes over time and needs to be constantly monitored to be kept consistent with its original intended design. Consistency is rarely monitored using automated techniques. The cost associated to such an activity is typically not considered proportional to its benefits. To improve this situation, we propose Dicto, a uniform DSL for specifying architectural invariants. This language is designed to reduce the cost of consistency checking by offering a framework in which existing validation tools can be matched to newly-defined language constructs. In this paper we discuss how such a DSL can be qualitatively and qualitatively evaluated in practice.

Subterranean Urban Systems Study, Graham Foundation Grant, 1971-1974

[Conceptual Sketch], untitled. Ink sketch on spiral notebook paper, 8 1/4 x 10 3/4 inches [from photographic copy by Lance Burgharrdt]

Subterranean Urban Systems Study, Graham Foundation Grant, 1971-1974

[Conceptual Sketches], untitled. Ink sketches on spiral notebook paper, 8 1/4 x 10 3/4 inches [from photographic copy by Lance Burgharrdt]

Subterranean Urban Systems Study, Graham Foundation Grant, 1971-1974

[Conceptual Sketches], untitled. Ink sketches on spiral notebook paper, 8 1/4 x 10 3/4 inches [from photographic copy by Lance Burgharrdt]

Subterranean Urban Systems Study, Graham Foundation Grant 1971-1974

[Conceptual Sketches], untitled. Digital image only of blue ink sketches on spiral notebook paper, initialed, 8 1/4 x 10 3/4 inches

Rice morphogenesis and plant architecture: Measurement, specification and the reconstruction of structural development by 3D architectural modelling

Background and Aims The morphogenesis and architecture of a rice plant, Oryza sativa, are critical factors in the yield equation, but they are not well studied because of the lack of appropriate tools for 3D measurement. The architecture of rice plants is characterized by a large number of tillers and leaves. The aims of this study were to specify rice plant architecture and to find appropriate functions to represent the 3D growth across all growth stages. Methods A japonica type rice, 'Namaga', was grown in pots under outdoor conditions. A 3D digitizer was used to measure the rice plant structure at intervals from the young seedling stage to maturity. The L-system formalism was applied to create '3D virtual rice' plants, incorporating models of phenological development and leaf emergence period as a function of temperature and photoperiod, which were used to determine the timing of tiller emergence. Key Results The relationships between the nodal positions and leaf lengths, leaf angles and tiller angles were analysed and used to determine growth functions for the models. The '3D virtual rice' reproduces the structural development of isolated plants and provides a good estimation of the fillering process, and of the accumulation of leaves. Conclusions The results indicated that the '3D virtual rice' has a possibility to demonstrate the differences in the structure and development between cultivars and under different environmental conditions. Future work, necessary to reflect both cultivar and environmental effects on the model performance, and to link with physiological models, is proposed in the discussion.