Behaviour of autonomous mobile agents using linear cyclic pursuit laws

In this paper, the behaviour of a group of autonomous mobile agents under cyclic pursuit is studied. Cyclic pursuit is a simple distributed control law, in which the agent i pursues agent i + 1 modulo n.. The equations of motion are linear, with no kinematic constraints on motion. Behaviourally, the agents are identical, but may have different controller gains. We generalize existing results in the literature and show that by selecting these gains, the behavior of the agents can be controlled. They can be made to converge at a point or be directed to move in a straight line. The invariance of the point of convergence with the sequence of pursuit is also shown.

Evolving Philosophies on Autonomous Obstacle/Collision Avoidance of Unmanned Aerial Vehicles

Much of the benefits of deploying unmanned aerial vehicles can be derived from autonomous missions. For such missions, however, sense-and-avoid capability (i.e., the ability to detect potential collisions and avoid them) is a critical requirement. Collision avoidance can be broadly classified into global and local path-planning algorithms, both of which need to be addressed in a successful mission. Whereas global path planning (which is mainly done offline) broadly lays out a path that reaches the goal point, local collision-avoidance algorithms, which are usually fast, reactive, and carried out online, ensure safety of the vehicle from unexpected and unforeseen obstacles/collisions. Even though many techniques for both global and local collision avoidance have been proposed in the recent literature, there is a great interest around the globe to solve this important problem comprehensively and efficiently and such techniques are still evolving. This paper presents a brief overview of a few promising and evolving ideas on collision avoidance for unmanned aerial vehicles, with a preferential bias toward local collision avoidance.

Positional Consensus of Multi-Agent Systems Using Linear Programming Based Decentralized Control with Rectilinear Decision Domain

In this paper we develop a Linear Programming (LP) based decentralized algorithm for a group of multiple autonomous agents to achieve positional consensus. Each agent is capable of exchanging information about its position and orientation with other agents within their sensing region. The method is computationally feasible and easy to implement. Analytical results are presented. The effectiveness of the approach is illustrated with simulation results.

A single network adaptive critic (SNAC) architecture for optimal control synthesis for a class of nonlinear systems

Even though dynamic programming offers an optimal control solution in a state feedback form, the method is overwhelmed by computational and storage requirements. Approximate dynamic programming implemented with an Adaptive Critic (AC) neural network structure has evolved as a powerful alternative technique that obviates the need for excessive computations and storage requirements in solving optimal control problems. In this paper, an improvement to the AC architecture, called the �Single Network Adaptive Critic (SNAC)� is presented. This approach is applicable to a wide class of nonlinear systems where the optimal control (stationary) equation can be explicitly expressed in terms of the state and costate variables. The selection of this terminology is guided by the fact that it eliminates the use of one neural network (namely the action network) that is part of a typical dual network AC setup. As a consequence, the SNAC architecture offers three potential advantages: a simpler architecture, lesser computational load and elimination of the approximation error associated with the eliminated network. In order to demonstrate these benefits and the control synthesis technique using SNAC, two problems have been solved with the AC and SNAC approaches and their computational performances are compared. One of these problems is a real-life Micro-Electro-Mechanical-system (MEMS) problem, which demonstrates that the SNAC technique is applicable to complex engineering systems.

Robust controller for an autonomous small refrigeration unit

The authors describe the constructional features of a controller for operating an autonomous refrigeration unit powered by a field of photovoltaic panels and backed up by a generator set. The controller enables three voltage levels of operation of an inverter to meet the start, run and off cycle conditions of the refrigerator compressor. The algorithm considers several input and output parameters and status signals from each subsystem of the unit to deduce a control strategy. Such units find application for storage of vaccines and life-saving medicines requiring uninterrupted refrigeration, in medical shops, rural health centres, veterinary laboratories etc.

Autonomous and non-autonomous traits mediate social cooperation in Dictyostelium discoideum

In the trishanku (triA(-)) mutant of the social amoeba Dictyostelium discoideum, aggregates are smaller than usual and the spore mass is located mid-way up the stalk, not at the apex. We have monitored aggregate territory size, spore allocation and fruiting body morphology in chimaeric groups of (quasi-wild-type) Ax2 and triA(-) cells. Developmental canalisation breaks down in chimaeras and leads to an increase in phenotypic variation. A minority of triA(-) cells causes largely Ax2 aggregation streams to break up; the effect is not due to the counting factor. Most chimaeric fruiting bodies resemble those of Ax2 or triA(-). Others are double-deckers with a single stalk and two spore masses, one each at the terminus and midway along the stalk. The relative number of spores belonging to the two genotypes depends both on the mixing ratio and on the fruiting body morphology. In double-deckers formed from 1:1 chimaeras, the upper spore mass has more Ax2 spores, and the lower spore mass more triA(-) spores, than expected. Thus, the traits under study depend partly on the cells' own genotype and partly on the phenotypes, and so genotypes, of other cells: they are both autonomous and non-autonomous. These findings strengthen the parallels between multicellular development and behaviour in social groups. Besides that, they reinforce the point that a trait can be associated with a genotype only in a specified context.

MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip

The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded DSP is complex and usually custom designed with multiple banks of single-ported or dual ported on-chip scratch pad memory and multiple banks of off-chip memory. Building software for such large complex memories with many of the software components as individually optimized software IPs is a big challenge. In order to obtain good performance and a reduction in memory stalls, the data buffers of the application need to be placed carefully in different types of memory. In this paper we present a unified framework (MODLEX) that combines different data layout optimizations to address the complex DSP memory architectures. Our method models the data layout problem as multi-objective genetic algorithm (GA) with performance and power being the objectives and presents a set of solution points which is attractive from a platform design viewpoint. While most of the work in the literature assumes that performance and power are non-conflicting objectives, our work demonstrates that there is significant trade-off (up to 70%) that is possible between power and performance.

MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip

Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences these parameters. Hence the embedded system designer performs a complete memory architecture exploration. This problem is a multi-objective optimization problem and can be tackled as a two-level optimization problem. The outer level explores various memory architecture while the inner level explores placement of data sections (data layout problem) to minimize memory stalls. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of Multi-objective Genetic Algorithm (Memory Architecture exploration) and an efficient heuristic data placement algorithm. At the outer level the memory architecture exploration is done by picking memory modules directly from a ASIC memory Library. This helps in performing the memory architecture exploration in a integrated framework, where the memory allocation, memory exploration and data layout works in a tightly coupled way to yield optimal design points with respect to area, power and performance. We experimented our approach for 3 embedded applications and our approach explores several thousand memory architecture for each application, yielding a few hundred optimal design points in a few hours of computation time on a standard desktop.

On-Chip Memory Architecture Exploration Framework for DSP Processor-Based Embedded System on Chip

Today's SoCs are complex designs with multiple embedded processors, memory subsystems, and application specific peripherals. The memory architecture of embedded SoCs strongly influences the power and performance of the entire system. Further, the memory subsystem constitutes a major part (typically up to 70%) of the silicon area for the current day SoC. In this article, we address the on-chip memory architecture exploration for DSP processors which are organized as multiple memory banks, where banks can be single/dual ported with non-uniform bank sizes. In this paper we propose two different methods for physical memory architecture exploration and identify the strengths and applicability of these methods in a systematic way. Both methods address the memory architecture exploration for a given target application by considering the application's data access characteristics and generates a set of Pareto-optimal design points that are interesting from a power, performance and VLSI area perspective. To the best of our knowledge, this is the first comprehensive work on memory space exploration at physical memory level that integrates data layout and memory exploration to address the system objectives from both hardware design and application software development perspective. Further we propose an automatic framework that explores the design space identifying 100's of Pareto-optimal design points within a few hours of running on a standard desktop configuration.

USHA: unified software and hardware architecture for video decoding

Video decoders used in emerging applications need to be flexible to handle a large variety of video formats and deliver scalable performance to handle wide variations in workloads. In this paper we propose a unified software and hardware architecture for video decoding to achieve scalable performance with flexibility. The light weight processor tiles and the reconfigurable hardware tiles in our architecture enable software and hardware implementations to co-exist, while a programmable interconnect enables dynamic interconnection of the tiles. Our process network oriented compilation flow achieves realization agnostic application partitioning and enables seamless migration across uniprocessor, multi-processor, semi hardware and full hardware implementations of a video decoder. An application quality of service aware scheduler monitors and controls the operation of the entire system. We prove the concept through a prototype of the architecture on an off-the-shelf FPGA. The FPGA prototype shows a scaling in performance from QCIF to 1080p resolutions in four discrete steps. We also demonstrate that the reconfiguration time is short enough to allow migration from one configuration to the other without any frame loss.

e-SURAKSHAK: A Cyber-Physical Healthcare System with Service Oriented Architecture

In this paper we present the design of ``e-SURAKSHAK,'' a novel cyber-physical health care management system of Wireless Embedded Internet Devices (WEIDs) that sense vital health parameters. The system is capable of sensing body temperature, heart rate, oxygen saturation level and also allows noninvasive blood pressure (NIBP) measurement. End to end internet connectivity is provided by using 6LoWPAN based wireless network that uses the 802.15.4 radio. A service oriented architecture (SOA) 1] is implemented to extract meaningful information and present it in an easy-to-understand form to the end-user instead of raw data made available by sensors. A central electronic database and health care management software are developed. Vital health parameters are measured and stored periodically in the database. Further, support for real-time measurement of health parameters is provided through a web based GUI. The system has been implemented completely and demonstrated with multiple users and multiple WEIDs.