981 resultados para Voltage-sensitive Sodium Channels


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This article reports evidence of new monetary channels for social inclusion involving basic income policies and the Caixa Econômica Federal, a Brazilian government savings bank. Since the Plano Real (Brazilian currency) and the liberalization of banking in the 1990s, the realization of competitive advantages by the Caixa as social policy agent and the importance of citizenship cards differ from existing theories of bank change, financial inclusion and monetary policy. Multi-method research reveals the importance of 1) political theories of basic income, 2) conceptions of citizenship and social justice, and 3) a back to the future modernization of government banking. This provides alternatives to contemporary market-based banking theory, neo-liberal policies, private and non-governmental microfinance strategies, and theories in political economy about fiscal constraints to social policies. New monetary channels of change also suggest that zero sum theories about politics, monetary authority and social inclusion are amiss.

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The intensive use of semiconductor devices enabled the development of a repetitive high-voltage pulse-generator topology from the dc voltage-multiplier (VM) concept. The proposed circuit is based on an odd VM-type circuit, where a number of dc capacitors share a common connection with different voltage ratings in each one, and the output voltage comes from a single capacitor. Standard VM rectifier and coupling diodes are used for charging the energy-storing capacitors, from an ac power supply, and two additional on/off semiconductors in each stage, to switch from the typical charging VM mode to a pulse mode with the dc energy-storing capacitors connected in series with the load. Results from a 2-kV experimental prototype with three stages, delivering a 10-mu s pulse with a 5-kHz repetition rate into a resistive load, are discussed. Additionally, the proposed circuit is compared against the solid-state Marx generator topology for the same peak input and output voltages.

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This paper presents a new generalized solution for DC bus capacitors voltage balancing in back-to-back m level diode-clamped multilevel converters connecting AC networks. The solution is based on the DC bus average power flow and exploits the switching configuration redundancies. The proposed balancing solution is particularized for the back-to-back multilevel structure with m=5 levels. This back-to-back converter is studied working with bidirectional power flow, connecting an induction machine to the power grid.

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This paper presents a predictive optimal matrix converter controller for a flywheel energy storage system used as Dynamic Voltage Restorer (DVR). The flywheel energy storage device is based on a steel seamless tube mounted as a vertical axis flywheel to store kinetic energy. The motor/generator is a Permanent Magnet Synchronous Machine driven by the AC-AC Matrix Converter. The matrix control method uses a discrete-time model of the converter system to predict the expected values of the input and output currents for all the 27 possible vectors generated by the matrix converter. An optimal controller minimizes control errors using a weighted cost functional. The flywheel and control process was tested as a DVR to mitigate voltage sags and swells. Simulation results show that the DVR is able to compensate the critical load voltage without delays, voltage undershoots or overshoots, overcoming the input/output coupling of matrix converters.

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A new circuit topology is proposed to replace the actual pulse transformer and thyratron based resonant modulator that supplies the 60 kV target potential for the ion acceleration of the On-Line Isotope Mass Separator accelerator, the stability of which is critical for the mass resolution downstream separator, at the European Organization for Nuclear Research. The improved modulator uses two solid-state switches working together, each one based on the Marx generator concept, operating as series and parallel switches, reducing the stress on the series stacked semiconductors, and also as auxiliary pulse generator in order to fulfill the target requirements. Preliminary results of a 10 kV prototype, using 1200 V insulated gate bipolar transistors and capacitors in the solid-state Marx circuits, ten stages each, with an electrical equivalent circuit of the target, are presented, demonstrating both the improved voltage stability and pulse flexibility potential wanted for this new modulator.

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Implementing monolithic DC-DC converters for low power portable applications with a standard low voltage CMOS technology leads to lower production costs and higher reliability. Moreover, it allows miniaturization by the integration of two units in the same die: the power management unit that regulates the supply voltage for the second unit, a dedicated signal processor, that performs the functions required. This paper presents original techniques that limit spikes in the internal supply voltage on a monolithic DC-DC converter, extending the use of the same technology for both units. These spikes are mainly caused by fast current variations in the path connecting the external power supply to the internal pads of the converter power block. This path includes two parasitic inductances inbuilt in bond wires and in package pins. Although these parasitic inductances present relative low values when compared with the typical external inductances of DC-DC converters, their effects can not be neglected when switching high currents at high switching frequency. The associated overvoltage frequently causes destruction, reliability problems and/or control malfunction. Different spike reduction techniques are presented and compared. The proposed techniques were used in the design of the gate driver of a DC-DC converter included in a power management unit implemented in a standard 0.35 mu m CMOS technology.

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A newly developed solid-state repetitive high-voltage (HV) pulse modulator topology created from the mature concept of the d.c. voltage multiplier (VM) is described. The proposed circuit is based in a voltage multiplier type circuit, where a number of d.c. capacitors share a common connection with different voltage rating in each one. Hence, besides the standard VM rectifier and coupling diodes, two solid-state on/off switches are used, in each stage, to switch from the typical charging VM mode to a pulse mode with the d.c. capacitors connected in series with the load. Due to the on/off semiconductor configuration, in half-bridge structures, the maximum voltage blocked by each one is the d.c. capacitor voltage in each stage. A 2 kV prototype is described and the results are compared with PSPICE simulations.

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Neste trabalho é efectuado, não só o diagnóstico em regime permanente, mas também o estudo, simulação e análise do comportamento dinâmico da rede eléctrica da ilha de São Vicente em Cabo Verde. Os estudos de estabilidade transitória desempenham um importante papel, tanto no planeamento como na operação dos sistemas de potência. Tais estudos são realizados, em grande parte, através de simulação digital no domínio do tempo, utilizando integração numérica para resolver as equações não-lineares que modelam a dinâmica do sistema e dependem da existência de registos reais de perturbação (ex: osciloperturbografia). O objectivo do trabalho será também verificar a aplicabilidade dos requisitos técnicos que as unidades geradoras devem ter, no que concerne ao controlo de tensão, estabelecidos na futura regulamentação europeia desenvolvida pela ENTSO-E (European Network Transmission System Operator for Electricity). De entre os requisitos analisou-se a capacidade das máquinas existentes suportarem cavas de tensão decorrentes de curto-circuitos trifásicos simétricos, Fault Ride Through, no ponto de ligação à rede. Identificaram-se para o efeito os factores que influenciam a estabilidade desta rede, em regime perturbado nomeadamente: (i) duração do defeito, (ii) caracterização da carga, com e sem a presença do sistema de controlo de tensão (AVR) em unidades de geração síncronas. Na ausência de registos reais sobre o comportamento do sistema, conclui-se que este é sensível à elasticidade das cargas em particular do tipo potência constante, existindo risco de perda de estabilidade, neste caso, para defeitos superiores a 5ms sem AVR. A existência de AVR nesta rede afigura-se como indispensável para garantir estabilidade de tensão sendo contudo necessário proceder a uma correcta parametrização.

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A large area colour imager optically addressed is presented. The colour imager consists of a thin wide band gap p-i-n a-SiC:H filtering element deposited on the top of a thick large area a-SiC:H(-p)/a-Si:H(-i)/a-SiC:H(-n) image sensor, which reveals itself an intrinsic colour filter. In order to tune the external applied voltage for full colour discrimination the photocurrent generated by a modulated red light is measured under different optical and electrical bias. Results reveal that the integrated device behaves itself as an imager and a filter giving information not only on the position where the optical image is absorbed but also on it wavelength and intensity. The amplitude and sign of the image signals are electrically tuneable. In a wide range of incident fluxes and under reverse bias, the red and blue image signals are opposite in sign and the green signal is suppressed allowing blue and red colour recognition. The green information is obtained under forward bias, where the blue signal goes down to zero and the red and green remain constant. Combining the information obtained at this two applied voltages a RGB colour image picture can be acquired without the need of the usual colour filters or pixel architecture. A numerical simulation supports the colour filter analysis.

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Results on the use of a double a-SiC:H p-i-n heterostructure for signal multiplexing and demultiplexing applications in the visible range are presented. Pulsed monochromatic beams together (multiplexing mode), or a single polychromatic beam (demultiplexing mode) impinge on the device and are absorbed, accordingly to their wavelength. Red, green and blue pulsed input channels are transmitted together, each one with a specific transmission rate. The combined optical signal is analyzed by reading out, under different applied voltages, the generated photocurrent. Results show that in the multiplexing mode the output signal is balanced by the wavelength and transmission rate of each input channel, keeping the memory of the incoming optical carriers. In the demultiplexing mode the photocurrent is controlled by the applied voltage allowing regaining the transmitted information. A physical model supported by a numerical simulation gives insight into the device operation.

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In this paper, we present results on the use of multilayered a-SiC:H heterostructures as a device for wavelength-division demultiplexing of optical signals. These devices are useful in optical communications applications that use the wavelength division multiplexing technique to encode multiple signals into the same transmission medium. The device is composed of two stacked p-i-n photodiodes, both optimized for the selective collection of photo generated carriers. Band gap engineering was used to adjust the photogeneration and recombination rate profiles of the intrinsic absorber regions of each photodiode to short and long wavelength absorption in the visible spectrum. The photocurrent signal using different input optical channels was analyzed at reverse and forward bias and under steady state illumination. A demux algorithm based on the voltage controlled sensitivity of the device was proposed and tested. An electrical model of the WDM device is presented and supported by the solution of the respective circuit equations.

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This paper addresses the voltage droop compensation associated with long pulses generated by solid-stated based high-voltage Marx topologies. In particular a novel design scheme for voltage droop compensation in solid-state based bipolar Marx generators, using low-cost circuitry design and control, is described. The compensation consists of adding one auxiliary PWM stage to the existing Marx stages, without changing the modularity and topology of the circuit, which controls the output voltage and a LC filter that smoothes the voltage droop in both the positive and negative output pulses. Simulation results are presented for 5 stages Marx circuit using 1 kV per stage, with 1 kHz repetition rate and 10% duty cycle.

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A DC-DC step-up micro power converter for solar energy harvesting applications is presented. The circuit is based on a switched-capacitorvoltage tripler architecture with MOSFET capacitors, which results in an, area approximately eight times smaller than using MiM capacitors for the 0.131mu m CMOS technology. In order to compensate for the loss of efficiency, due to the larger parasitic capacitances, a charge reutilization scheme is employed. The circuit is self-clocked, using a phase controller designed specifically to work with an amorphous silicon solar cell, in order to obtain themaximum available power from the cell. This will be done by tracking its maximum power point (MPPT) using the fractional open circuit voltage method. Electrical simulations of the circuit, together with an equivalent electrical model of an amorphous silicon solar cell, show that the circuit can deliver apower of 1132 mu W to the load, corresponding to a maximum efficiency of 66.81%.

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Multilevel power converters have been introduced as the solution for high-power high-voltage switching applications where they have well-known advantages. Recently, full back-to-back connected multilevel neutral point diode clamped converters (NPC converter) have been used inhigh-voltage direct current (HVDC) transmission systems. Bipolar-connected back-to-back NPC converters have advantages in long-distance HVDCtransmission systems over the full back-to-back connection, but greater difficulty to balance the dc capacitor voltage divider on both sending and receiving end NPC converters. This study shows that power flow control and dc capacitor voltage balancing are feasible using fast optimum-predictive-based controllers in HVDC systems using bipolar back-to-back-connected five-level NPC multilevel converters. For both converter sides, the control strategytakes in account active and reactive power, which establishes ac grid currents in both ends, and guarantees the balancing of dc bus capacitor voltages inboth NPC converters. Additionally, the semiconductor switching frequency is minimised to reduce switching losses. The performance and robustness of the new fast predictive control strategy, and its capability to solve the DC capacitor voltage balancing problem of bipolar-connected back-to-back NPCconverters are evaluated.

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The characteristics of tunable wavelength filters based on a-SiC:H multilayered stacked pin cells are studied both theoretically and experimentally. The optical transducers were produced by PECVD and tested for a proper fine tuning of the cyan and yellow fluorescent proteins emission. The active device consists of a p-i'(a-SiC:H)-n/p-i(a-Si:H)-n heterostructures sandwiched between two transparent contacts. Experimental data on spectral response analysis, current-voltage characteristics and color and transmission rate discrimination are reported. Cyan and yellow fluorescent input channels were transmitted together, each one with a specific transmission rate and different intensities. The multiplexed optical signal was analyzed by reading out, under positive and negative applied voltages, the generated photocurrents. Results show that the optimized optical transducer has the capability of combining the transient fluorescent signals onto a single output signal without losing any specificity (color and intensity). It acts as a voltage controlled optical filter: when the applied voltages are chosen appropriately the transducer can select separately the cyan and yellow channel emissions (wavelength and frequency) and also to quantify their relative intensities. A theoretical analysis supported by a numerical simulation is presented.