965 resultados para Thermohidraulic circuit


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Design of high-frequency inductors for purposes like Active Front End (AFE) converter filters involves analytical calculations based on methods like area product approach and accurate graphical methods. Once a core with an area product is selected the subsequent calculations of inductance and peak operating flux requires the estimation of reluctance of the magnetic circuit. This in turn demands an estimate of the fringing that will happen in the air gap of the inductor. In this paper we have looked at analytical methods for evaluating fringing flux and compared it with results from finite element method. Different levels of details of modelling the inductor is first considered for this purpose. The end results are compared with experimental measurements of inductance. It is shown that simple fringing flux model can provide accurate models for the inductor design.

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Lead acid batteries are used in hybrid vehicles and telecommunications power supply. For reliable operation of these systems, an indication of state of charge of battery is essential. To determine the state of charge of battery, current integration method combined with open circuit voltage, is being implemented. To reduce the error in the current integration method the dependence of available capacity as a function of discharge current is determined. The current integration method is modified to incorporate this factor. The experimental setup built to obtain the discharge characterstics of the battery is presented.

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A novel ZVS auxiliary switch commutated variation for all DGDC converter topologies has been proposed in 2006. With proper designation of the circuit variables (throw current I and the pole voltage V), all these converters are seen to be governed by an identical set of equations. With idealized switches, the steady-state performance is obtainable in an analytical form. The conversion ratio of the converter topologies is obtained. A generalized equivalent circuit emerges for all these converters from the steady-state conversion ratio. It also provides a dynamic model as well. With these generalized steady-state equivalent circuits, small signal analysis of these converters may be carried out readily. It enables one to use the familiar state space averaged results of the standard PWM DGDC converters for the resonant counterparts. Th dc and ac models reveals that dc and low frequency behaviour of the proposed family of converters is similiar to that of its PWM parent

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Power system disturbances are often caused by faults on transmission lines. When faults occur in a power system, the protective relays detect the fault and initiate tripping of appropriate circuit breakers, which isolate the affected part from the rest of the power system. Generally Extra High Voltage (EHV) transmission substations in power systems are connected with multiple transmission lines to neighboring substations. In some cases mal-operation of relays can happen under varying operating conditions, because of inappropriate coordination of relay settings. Due to these actions the power system margins for contingencies are decreasing. Hence, power system protective relaying reliability becomes increasingly important. In this paper an approach is presented using Support Vector Machine (SVM) as an intelligent tool for identifying the faulted line that is emanating from a substation and finding the distance from the substation. Results on 24-bus equivalent EHV system, part of Indian southern grid, are presented for illustration purpose. This approach is particularly important to avoid mal-operation of relays following a disturbance in the neighboring line connected to the same substation and assuring secure operation of the power systems.

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This paper presents an Artificial Neural Network (ANN) approach for locating faults in distribution systems. Different from the traditional Fault Section Estimation methods, the proposed approach uses only limited measurements. Faults are located according to the impedances of their path using a Feed Forward Neural Networks (FFNN). Various practical situations in distribution systems, such as protective devices placed only at the substation, limited measurements available, various types of faults viz., three-phase, line (a, b, c) to ground, line to line (a-b, b-c, c-a) and line to line to ground (a-b-g, b-c-g, c-a-g) faults and a wide range of varying short circuit levels at substation, are considered for studies. A typical IEEE 34 bus practical distribution system with unbalanced loads and with three- and single- phase laterals and a 69 node test feeder with different configurations are considered for studies. The results presented show that the proposed approach of fault location gives close to accurate results in terms of the estimated fault location.

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n many parts of the world, the goal of electricity supply industries is always the introduction of competition and a lowering of the average consumer price. Because of this it has become much more important to be able to determine which generators are supplying a particular load, how much use each generator is making of a transmission line and what is generator's contribution to the system losses. In this paper a case study on generator contributions towards loads and transmission flows are illustrated with an equivalent 11-bus system, a part of Indian Southern Grid, based on the concepts of circuit flow directions, for normal and network contingency conditions.

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One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

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A simple firing delay circuit for 3-φ fully controlled bridge using a phase locked loop is described. The circuit uses very few components and is an improved scheme over the existing methods. The use of this circuit in three-phase thyristor converters and 'circulating current free' mode dual converters is described.

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Telluric Acid Ammonium Phosphate (Te(OH)62(NH4)H2PO4(NH4)2HPO4) reffered to as TAAP is a recently discovered class m ferroelectric.1 It undergoes FE-PE transition at 48°C. Switching studies in this crystal has been carried out in the temperature range -14°C to 39°C by applying fields up to 4 kV/cm. Measurements were carried out on (101) plates cut from the crystals grown from solution. X-ray irradiation was carried out at room temperature by means of an x-ray tube operating at 25 kV and 15 mA with copper target. Air drying silver paste was used as electrodes. Samples were checked for hysteresis loop using a modified Sawyer-Tower circuit. The Ps value obtained from the loop is 2.1 μC/cm2 which is comparable to the earlier reported value. It was however noticed that the loop was slightly shifted to right with respect to the origin indicating the presence of a small internal bias which was 100 V/cm in the virgin crystal. This bias could not be removed even after repeated crystallization. On irradiation the internal biasing field increased which was indicated by a further shift of the hysteresis loop. The bias seems to saturate at about 750 V/cm for which the crystal had to be irradiated for about 3 hours.

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With the rapid development of photovoltaic system installations and increased number of grid connected power systems, it has become imperative to develop an efficient grid interfacing instrumentation suitable for photovoltaic systems ensuring maximum power transfer. The losses in the power converter play an important role in the overall efficiency of a PV system. Chain cell converter is considered to be efficient as compared to PWM converters due to lower switching losses, modularized circuit layout, reduced voltage rating of the converter switches, reduced EMI. The structure of separate dc sources in chain cell converter is well suited for photovoltaic systems as there will b several separate PV modules in the PV array which can act as an individual dc source. In this work, a single phase multilevel chain cell converter is used to interface the photovoltaic array to a single phase grid at a frequency of 50Hz. Control algorithms are developed for efficient interfacing of the PV system with grid and isolating the PV system from grid under faulty conditions. Digital signal processor TMS320F 2812 is used to implement the control algorithms developed and for the generation of other control signals.

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The present article about the high speed water tunnel facility at the Indian Institute of Science, Bangalore, provides a general description of the tunnel circuit, and brief reports on the performance of the facility and some typical results from investigations carried out in it. A unique aspect of the facility is that it has a horizontal resorber in the form of a large cylindrical tank located in the lower leg of the circuit. The facility has been used, among other things, for flow visualization studies, and investigations on marine propeller hydrodynamics and “synthetic cavitation”. The last topic has been primarily developed at the Indian Institute of Science and shows considerable promise for basic work in cavitation inception and noise.

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Materials with high thermal conductivity and thermal expansion coefficient matching with that of Si or GaAs are being used for packaging high density microcircuits due to their ability of faster heat dissipation. Al/SiC is gaining wide acceptance as electronic packaging material due to the fact that its thermal expansion coefficient can be tailored to match with that of Si or GaAs by varying the Al:SiC ratio while maintaining the thermal conductivity more or less the same. In the present work, Al/SiC microwave integrated circuit (MIC) carriers have been fabricated by pressureless infiltration of Al-alloy into porous SiC preforms in air. This new technique provides a cheaper alternative to pressure infiltration or pressureless infiltration in nitrogen in producing Al/SiC composites for electronic packaging applications. Al-alloy/65vol% SiC composite exhibited a coefficient of thermal expansion of 7 x 10(-6) K-1 (25 degrees C-100 degrees C) and a thermal conductivity of 147 Wm(-1) K-1 at 30 degrees C. The hysteresis observed in thermal expansion coefficient of the composite in the temperature range 100 degrees C-400 degrees C has been attributed to the presence of thermal residual stresses in the composite. Thermal diffusivity of the composite measured over the temperature range from 30 degrees C to 400 degrees C showed a 55% decrease in thermal diffusivity with temperature. Such a large decrease in thermal diffusivity with temperature could be due to the presence of micropores, microcracks, and decohesion of the Al/SiC interfaces in the microstructure (all formed during cooling from the processing temperature). The carrier showed satisfactory performance after integrating it into a MIC.

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A one-dimensional arbitrary system with quantum Hamiltonian H(q, p) is shown to acquire the 'geometric' phase gamma (C)=(1/2) contour integral c(Podqo-qodpo) under adiabatic transport q to q+q+qo(t) and p to p+po(t) along a closed circuit C in the parameter space (qo(t), po(t)). The non-vanishing nature of this phase, despite only one degree of freedom (q), is due ultimately to the underlying non-Abelian Weyl group. A physical realisation in which this Berry phase results in a line spread is briefly discussed.

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Direct writing of patterns is being widely attempted in the field of microelectronic circuit/device manufacture. Use of this technique eliminates the need for employing photolithographic process. Laser induced direct writing can be achieved by (i) Photochemical reaction [i] , (ii) Evaporation from target material [2], and (iii) decomposition.Micron size features of palladium and copper through decomposition of palladium acetate and copper formate respectively on quartz and silicon using Argon ion laser have been reported [3,4] .In this commuication we report a technique for both single line and large area depositon of copper through decomposition of copper acetate,(CH3COO)2Cu, on alumina substrates.Nd:YAG laser known for its reliability and low maintenance cost as compared to excimer and other gas lasers is used. This technique offers an attractive and economical alternative for manufacture of thin film microcircuits.

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This paper proposes a new five-level inverter topology for open-end winding induction motor (IM) drive. The popular existing circuit configurations for five-level inverter include the NPC inverter and flying capacitor topologies. Compared to the NPC inverter, the proposed topology eliminates eighteen clamping diodes having different voltage ratings in the present circuit. Moreover it requires only one capacitor bank per phase, whereas flying capacitor schemes for five level topologies require six capacitor banks per phase. The proposed topology is realized by feeding the phase winding of an open-end induction motor with two-level inverters in series with flying capacitors. The flying capacitor voltages are balanced using the switching state redundancy for full modulation range. The proposed inverter scheme is capable of producing two-level to five-level pulse width modulated voltage across the phase winding depending on the modulation range. Additionally, in case of any switch failure in the flying capacitor connection, the proposed inverter topology can be operated as a three-level inverter for full modulation range. The proposed scheme is experimentally verified on a four pole, 5hp induction motor drive.