Rapid serological diagnosis of Helicobacter pylori:a need for caution and re-evaluation

Screening for Helicobacter pylori in dyspeptic patients may improve selectivity for gastroscopy. Rapid serological tests based on ELISA technique are cheap, readily available and simple to use in the clinical setting. However local evaluation is essential in order to validate these techniques. Fifty-six dyspeptic patients (aged less than 45 yr) had a rapid serological test (Helisal) performed prior to gastroscopy. At gastroscopy H. pylori status was assessed using culture and histology. The Helisal sensitivity was 80 per cent, specificity 82 per cent. Screening patients with the Helisal test would have missed 6 patients with peptic ulcer disease and 2 with oesophagitis. The Helisal test did not perform satisfactorily as a screening test in selection of patients for gastroscopy.

A proposed mechanism for chlorpromazine jaundice--defective hepatic sulphoxidation combined with rapid hydroxylation

On the basis of previous experimental studies we postulated that individuals who were phenotypically good hydroxylators but poor sulphoxidisers would be susceptible to chlorpromazine jaundice. Sulphoxidation capacity was assessed in 12 subjects with a history of chlorpromazine jaundice, using S-carboxymethyl-L-cysteine as an in vivo probe. Following an oral dose of 750 mg, unchanged compound and sulphoxide metabolites were measured in urine. All 12 subjects (100%) were shown to be poor sulphoxidisers compared to 22% of normal controls (P less than 0.001) and 23.8% of liver disease controls (P less than 0.001). No subjects with a history of chlorpromazine jaundice had an impaired hydroxylation capacity as assessed by recovery of 4-hydroxydebrisoquine in urine following oral debrisoquine. The results support the hypothesis and demonstrate an inherent metabolic basis of susceptibility to chlorpromazine jaundice.

Rapid differentiation between fluconazole-sensitive and -resistant species of Candida directly from positive blood-culture bottles by real-time PCR

In view of both the delay in obtaining identification by conventional methods following blood-culture positivity in patients with candidaemia and the close relationship between species and fluconazole (FLC) susceptibility, early speciation of positive blood cultures has the potential to influence therapeutic decisions. The aim was to develop a rapid test to differentiate FLC-resistant from FLC-sensitive Candida species. Three TaqMan-based real-time PCR assays were developed to identify up to six Candida species directly from BacT/Alert blood-culture bottles that showed yeast cells on Gram staining at the time of initial positivity. Target sequences in the rRNA gene complex were amplified, using a consensus two-step PCR protocol, to identify Candida albicans, Candida parapsilosis, Candida tropicalis, Candida dubliniensis, Candida glabrata and Candida krusei; these are the most commonly encountered Candida species in blood cultures. The first four of these (the characteristically FLC-sensitive group) were identified in a single reaction tube using one fluorescent TaqMan probe targeting 1 8S rRNA sequences conserved in the four species. The FLC-resistant species C. krusei and C. glabrata were detected in two further reactions, each with species-specific probes. This method was validated with clinical specimens (blood cultures) positive for yeast (n=33 sets) and the results were 100% concordant with those of phenotypic identification carried out concomitantly. The reported assay significantly reduces the time required to identify the presence of C. glabrata and C. krusei in comparison with a conventional phenotypic method, from ~72 to

Development of a rapid low cost fluorescent biosensor for the detection of food contaminants

A prototype fluorescent based biosensor has been developed for the antibody based detection of food related contaminants. Its performance was characterised and showed a typical antibody binding signal of 200-2000 mV, a short term noise of 9.1 mV, and baseline slope of -0.016 mV/s over 4 h. Bulk signal detection repeatability (n=23) and reproducibility (n=3) were less than 2.4%CV. The biosensor detection unit was evaluated using two food related model systems proving its ability to monitor both binding using commercial products and inhibition through the development of an assay. This assay development potential was evaluated by observing the biosensor's performance whilst appraising several labelled antibody and glass slide configurations. The molecular interaction between biotin and an anti-biotin antibody was shown to be inhibited by 41% due to the presence of biotin in a sample. A food toxin (domoic acid) calibration curve was produced, with %CVs ranging from 2.7 to 7.8%, and a midpoint of approximately 17 ng/ml with further optimisation possible. The ultimate aim of this study was to demonstrate the working principles of this innovative biosensor as a potential portable tool with the opportunity of interchangeable assays. The biosensor design is applicable for the requirements of routine food contaminant analysis, with respect to performance, functionality and cost. (C) 2012 Elsevier B.V. All rights reserved.

Assessing the occupational risk of dust particles in the Kenyan tanning industry using rapid image processing and microscopy techniques

The purpose of this study was to investigate the occupational hazards within the tanning industry caused by contaminated dust. A qualitative assessment of the risk of human exposure to dust was made throughout a commercial Kenyan tannery. Using this information, high-risk points in the processing line were identified and dust sampling regimes developed. An optical set-up using microscopy and digital imaging techniques was used to determine dust particle numbers and size distributions. The results showed that chemical handling was the most hazardous (12 mg m(-3)). A Monte Carlo method was used to estimate the concentration of the dust in the air throughout the tannery during an 8 h working day. This showed that the high-risk area of the tannery was associated with mean concentrations of dust greater than the UK Statutory Instrument 2002 No. 2677. stipulated limits (exceeding 10 mg m(-3) (Inhalable dust limits) and 4 mg m(-3) (Respirable dust limits). This therefore has implications in terms of provision of personal protective equipment (PPE) to the tannery workers for the mitigation of occupational risk.

Rapid design of DSP ASIC cores using hierarchical VHDL libraries

Methods are presented for the rapid design of DSP ASICs based on the use of a series of hierarchical VHDL libraries which are portable across many silicon foundries. These allows complex DSP silicon systems to be developed in a small fraction of the time normally required. Resulting designs are highly competitive with those developed using more conventional methods. The approach is illustrated using several examples. These include ADPCM codecs, as well as DCT and FFT cores.

Rapid design of application specific FFT cores

Methods are presented for developing synthesizable FFT cores. These are based on a modular approach in which parameterized commutator and processor blocks are cascaded to implement the computations required in many important FFT signal flow graphs. In addition, it is shown how the use of a digital serial data organization can be used to produce systems that offer 100% processor utilization along with reductions in storage requirements. The approach has been used to create generators for the automated synthesis of FFT cores that are portable across a broad range of silicon technologies. Resulting chip designs are competitive with ones created using manual methods but with significant reductions in design times.

Rapid design of discrete orthonormal wavelet transforms

A methodology which allows a non-specialist to rapidly design silicon wavelet transform cores has been developed. This methodology is based on a generic architecture utilizing time-interleaved coefficients for the wavelet transform filters. The architecture is scaleable and it has been parameterized in terms of wavelet family, wavelet type, data word length and coefficient word length. The control circuit is designed in such a way that the cores can also be cascaded without any interface glue logic for any desired level of decomposition. This parameterization allows the use of any orthonormal wavelet family thereby extending the design space for improved transformation from algorithm to silicon. Case studies for stand alone and cascaded silicon cores for single and multi-stage analysis respectively are reported. The typical design time to produce silicon layout of a wavelet based system has been reduced by an order of magnitude. The cores are comparable in area and performance to hand-crafted designs. The designs have been captured in VHDL so they are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Rapid silicon design of discrete orthonormal wavelet transforms based algorithms

A methodology has been developed which allows a non-specialist to rapidly design silicon wavelet transform cores for a variety of specifications. The cores include both forward and inverse orthonormal wavelet transforms. This methodology is based on efficient, modular and scaleable architectures utilising time-interleaved coefficients for the wavelet transform filters. The cores are parameterized in terms of wavelet type and data and coefficient word lengths. The designs have been captured in VHDL and are hence portable across a range of silicon foundries as well as FPGA and PLD implementations.

Rapid design of a single chip adaptive beamformer

This paper presents the design of a single chip adaptive beamformer which contains 5 million transistors and can perform 50 GigaFlops. The core processor of the adaptive beamformer is a QR-array processor implemented on a fully efficient linear systolic architecture. The paper highlights a number of rapid design techniques that have been used to realize the design. These include an architecture synthesis tool for quickly developing the circuit architecture and the utilization of a library of parameterizable silicon intellectual property (IP) cores, to rapidly develop the circuit layouts.